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1. 发明授权

US06403976B1 Semiconductor crystal, fabrication method thereof, and semiconductor device 失效
标题翻译：半导体晶体及其制造方法以及半导体器件
公开(公告)号：US06403976B1
公开(公告)日：2002-06-11
申请号：US09482077
申请日：2000-01-13
申请人： Tohru Saitoh , Yoshihiko Kanzawa , Koji Katayama , Katsuya Nozawa , Gaku Sugahara , Minoru Kubo
发明人： Tohru Saitoh , Yoshihiko Kanzawa , Koji Katayama , Katsuya Nozawa , Gaku Sugahara , Minoru Kubo
IPC分类号： H01L2906
CPC分类号： H01L29/165 , C30B23/02 , C30B29/68 , H01L21/02381 , H01L21/02447 , H01L21/0245 , H01L21/02507 , H01L21/02529 , H01L21/02532 , H01L21/0262 , H01L29/1054 , H01L29/155
摘要： A Si1−xGex/Si1−yCy short-period superlattice which functions as a single SiGeC layer is formed by alternately growing Si1−xGex layers (0
摘要翻译：通过交替生长Si1-xGex层（0

2. 发明授权

US06537369B1 SiGeC semiconductor crystal and production method thereof 有权
标题翻译： SiGeC半导体晶体及其制造方法
公开(公告)号：US06537369B1
公开(公告)日：2003-03-25
申请号：US09979881
申请日：2001-11-27
申请人： Tohru Saitoh , Yoshihiko Kanzawa , Katsuya Nozawa , Minoru Kubo
发明人： Tohru Saitoh , Yoshihiko Kanzawa , Katsuya Nozawa , Minoru Kubo
IPC分类号： C30B2302
CPC分类号： H01L29/161 , C30B25/02 , C30B29/52 , H01L21/02447 , H01L21/0245 , H01L21/02507 , H01L21/02529 , H01L21/02532 , H01L21/02579 , H01L21/0262 , Y10T428/12674 , Y10T428/265
摘要： A B-doped Si1−x−yGexCy layer 102 (where 0
摘要翻译：使用UHV-CVD工艺在Si衬底101上外延生长B掺杂的Si1-x-yGexCy层102（其中0

3. 发明授权

US06930026B2 Method of forming a semiconductor wafer having a crystalline layer thereon containing silicon, germanium and carbon 有权
标题翻译：形成其上含有硅，锗和碳的结晶层的半导体晶片的方法
公开(公告)号：US06930026B2
公开(公告)日：2005-08-16
申请号：US10414106
申请日：2003-04-16
申请人： Yoshihiko Kanzawa , Katsuya Nozawa , Tohru Saitoh , Minoru Kubo
发明人： Yoshihiko Kanzawa , Katsuya Nozawa , Tohru Saitoh , Minoru Kubo
IPC分类号： H01L21/205 , C30B33/00 , H01L21/20 , H01L29/10 , H01L29/165 , H01L29/24 , H01L20/30 , H01L21/36 , H01L29/06 , H01L29/12
CPC分类号： H01L29/1608 , C30B29/06 , C30B29/52 , C30B33/00 , H01L21/02381 , H01L21/02447 , H01L21/0245 , H01L21/02502 , H01L21/02513 , H01L21/02532 , H01L21/02667 , H01L29/1054 , H01L29/165
摘要： A Si substrate 1 with a SiGeC crystal layer 8 deposited thereon is annealed to form an annealed SiGeC crystal layer 10 on the Si substrate 1. The annealed SiGeC crystal layer includes a matrix SiGeC crystal layer 7, which is lattice-relieved and hardly has dislocations, and SiC microcrystals 6 dispersed in the matrix SiGeC crystal layer 7. A Si crystal layer is then deposited on the annealed SiGeC crystal layer 10, to form a strained Si crystal layer 4 hardly having dislocations.
摘要翻译：对其上沉积有SiGeC晶体层8的Si衬底1进行退火，以在Si衬底1上形成退火的SiGeC晶体层10。退火的SiGeC晶体层包括晶格释放并且几乎不具有位错的矩阵SiGeC晶体层7和分散在基体SiGeC晶体层7中的SiC微晶6。然后在退火的SiGeC晶体层10上沉积Si晶体层，以形成几乎不具有位错的应变Si晶体层4。

4. 发明授权

US06720587B2 Structure evaluation method, method for manufacturing semiconductor devices, and recording medium 失效
标题翻译：结构评估方法，制造半导体器件的方法和记录介质
公开(公告)号：US06720587B2
公开(公告)日：2004-04-13
申请号：US10048562
申请日：2002-02-04
申请人： Katsuya Nozawa , Tohru Saitoh , Minoru Kubo , Yoshihiko Kanzawa
发明人： Katsuya Nozawa , Tohru Saitoh , Minoru Kubo , Yoshihiko Kanzawa
IPC分类号： H01L31109
CPC分类号： H01L22/20 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/0262 , H01L2924/0002 , H01L2924/00
摘要： An initial estimated value of a process condition is set, and a structure of an element of a semiconductor device is estimated by a process simulator, after which an estimated value of a physical amount measurement value is calculated. Then, an actual measurement value of a physical amount of the element of the semiconductor device, which is obtained by an optical evaluation method, and a theoretical calculated value thereof are compared with each other, so as to obtain a probable structure of the measured semiconductor device element by using, for example, a simulated annealing, or the like. A process condition in a process for other semiconductor device elements can be corrected by using the results.
摘要翻译：设置处理条件的初始估计值，并且通过处理模拟器估计半导体器件的元件的结构，之后计算物理量测量值的估计值。然后，将通过光学评估方法获得的半导体器件的元件的物理量的实际测量值和理论计算值彼此进行比较，以获得测量的半导体的可能结构器件元件，例如使用模拟退火等。可以通过使用结果来校正其他半导体器件元件的处理过程。

5. 发明授权

US06649496B2 Production method for semiconductor crystal 有权
标题翻译：半导体晶体的制造方法
公开(公告)号：US06649496B2
公开(公告)日：2003-11-18
申请号：US09979258
申请日：2001-11-21
申请人： Yoshihiko Kanzawa , Katsuya Nozawa , Tohru Saitoh , Minoru Kubo
发明人： Yoshihiko Kanzawa , Katsuya Nozawa , Tohru Saitoh , Minoru Kubo
IPC分类号： H01L2120
CPC分类号： C23C16/22 , C30B25/02 , C30B29/52
摘要： After the surface of a Si substrate (1) has been pretreated, an SiGeC layer (2) is formed on the Si substrate (1) using an ultrahigh vacuum chemical vapor deposition (UHV-CVD) apparatus. During this process step, the growth temperature of the SiGeC layer (2) is set at 490° C. or less and Si2H6, GeH4 and SiH3CH3 are used as Si, Ge and C sources, respectively, whereby the SiGeC layer (2) with good crystallinity can be formed.
摘要翻译：在Si衬底（1）的表面经过预处理之后，使用超高真空化学气相沉积（UHV-CVD）装置在Si衬底（1）上形成SiGeC层（2）。在该工艺步骤中，SiGeC层（2）的生长温度设定为490℃以下，Si 2 H 6，GeH 4，SiH 3 CH 3分别用作Si，Ge，C源，SiGeC层（2）与可以形成良好的结晶度。

6. 发明授权

US06645836B2 Method of forming a semiconductor wafer having a crystalline layer thereon containing silicon, germanium and carbon 有权
标题翻译：形成其上含有硅，锗和碳的结晶层的半导体晶片的方法
公开(公告)号：US06645836B2
公开(公告)日：2003-11-11
申请号：US09979305
申请日：2001-11-21
申请人： Yoshihiko Kanzawa , Katsuya Nozawa , Tohru Saitoh , Minoru Kubo
发明人： Yoshihiko Kanzawa , Katsuya Nozawa , Tohru Saitoh , Minoru Kubo
IPC分类号： H01L2130
CPC分类号： H01L29/1608 , C30B29/06 , C30B29/52 , C30B33/00 , H01L21/02381 , H01L21/02447 , H01L21/0245 , H01L21/02502 , H01L21/02513 , H01L21/02532 , H01L21/02667 , H01L29/1054 , H01L29/165
摘要： A Si substrate 1 with a SiGeC crystal layer 8 deposited thereon is annealed to form an annealed SiGeC crystal layer 10 on the Si substrate 1. The annealed SiGeC crystal layer includes a matrix SiGeC crystal layer 7, which is lattice-relieved and hardly has dislocations, and Sic microcrystals 6 dispersed in the matrix SiGeC crystal layer 7. A Si crystal layer is then deposited on the annealed SiGeC crystal layer 10, to form a strained Si crystal layer 4 hardly having dislocations.
摘要翻译：对其上沉积有SiGeC晶体层8的Si衬底1进行退火，以在Si衬底1上形成退火的SiGeC晶体层10.退火的SiGeC晶体层包括晶格释放且几乎不具有位错的SiGeC晶体层7 ，以及分散在基体SiGeC晶体层7中的Sic微晶6.然后在退火的SiGeC晶体层10上沉积Si晶体层，形成几乎不具有位错的应变Si晶体层4。

7. 发明授权

US06852602B2 Semiconductor crystal film and method for preparation thereof 失效
标题翻译：半导体晶体膜及其制备方法
公开(公告)号：US06852602B2
公开(公告)日：2005-02-08
申请号：US10298000
申请日：2002-01-30
申请人： Yoshihiko Kanzawa , Tohru Saitoh , Katsuya Nozawa , Minoru Kubo , Yoshihiro Hara , Takeshi Takagi , Takahiro Kawashima
发明人： Yoshihiko Kanzawa , Tohru Saitoh , Katsuya Nozawa , Minoru Kubo , Yoshihiro Hara , Takeshi Takagi , Takahiro Kawashima
IPC分类号： H01L21/205 , H01L29/15 , H01L29/24 , H01L29/737 , H01L29/80 , H01L21/331
CPC分类号： H01L21/02381 , H01L21/02447 , H01L21/0245 , H01L21/02505 , H01L21/02507 , H01L21/02529 , H01L21/02532 , H01L21/0262 , H01L21/02661 , H01L29/155 , H01L29/1608 , H01L29/7378 , H01L29/802
摘要： A multi-layer film 10 is formed by stacking a Si1-x1-y1Gex1Cy1 layer (0≦x1 y2) having a high Ge mole fraction, e.g., a Si0.2Ge0.8 layer 12. In this manner, the range in which the multi-layer film serves as a SiGeC layer with C atoms incorporated into lattice sites extends to high degrees in which a Ge mole fraction is high.
摘要翻译：通过层叠具有小Ge摩尔分数的Si1-x1-y1Gex1Cy1层（0 <= x1 <1和0 y2），例如Si0.2Ge0.8层以这种方式，多层膜用作结合到晶格点中的C原子的SiGeC层的范围延伸到Ge摩尔分数高的高度。

8. 发明授权

US06660393B2 SiGeC semiconductor crystals and the method producing the same 有权
标题翻译： SiGeC半导体晶体及其制造方法
公开(公告)号：US06660393B2
公开(公告)日：2003-12-09
申请号：US10383743
申请日：2003-03-10
申请人： Tohru Saitoh , Yoshihiko Kanzawa , Katsuya Nozawa , Minoru Kubo
发明人： Tohru Saitoh , Yoshihiko Kanzawa , Katsuya Nozawa , Minoru Kubo
IPC分类号： C30B2934
CPC分类号： H01L29/161 , C30B25/02 , C30B29/52 , H01L21/02447 , H01L21/0245 , H01L21/02507 , H01L21/02529 , H01L21/02532 , H01L21/02579 , H01L21/0262 , Y10T428/12674 , Y10T428/265
摘要： A B-doped Si1−x−yGexCy layer 102 (where 0
摘要翻译：使用UHV-CVD工艺在Si衬底101上外延生长B掺杂的Si1-x-yGexCy层102（其中0

9. 发明授权

US06620665B1 Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US06620665B1
公开(公告)日：2003-09-16
申请号：US09787108
申请日：2001-03-14
申请人： Gaku Sugahara , Tohru Saitoh , Minoru Kubo , Teruhito Ohnishi
发明人： Gaku Sugahara , Tohru Saitoh , Minoru Kubo , Teruhito Ohnishi
IPC分类号： H01L21338
CPC分类号： H01L29/66916 , H01L21/02164 , H01L21/02271 , H01L21/02381 , H01L21/0245 , H01L21/02529 , H01L21/02532 , H01L21/28512 , H01L21/28525 , H01L21/3145 , H01L21/31612 , H01L21/3185 , H01L21/823807 , H01L29/66242
摘要： A process control is performed for fabricating both a wafer for a device including a Ge-containing semiconductor film and a wafer for a device, for example, including no Ge-containing semiconductor film on a common fabrication line. When the wafer including the Ge-containing semiconductor film is to be subjected to high-temperature treatment at 700° C. or more in the state of the Ge-containing semiconductor film being substantially exposed, the Ge-containing semiconductor film is covered with a cap layer made of Si or the like before the high-temperature treatment. The cap layer may be formed on the common fabrication line. However, if the formation of the cap layer itself involves high temperature of 700° C. or more, it is performed on a fabrication line separate from the common fabrication line. Alternatively, the cap layer may be formed on a fabrication line separate from the common fabrication line and the high-temperature treatment at 700° C. or more may also be performed on a separate fabrication line. Otherwise, it suffices to only perform the high-temperature treatment at 700° C. or more on a separate line.
摘要翻译：执行用于制造包括含Ge半导体膜和用于器件的晶片的器件的晶片的工艺控制，例如在公共制造线上不包含含Ge半导体膜。在含有Ge的半导体膜的晶片在Ge基半导体膜的状态基本上露出的状态下，在700℃以上进行高温处理时，含有Ge的半导体膜被覆盖在高温处理之前由Si等制成的盖层。盖层可以形成在公共制造线上。然而，如果盖层本身的形成涉及700℃以上的高温，则在与公共制造线分开的制造线上进行。或者，盖层可以形成在与公共制造线分开的制造线上，并且在700℃以上的高温处理也可以在单独的制造线上进行。否则，仅在单独的线路上进行700℃以上的高温处理即可。

10. 发明授权

US07105449B1 Method for cleaning substrate and method for producing semiconductor device 失效
标题翻译：基板清洗方法及半导体装置的制造方法
公开(公告)号：US07105449B1
公开(公告)日：2006-09-12
申请号：US10111599
申请日：2000-10-27
申请人： Katsuya Nozawa , Minoru Kubo , Tohru Saitoh
发明人： Katsuya Nozawa , Minoru Kubo , Tohru Saitoh
IPC分类号： H01L21/302
CPC分类号： H01L21/02046 , H01L21/31116 , H01L21/8249
摘要： A thermal cleaning of a substrate that has been subjected to wet cleaning is carried out under a high vacuum atmosphere to remove an oxide film remaining on the substrate. Thereafter, a thermal cleaning is carried out under a hydrogen atmosphere to remove contamination such as carbon or the like. At this time, the oxide film has already been removed and therefore contamination is effectively removed by a relatively low temperature and short duration thermal cleaning. Thus, problems such as the degradation of the profile of the impurity concentration in the impurity diffusion layer which has been formed over the substrate are prevented.
摘要翻译：进行了湿式清洗的基板的热清洗是在高真空气氛下进行的，以除去留在基板上的氧化膜。此后，在氢气氛下进行热清洗以除去诸如碳等的污染物。此时，氧化膜已经被去除，因此通过相对低的温度和短时间的热清洁有效地去除污染。因此，防止了在衬底上形成的杂质扩散层中的杂质浓度分布的劣化的问题。

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