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1. 发明授权

US5924873A Flexible circuit board interconnect with strain relief 失效
公开(公告)号：US5924873A
公开(公告)日：1999-07-20
申请号：US857122
申请日：1997-05-15
申请人： Tina Barcley , Robert A. Isola , Edward T. Pokriefka , Norman J. Roth , Vasil Germanski
发明人： Tina Barcley , Robert A. Isola , Edward T. Pokriefka , Norman J. Roth , Vasil Germanski
IPC分类号： H01R12/62 , H05K1/02 , H05K1/11 , H05K3/28 , H05K3/36 , H05K9/00 , H02R9/09
CPC分类号： H05K9/0039 , H05K1/0224 , H05K1/118 , H05K3/363 , H05K1/0253 , H05K2201/0715 , H05K2201/09481 , H05K2201/09681 , H05K2201/09709 , H05K2201/10666 , H05K2203/0195 , H05K3/281
摘要： A flexible circuit board interconnect is provided with flex strain relief capabilities. The flexible circuit board interconnect includes a polyamide or polyimide (both are nylons) substrate layer, a ground plane layer and a conductor strip layer. The ground plane layer is provided with scalloped edges along opposite sides thereof. The ground plane provides a shield for preventing radio frequency interference to and from the signals passed through the conductor strips. The ground plane layer and the conductor strips are covered at least partially by a pair of soldermask layers which are provided with scalloped edges. The scalloped edges on the soldermask layers and the ground plane prevent the generation of a crease or fold line on the surface of the flexible circuit board interconnect. Each of the conductor strips are provided with a pair of vias on opposite ends of thereof. The vias are arranged to be offset from the vias on adjacent conductor strips such that a perforation-type tear line is avoided and such that when a hot bar soldering is used, at least one via remains uncovered for receiving soldering wicking, thus reducing the likelihood of solder bridging across conductor strips.

2. 发明授权

US5981870A Flexible circuit board interconnect with strain relief 失效
标题翻译：柔性电路板与应变消除互连
公开(公告)号：US5981870A
公开(公告)日：1999-11-09
申请号：US857121
申请日：1997-05-15
申请人： Tina Barcley , Robert A. Isola , Edward T. Pokriefka , Norman J. Roth , Vasil Germanski
发明人： Tina Barcley , Robert A. Isola , Edward T. Pokriefka , Norman J. Roth , Vasil Germanski
IPC分类号： H05K1/00 , H05K1/02 , H05K1/11 , H05K3/28 , H05K9/00
CPC分类号： H05K1/028 , H05K1/0224 , H05K1/118 , H05K9/0039 , H05K1/0253 , H05K2201/0715 , H05K2201/09681 , H05K3/28
摘要： A flexible circuit board interconnect is provided with flex strain relief capabilities. The flexible circuit board interconnect includes a polyamide or polyimide (both are nylons) substrate layer, a ground plane layer and a conductor strip layer. The ground plane layer is provided with scalloped edges along opposite sides thereof. The ground plane provides a shield for preventing radio frequency interference to and from the signals passed through the conductor strips. The ground plane layer and the conductor strips are covered at least partially by a pair of soldermask layers which are provided with scalloped edges. The scalloped edges on the soldermask layers and the ground plane prevent the generation of a crease or fold line on the surface of the flexible circuit board interconnect. Each of the conductor strips are provided with a pair of vias on opposite ends of thereof. The vias are arranged to be offset from the vias on adjacent conductor strips such that a perforation-type tear line is avoided and such that when a hot bar soldering is used, at least one via remains uncovered for receiving soldering wicking, thus reducing the likelihood of solder bridging across conductor strips.
摘要翻译：柔性电路板互连提供了柔性应变消除功能。柔性电路板互连包括聚酰胺或聚酰亚胺（均为尼龙）衬底层，接地平面层和导体带层。接地平面层沿其相对侧设置有扇形边。接地平面提供屏蔽，用于防止对穿过导体条的信号产生射频干扰。地平面层和导体条至少部分由一对带有扇形边缘的焊接掩模层覆盖。焊接层和接地面上的扇形边缘防止在柔性电路板互连表面产生折痕或折线。每个导体条在其相对端上设置有一对通孔。通孔布置成偏离相邻导体条上的通孔，使得避免穿孔型撕裂线，并且使得当使用热棒焊接时，至少一个通孔保持未覆盖以接收焊接芯吸，从而降低可能性焊接桥接在导体条上。

3. 发明授权

US5917149A Flexible circuit board interconnect with strain relief 失效
公开(公告)号：US5917149A
公开(公告)日：1999-06-29
申请号：US856713
申请日：1997-05-15
申请人： Tina Barcley , Norman J. Roth , Vasil Germanski , Edward T. Pokriefka , Robert A. Isola
发明人： Tina Barcley , Norman J. Roth , Vasil Germanski , Edward T. Pokriefka , Robert A. Isola
IPC分类号： H05K1/02 , H05K1/11 , H05K3/34 , H05K3/36 , H05K9/00
CPC分类号： H05K1/118 , H05K1/0281 , H05K3/3452 , H05K3/363 , H05K1/0224 , H05K2201/0715 , H05K2201/09681 , H05K2201/09709 , H05K2201/09909 , H05K2201/10666 , H05K2201/2009 , H05K2203/0195
摘要： A flexible circuit board interconnect is provided with flex strain relief capabilities. The flexible circuit board interconnect includes a polyamide or polyimide (both are nylons) substrate layer, a ground plane layer and a conductor strip layer. The ground plane layer is provided with scalloped edges along opposite sides thereof. The ground plane provides a shield for preventing radio frequency interference to and from the signals passed through the conductor strips. The ground plane layer and the conductor strips are covered at least partially by a pair of soldermask layers which are provided with scalloped edges. The scalloped edges on the soldermask layers and the ground plane prevent the generation of a crease or fold line on the surface of the flexible circuit board interconnect. Each of the conductor strips are provided with a pair of vias on opposite ends of thereof. The vias are arranged to be offset from the vias on adjacent conductor strips such that a perforation-type tear line is avoided and such that when a hot bar soldering is used, at least one via remains uncovered for receiving soldering wicking, thus reducing the likelihood of solder bridging across conductor strips.

4. 发明授权

US5072279A Electrical interconnection having angular lead design 失效
标题翻译：具有角度引线设计的电气互连
公开(公告)号：US5072279A
公开(公告)日：1991-12-10
申请号：US604691
申请日：1990-10-29
申请人： Norman J. Roth
发明人： Norman J. Roth
IPC分类号： H01L21/60 , H01L23/495 , H01L23/498
CPC分类号： H01L23/49861 , H01L23/49541 , H01L23/49572 , H01L2924/0002
摘要： An electrical interconnection is provided for electrically and physically connecting a plurality of bonding sites on an integrated circuit chip to a plurality of external electrical connections. The electrical interconnection contains a plurality of individual electrical leads which have been formed so as to have the same degree of non-perpendicularity with respect to the rectangular shape of the integrated circuit. All of the individual leads are angled so as to rotate in the same direction around the integrated circuit. This angled lead design provides enhanced strain relief and improved performance during use since the integrated circuit is free to rotate under an applied stress, while efficiently maximizing the number of available electrical leads for bonding to the integrated circuit chip. In addition, this electrical interconnection is suitable for use with tape automated bonding methods.

5. 发明授权

US4947235A Integrated circuit shield 失效
标题翻译：集成电路屏蔽
公开(公告)号：US4947235A
公开(公告)日：1990-08-07
申请号：US312800
申请日：1989-02-21
申请人： Norman J. Roth , Robert J. Wallace , Domenica N. Hartman
发明人： Norman J. Roth , Robert J. Wallace , Domenica N. Hartman
IPC分类号： H01L23/552
CPC分类号： H01L23/552 , H01L2924/0002
摘要： Propagation of electromagnetic interference waves is eliminated or substantially reduced by providing an electromagnetic interference shield suitable for shielding electromagnetic interference or radio frequency interference which are generated by offending components on a monolithic integrated circuit chip. The shield is disposed over the offending components of the integrated circuit and is sufficiently large to eliminate or substantially reduce the propagation of any offending interference waves. Alternatively, the shield may be disposed over a non-offending component to prevent radiated electromagnetic interference from entering the non-offending component. The shield is electrically conductive and maintained at a predetermined, primarily constant, electrical potential with respect to the underlying integrated circuit chip. The shield is integral with the electrically conductive tape used with tape automated bonding manufacturing techniques, or, in an alternative embodiment, the flexible conductive circuitry pattern used with flexible circuitry manufacturing techniques.
摘要翻译：电磁干扰波的传播通过提供适用于屏蔽由单片集成电路芯片上的组件产生的电磁干扰或射频干扰的电磁干扰屏蔽来消除或大大减少。屏蔽层设置在集成电路的不利部件上，并且足够大以消除或基本上减少任何不利干扰波的传播。或者，屏蔽可以设置在非违规部件上，以防止辐射电磁干扰进入非违规部件。屏蔽是导电的并且相对于下面的集成电路芯片保持在预定的，主要恒定的电位。该屏蔽件与用于带式自动接合制造技术的导电胶带是一体的，或者在替代实施例中，柔性导电电路图案与柔性电路制造技术一起使用。

6. 发明授权

US5162265A Method of making an electrical interconnection having angular lead design 失效
标题翻译：制造具有角度引线设计的电互连的方法
公开(公告)号：US5162265A
公开(公告)日：1992-11-10
申请号：US732289
申请日：1991-07-18
申请人： Norman J. Roth
发明人： Norman J. Roth
IPC分类号： H01L23/495 , H01L23/498
CPC分类号： H01L23/49572 , H01L23/49541 , H01L23/49861 , H01L2924/0002 , Y10T29/49121
摘要： A method of making an electrical interconnection is provided for electrically and physically connecting a plurality of bonding sites on an integrated circuit chip to a plurality of external electrical connections. This electrical interconnection method uses a plurality of individual electrical leads which have been formed so as to have the same degree of non-perpendicularity with respect to the rectangular shape of the integrated circuit. All of the individual leads are angled so as to rotate in the same direction around the integrated circuit. This angled lead design provides enhanced strain relief and improved performance during use since the integrated circuit is free to rotate under an applied stress, while efficiently maximizing the number of available electrical leads for bonding to the integrated circuit chip. In addition, this electrical interconnection method is suitable for use with tape automated bonding methods.
摘要翻译：提供一种制造电互连的方法，用于将集成电路芯片上的多个接合位置电连接和物理连接到多个外部电连接。这种电互连方法使用已经形成为相对于集成电路的矩形形状具有相同程度的非垂直度的多个单独的电引线。所有单独的引线都是成角度的，以便围绕集成电路以相同的方向旋转。这种倾斜的引线设计提供了增强的应变消除和改进的使用性能，因为集成电路在施加的应力下自由旋转，同时有效地最大化用于结合到集成电路芯片的可用电引线的数量。此外，该电互连方法适用于带式自动接合方法。

7. 发明授权

US5016082A Integrated circuit interconnect design 失效
标题翻译：集成电路互连设计
公开(公告)号：US5016082A
公开(公告)日：1991-05-14
申请号：US539277
申请日：1990-06-18
申请人： Norman J. Roth
发明人： Norman J. Roth
IPC分类号： H01L23/495 , H01L23/498 , H01L23/538
CPC分类号： H01L23/5381 , H01L23/49572 , H01L23/49838 , H01L24/50 , H01L2924/14
摘要： A plurality of discrete bonding sites on an integrated circuit chip are electrically interconnected using a unique electrical interconnection lead. The interconnection lead comprises an electrically conductive strip having a first end and a second end. The strip is integrally connected at its first end to an electrically conductive tape comprising a plurality of conductive strips. The interconnection lead further comprises a plurality of bonding regions provided between the first and second ends of the conductive strip. These bonding regions provide the sites wherein the conductive strip is electrically connected to the appropriate bond site on the chip. The interconnection lead is suitable for use with tape automated bonding and flexible circuitry techniques.
摘要翻译：集成电路芯片上的多个离散的接合位置使用独特的电互连引线电互连。互连引线包括具有第一端和第二端的导电条。带材在其第一端处一体地连接到包括多个导电条的导电带。互连引线还包括设置在导电带的第一和第二端之间的多个接合区域。这些接合区域提供了这样的位置，其中导电带电连接到芯片上的合适的键合位置。互连引线适用于磁带自动键合和灵活的电路技术。

8. 发明授权

US4867715A Interconnection lead with redundant bonding regions 失效
标题翻译：互连引导与冗余绑定区域
公开(公告)号：US4867715A
公开(公告)日：1989-09-19
申请号：US188928
申请日：1988-05-02
申请人： Norman J. Roth , Ronnie J. Runyon
发明人： Norman J. Roth , Ronnie J. Runyon
IPC分类号： H01L21/00 , H01L21/60 , H01L23/495
CPC分类号： H01L24/50 , H01L21/67144 , H01L23/49541 , H01L24/36 , H01L24/40 , H01L24/86 , H01L2224/0401 , H01L2224/13144 , H01L2224/37011 , H01L2224/40225 , H01L2224/45014 , H01L24/45 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/30105 , H01L2924/30107 , H01L2924/351 , Y10T29/49121
摘要： Redundant interconnection bonds are formed on an integrated circuit using an interconnection lead comprising a plurality of electrically conductive fingers separated from each other by an electrically nonconductive medium. The individual conductive fingers are attached to, and extend out from, an electrically conductive base at one end. In addition, the individual conductive fingers are connected to each other at a separate region. The improved interconnect lead is structurally durable and the resulting redundant bond exhibits improved electrical and operating characteristics. The interconnection lead is suitable for use with tape automated bonding or flexible circuitry technologies.
摘要翻译：使用互连引线在集成电路上形成冗余互连接头，该互连引线包括通过非导电介质彼此分离的多个导电指状物。单个导电指状物在一端附接到导电基底并从其延伸出来。此外，各个导电指状物在单独的区域彼此连接。改进的互连引线在结构上是耐用的，并且所产生的冗余结合表现出改进的电和操作特性。互连引线适用于带式自动接合或灵活电路技术。

9. 发明授权

US4221940A Sensor 失效
标题翻译：传感器
公开(公告)号：US4221940A
公开(公告)日：1980-09-09
申请号：US2946
申请日：1979-01-12
申请人： Norman J. Roth
发明人： Norman J. Roth
IPC分类号： H01H35/14
CPC分类号： H01H35/14 , H01H2009/0083
摘要： An acceleration responsive sensor having a housing of molded dielectric material provided with an elongated sector shaped recess receiving a pendulum supported mass movable under an acceleration pulse into engagement with one or more fingers of a contact assembly within the recess. The mass and the contact assembly are mounted to the housing exteriorly of the recess and covered by a cover assembly of molded dielectric material.
摘要翻译：一种加速度响应传感器，其具有模制电介质材料的壳体，该壳体具有细长的扇形凹槽，该细长的扇形凹槽容纳可在加速脉冲下移动的摆锤支撑的质量，以与凹部内的触头组件的一个或多个指状物接合。质量块和接触组件安装到壳体外部的凹部并被模制的电介质材料的盖组件覆盖。

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