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    • 3. 发明申请
    • Apparatus and Method for Comparing and Statistically Extracting Commonalities and Differences Between Different Websites
    • 比较和统计提取不同网站之间的共同点和差异的装置和方法
    • US20130204860A1
    • 2013-08-08
    • US13365329
    • 2012-02-03
    • Thaddeus John Gabara
    • Thaddeus John Gabara
    • G06F17/30
    • G06F16/9535
    • The statistics from a reference page serves as a seed to compare the selected page statistics between other webpages. The statistics of all results can be graphically displayed, if desired, in a display or popup window. These results can be analyzed for the determination of a category so an appropriate search expression or a statistical mask can be developed. In addition, statistics of several pages and compare and analyze the results for search term commonality. This step determine how strongly tied the scanned data content of two different webpages are to each other. These results can be analyzed against each other to generate common search terms, a final histogram, and how this histogram compares to the reference histogram. The search expression term can be a Boolean expression or a statistical mask. The statistical mask is used as a seed to start another search moving closer to the final target or desire goal.
    • 来自参考页面的统计信息作为种子来比较其他网页之间的所选页面统计信息。 如果需要,可以在显示或弹出窗口中图形显示所有结果的统计信息。 可以分析这些结果以确定类别,从而可以开发适当的搜索表达或统计掩模。 另外,统计了几页,并比较和分析了搜索词的共同性结果。 此步骤确定两个不同网页的扫描数据内容彼此之间的强度如何。 可以相互分析这些结果以产生常见的搜索项,最终直方图以及该直方图与参考直方图的比较。 搜索表达式项可以是布尔表达式或统计掩码。 统计面具用作种子以开始更接近最终目标或期望目标的另一搜索。
    • 7. 发明授权
    • Fabrication of inductors in transformer based tank circuitry
    • 基于变压器的电路中的电感器的制造
    • US07786836B2
    • 2010-08-31
    • US11184767
    • 2005-07-19
    • Thaddeus John Gabara
    • Thaddeus John Gabara
    • H01F5/00
    • H01F17/0006H01F17/0013H01F2017/0053H01L2224/0401H01L2224/05569H01L2224/05572H01L2224/16145H01L2924/19015H01L2924/19042H01L2924/19104
    • Placing inductors or resistors in parallel causes the combined value of inductance or resistance to decrease according to the parallel combination rule. This invention decreases the parasitic resistance of an inductor by placing several inductors in parallel. Furthermore, by careful placement of these inductors, the mutual inductance between these inductors can be used to increase the equivalent inductance value to a value near that of the original inductance value of a single inductor. Thus, it is possible to create an inductance with a much lower value of parasitic resistance. This invention allows the formation of high Q inductors and would be beneficial in any circuit design requiring inductances. Another aspect of this invention is that the coils can be partitioned to minimize eddy current losses. This invention can easily be implemented in a planar technology. Simulations of several tank circuits indicate that the power dissipation can be reduced 3 to 4 times when compared to conventional techniques.
    • 电感或电阻并联使得电感或电阻的组合值根据并联组合规则减小。 本发明通过将多个电感器并联放置来降低电感器的寄生电阻。 此外,通过仔细放置这些电感器,可以使用这些电感器之间的互感将等效电感值增加到接近单个电感器的原始电感值的值。 因此,可以产生具有低得​​多的寄生电阻值的电感。 本发明允许形成高Q电感器,并且对于需要电感的任何电路设计将是有益的。 本发明的另一方面是可以将线圈分隔以最小化涡流损耗。 本发明可以容易地在平面技术中实现。 几个电路的仿真表明,与常规技术相比,功耗可以减少3到4倍。
    • 8. 发明授权
    • Frequency adjustment techniques in coupled LC tank circuits
    • 耦合LC电路中的频率调节技术
    • US07508280B2
    • 2009-03-24
    • US11184428
    • 2005-07-19
    • Thaddeus John Gabara
    • Thaddeus John Gabara
    • H03B5/12G01D5/20
    • G06F1/10H03B5/1212H03B5/1228H03B5/1243H03B27/00H03B2200/0076
    • CMOS LC tank circuits and flux linkage between inductors can be used to distribute and propagate clock signals over the surface of a VLSI chip or μprocessor. The tank circuit offers an adiabatic behavior that recycles the energy between the reactive elements and minimizes losses in a conventional sense. Flux linkage can be used to orchestrate a number of seemingly individual and distributed CMOS LC tank circuits to behave as one unit. Several frequency-adjusting techniques are presented which can be used in an distributed clock network environment which includes an array of oscillators. A passive flux linkage, mechanical, and finite state machine technique of frequency adjustment of oscillators are described.
    • CMOS LC槽电路和电感之间的磁链可用于在VLSI芯片或处理器的表面上分布和传播时钟信号。 油箱回路提供了一种绝热的行为,可回收无功元件之间的能量,并将传统意义上的损耗降至最低。 磁通联动可以用于编排一些看似独立和分布的CMOS LC电路,以作为一个单元。 提出了可以在包括振荡器阵列的分布式时钟网络环境中使用的几种频率调整技术。 描述了振荡器频率调节的无源磁链,机械和有限状态机技术。
    • 9. 发明授权
    • Reduced eddy current loss in LC tank circuits
    • LC电路中降低的涡流损耗
    • US07429899B2
    • 2008-09-30
    • US11697908
    • 2007-04-09
    • Thaddeus John Gabara
    • Thaddeus John Gabara
    • H03B5/12H01F27/28
    • H03B5/1841H03B5/1212H03B5/1215H03B5/1221H03B5/1228H03B5/124
    • Placing inductors or resistors in parallel causes the combined value of inductance or resistance to decrease according to the parallel combination rule. This invention decreases the parasitic resistance of an inductor by placing several inductors in parallel. Furthermore, by careful placement of these inductors, the mutual inductance between these inductors can be used to increase the equivalent inductance value to a value near that of the original inductance value of a single inductor. Thus, it is possible to create an inductance with a much lower value of parasitic resistance. This invention allows the formation of high Q inductors and would be beneficial in any circuit design requiring inductances. Another aspect of this invention is that the coils can be partitioned to minimize eddy current losses. This invention can easily be implemented in a planar technology. Simulations of several tank circuits indicate that the power dissipation can be reduced 3 to 4 times when compared to conventional techniques.
    • 电感或电阻并联使得电感或电阻的组合值根据并联组合规则减小。 本发明通过将多个电感器并联放置来降低电感器的寄生电阻。 此外,通过仔细放置这些电感器,可以使用这些电感器之间的互感将等效电感值增加到接近单个电感器的原始电感值的值。 因此,可以产生具有低得​​多的寄生电阻值的电感。 本发明允许形成高Q电感器,并且对于需要电感的任何电路设计将是有益的。 本发明的另一方面是可以将线圈分隔以最小化涡流损耗。 本发明可以容易地在平面技术中实现。 几个电路的仿真表明,与常规技术相比,功耗可以减少3到4倍。