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    • 4. 发明授权
    • Memory control unit and memory control method and medium containing program for realizing the same
    • 存储器控制单元和存储器控制方法以及包含用于实现该程序的介质
    • US06340973B1
    • 2002-01-22
    • US09244036
    • 1999-02-04
    • Toshiyuki OchiaiYosuke FurukawaYutaka TanakaKozo KimuraMakoto HiraiTokuzo KiyoharaHideshi Nishida
    • Toshiyuki OchiaiYosuke FurukawaYutaka TanakaKozo KimuraMakoto HiraiTokuzo KiyoharaHideshi Nishida
    • G06F13372
    • G06F13/1647G11C7/1072G11C7/22
    • A transfer-target unit outputs commands for data reading and data writing. An address generator generates control signals in accordance with the commands, and outputs the number of bytes of data first transferred by read access. A command generator generates control commands in accordance with the control signals to control an SDRAM. At this time the command generator judges the number of transferred bytes to control so that the SDRAM executes instructions in order from an instruction which is the most efficient in data transfer. That is, in the case where data is read across a bank boundary, the command generator judges which is to be executed first between read processing in a bank 0 and active processing in a bank1, to control the SDRAM. A data processor mediates data transfer between the transfer-target unit and the SDRAM in accordance with the control commands. In this way, it is possible to issue commands so as to terminate data transfer in the minimum number of cycles in the case where data read processing is continuously performed to different banks. The number of cycles required for two continuous access (access to the bank 0 and the bank 1) can be thus reduced, thereby increasing effective transfer rates of the SDRAM.
    • 传输目标单元输出用于数据读取和数据写入的命令。 地址生成器根据命令生成控制信号,并输出通过读取访问首先传送的数据的字节数。 命令发生器根据控制信号产生控制命令以控制SDRAM。 此时,命令生成器判断要进行控制的传送字节数,使得SDRAM从数据传输中最有效的指令按顺序执行指令。 也就是说,在通过存储体边界读取数据的情况下,命令生成器判断在存储体0中的读取处理和存储体1中的有效处理之间首先执行哪个,以控制SDRAM。 数据处理器根据控制命令介入转移目标单元和SDRAM之间的数据传输。以这种方式,可以发出命令,以便在数据读取的情况下以最小数量的周期终止数据传输 不断对不同的银行进行处理。 因此可以减少两次连续访问(对存储体0和存储体1的访问)所需的周期数,从而增加SDRAM的有效传输速率。
    • 8. 发明授权
    • Image decoding apparatus
    • 图像解码装置
    • US06212236B1
    • 2001-04-03
    • US09048190
    • 1998-03-25
    • Hideshi NishidaKozo KimuraMakoto HiraiTokuzo Kiyohara
    • Hideshi NishidaKozo KimuraMakoto HiraiTokuzo Kiyohara
    • H04N712
    • H04N19/507H04N19/61
    • Bitstream analyzing unit 111 fetches a coded block pattern and a coded quantized DCT coefficient from each block in a bitstream. Entropy decoding unit 112 decodes the coded block pattern into a block pattern and decodes the coded quantized DCT coefficient into pairs of a run length and an effectiveness factor. Dequantization unit 115 generates orthogonal transformation coefficients from the pairs of a run length and an effectiveness factor. Inverse Discrete Cosine Transform (IDCT) unit 110 generates a difference image from the orthogonal transformation coefficients. Decode controlling unit 110 instructs first selecting unit 118 to select constants “0”output from first constant generating unit 117 when the image is a “skipped” block. Image storage unit 120 stores a plurality of reference frame pictures having been decoded. Image restoring unit 119 restores an original block by adding a decoded difference image to a reference block read from the reference frame pictures stored in the image storage unit 120.
    • 比特流分析单元111从比特流中的每个块获取编码块模式和编码的量化DCT系数。 熵解码单元112将编码块模式解码为块模式,并将编码的量化DCT系数解码为游程长度和有效性因子对。 去量化单元115从游程长度和有效性因子的对生成正交变换系数。 逆离散余弦变换(IDCT)单元110从正交变换系数生成差分图像。 当图像为“跳过”块时,解码控制单元110指示第一选择单元118选择从第一常数生成单元117输出的常数“0”。 图像存储单元120存储已被解码的多个参考帧图像。 图像恢复单元119通过将解码的差异图像添加到从存储在图像存储单元120中的参考帧图像中读取的参考块来恢复原始块。
    • 10. 发明授权
    • Media processing apparatus which operates at high efficiency
    • 以高效率运行的媒体处理装置
    • US06310921B1
    • 2001-10-30
    • US09055583
    • 1998-04-06
    • Kosuke YoshiokaMakoto HiraiTokuzo KiyoharaKozo Kimura
    • Kosuke YoshiokaMakoto HiraiTokuzo KiyoharaKozo Kimura
    • H04N712
    • H04N19/90H04N5/4401H04N21/426H04N21/42607H04N21/42653H04N21/42692H04N21/4302H04N21/4341
    • A media processing apparatus is made up of an I/O processing unit for performing input/output processing which asynchronously occurs due to an external factor and a decode processing unit for performing decode processing mainly for decoding of data streams stored in a memory in parallel with the input/output processing. The input/output processing includes receiving the data streams which are asynchronously inputted, storing the inputted data streams in the memory, and supplying the data streams from the memory to the decode processing unit. The decode processing unit is made up of a sequential processing unit mainly performing condition judgements on the data streams and a routine processing unit performing decode processing on compressed video data aside from header analysis of the compressed video data in parallel with the sequential processing. Accordingly, the input/output processing means and the decode processing means are respectively charged with the asynchronous processing and the decode processing, and the input/output processing means and the decode processing means operate in parallel as in pipeline processing. As a result, the decode processing means can be devoted to the decode processing, regardless of asynchronous processing. Accordingly, processes including input processing of stream data, decode processing of the inputted data, and output processing of decoded data are executed efficiently.
    • 媒体处理装置由用于执行由于外部因素而异步发生的输入/输出处理的I / O处理单元和用于执行主要用于解码存储在存储器中的数据流的解码处理的解码处理单元 输入/输出处理。 输入/输出处理包括接收异步输入的数据流,将输入的数据流存储在存储器中,并将数据流从存储器提供给解码处理单元。 解码处理单元由主要对数据流执行条件判断的顺序处理单元和与压缩视频数据的标题分析相一致的压缩视频数据执行解码处理的例程处理单元构成,与顺序处理并行。 因此,输入/输出处理装置和解码处理装置分别充有异步处理和解码处理,并且输入/输出处理装置和解码处理装置如在流水线处理中并行操作。 结果,无论异步处理如何,解码处理装置都可以用于解码处理。 因此,有效地执行包括流数据的输入处理,输入数据的解码处理和解码数据的输出处理的处理。