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1. 发明申请

US20100327898A1 PROBE CARD AND INSPECTION APPARATUS 有权
标题翻译：探针卡和检查装置
公开(公告)号：US20100327898A1
公开(公告)日：2010-12-30
申请号：US12788874
申请日：2010-05-27
申请人： Tatsuo Ishigaki , Katsuji Hoshi , Akihisa Akahira
发明人： Tatsuo Ishigaki , Katsuji Hoshi , Akihisa Akahira
IPC分类号： G01R31/02
CPC分类号： G01R1/07385 , G01R1/36
摘要： An automatic switching mechanism is controlled by a probe card independent from a tester without limitation of the number of control signals from the tester. A probe card and an inspection apparatus include probes to be brought into contact with electrodes of inspection targets and a power supply channel electrically connecting the probes to a tester. The automatic switching mechanism divides each of the power supply channels into a plurality of power supply wiring portions, which are respectively connected to the probes; and shuts off the power supply wiring responsive to electrical fluctuation such as overcurrent. An electrical fluctuation detection mechanism detects an electrical fluctuation due to a defective product among the inspection targets. A control mechanism, responsive to detection of an electrical fluctuation, shuts off the power supply wiring portion if the electrical fluctuation is caused by the automatic switching mechanism.
摘要翻译：自动切换机构由独立于测试仪的探针卡控制，而不受来自测试仪的控制信号的数量的限制。探针卡和检查装置包括要与检查对象的电极接触的探针和将探针电连接到测试器的电源通道。自动切换机构将各个电源通道分成多个电源配线部分，分别连接到探头; 并且响应于诸如过电流的电波动来关断电源布线。电波动检测机构检测检查对象中的不良品的电波动。如果由自动切换机构引起电气波动，则响应于电波动的检测的控制机构切断电源布线部。

2. 发明授权

US08736292B2 Probe card and inspection apparatus 有权
标题翻译：探头卡和检测仪器
公开(公告)号：US08736292B2
公开(公告)日：2014-05-27
申请号：US12788874
申请日：2010-05-27
申请人： Tatsuo Ishigaki , Katsuji Hoshi , Akihisa Akahira
发明人： Tatsuo Ishigaki , Katsuji Hoshi , Akihisa Akahira
IPC分类号： G01R31/02
CPC分类号： G01R1/07385 , G01R1/36
摘要： An automatic switching mechanism is controlled by a probe card independent from a tester without limitation of the number of control signals from the tester. A probe card and an inspection apparatus include probes to be brought into contact with electrodes of inspection targets and a power supply channel electrically connecting the probes to a tester. The automatic switching mechanism divides each of the power supply channels into a plurality of power supply wiring portions, which are respectively connected to the probes; and shuts off the power supply wiring responsive to electrical fluctuation such as overcurrent. An electrical fluctuation detection mechanism detects an electrical fluctuation due to a defective product among the inspection targets. A control mechanism, responsive to detection of an electrical fluctuation, shuts off the power supply wiring portion if the electrical fluctuation is caused by the automatic switching mechanism.
摘要翻译：自动切换机构由独立于测试仪的探针卡控制，而不受来自测试仪的控制信号的数量的限制。探针卡和检查装置包括要与检查对象的电极接触的探针和将探针电连接到测试器的电源通道。自动切换机构将各个电源通道分成多个电源配线部分，分别连接到探头; 并且响应于诸如过电流的电波动来关断电源布线。电波动检测机构检测检查对象中的不良品的电波动。如果由自动切换机构引起电气波动，则响应于电波动的检测的控制机构切断电源布线部。

3. 发明授权

US08508247B2 Electrical connecting apparatus 有权
标题翻译：电气连接装置
公开(公告)号：US08508247B2
公开(公告)日：2013-08-13
申请号：US12698058
申请日：2010-02-01
申请人： Katsuji Hoshi , Akihisa Akahira , Yoshinori Kikuchi
发明人： Katsuji Hoshi , Akihisa Akahira , Yoshinori Kikuchi
IPC分类号： G01R31/20
CPC分类号： H01R13/2442 , G01R1/06727 , G01R31/2886 , H01R2201/20
摘要： An embodiment of an electrical connecting apparatus comprises a probe base plate and a plurality of contacts provided with tips to be pressed against electrodes of a device under test and arranged on the underside of the probe base plate. The distance dimensions from an imaginary plane parallel to the probe base plate to the tips of the contacts are made the greater toward the center of the probe base plate.
摘要翻译：电连接装置的一个实施例包括探针基板和多个触点，其具有被压靠在被测器件的电极上并设置在探针基板的下侧上的尖端。使从平行于探针基板的虚拟平面到触点顶端的距离尺寸朝向探针基板的中心越大。

4. 发明授权

US4943738A Digital signal input buffer circuit having a simple construction and capable of retaining data 失效
标题翻译：数字信号输入缓冲电路具有简单的结构并能保留数据
公开(公告)号：US4943738A
公开(公告)日：1990-07-24
申请号：US291886
申请日：1988-12-29
申请人： Katsuji Hoshi
发明人： Katsuji Hoshi
IPC分类号： G11C11/413 , G11C7/06 , G11C7/10 , G11C7/14 , G11C11/408 , H03K5/08 , H03K19/0185
CPC分类号： G11C7/1087 , G11C7/065 , G11C7/1078 , G11C7/14
摘要： An input buffer circuit includes a flipflop circuit and receives an input voltage signal and a reference voltage to amplify a difference between the input voltage signal and the reference voltage in response to an activation signal. The input buffer circuit comprises first and second transistors having their sources commonly connected to a first node and their drains coupled to a pair of inputs of the flipflop circuit, respectively. A gate of the first transistor is connected to receive the input voltage signal and a gate of the second transistor is connected to receive the reference voltage. A capacitor is connected at its one end to the first node and at its other end to a second node. There is provided a bias control circuit having an output connected to the second node and operating to respond to a precharge signal so as to bring the second node to a first level and to respond to the activation signal so as to bring the second node to a second level lower than the first level, so that the potential of the first node is consequentially lowered when the input buffer circuit executes the comparison operation in response to the activation signal and a current flowing through the first and second transistors is blocked by the capacitor.

5. 发明授权

US4375596A Reference voltage generator circuit 失效
标题翻译：参考电压发生器电路
公开(公告)号：US4375596A
公开(公告)日：1983-03-01
申请号：US208458
申请日：1980-11-19
申请人： Katsuji Hoshi
发明人： Katsuji Hoshi
IPC分类号： H03K19/00 , G05F3/24 , H03K17/14 , H03K17/30 , H02J1/04 , H03L1/00
CPC分类号： H03K17/14 , G05F3/247
摘要： A reference voltage generator circuit which can operate stably irrespective of variations in a power supply voltage and in threshold voltage of transistors employed is disclosed. The reference voltage generator circuit comprises means for dividing a power supply voltage to produce at least one internal voltage, first means responsive to an internal voltage from the dividing means for producing a first output signal having such a response characteristic that the first output signal is increased in value in response to an increase in voltage difference between the internal voltage applied thereto and the threshold voltage, second means responsive to an internal voltage from the dividing means for producing a second output signal having such a response characteristic that the second output signal is decreased in value in response to an increase in voltage difference between the internal voltage applied thereto and the threshold voltage and means averaging the first and the second output signal thereby the generate a constant value of reference voltage.
摘要翻译：公开了可以稳定地操作的参考电压发生器电路，而不管所用晶体管的电源电压和阈值电压的变化。参考电压发生器电路包括用于分割电源电压以产生至少一个内部电压的装置，第一装置响应于来自分割装置的内部电压产生具有第一输出信号增加的具有这种响应特性的第一输出信号响应于施加到其上的内部电压之间的电压差的增加和阈值电压的第二装置，响应于来自分割装置的内部电压的第二装置产生具有第二输出信号减小的响应特性的第二输出信号响应于施加到其上的内部电压和阈值电压之间的电压差的增加而导致的值的值，以及对第一和第二输出信号进行平均的装置，从而产生参考电压的恒定值。

6. 发明授权

US5150329A Dynamic memory with a refresh control circuit 失效
标题翻译：具有刷新控制电路的动态存储器
公开(公告)号：US5150329A
公开(公告)日：1992-09-22
申请号：US555697
申请日：1990-07-23
申请人： Katsuji Hoshi
发明人： Katsuji Hoshi
IPC分类号： G11C11/406 , G11C11/4074 , G11C11/4076
CPC分类号： G11C11/406 , G11C11/4074 , G11C11/4076
摘要： The dynamic memory of the present invention allows refresh operations with low power consumption and with easy control. The dynamic memory includes a detection circuit which detects a decrease in the power voltage source and a control circuit to automatically refresh a memory cell in response to the detected signal.

7. 发明授权

US5029137A Semiconductor memory device with tandem sense amplifier units 失效
标题翻译：具有串联读出放大器单元的半导体存储器件
公开(公告)号：US5029137A
公开(公告)日：1991-07-02
申请号：US441662
申请日：1989-11-27
申请人： Katsuji Hoshi
发明人： Katsuji Hoshi
IPC分类号： G11C11/409 , G11C7/06 , G11C11/4091
CPC分类号： G11C11/4091 , G11C7/065
摘要： A semiconductor memory device is used for storing data bits in memory cells thereof, and the data bits are read out from the memory cells in the form of small differences in voltage level on bit line pairs coupled to the memory cells, wherein gate transistors are inserted between each of the bit line pairs and a pair of sense nodes, and in which the bit line pair and the sense node pair are respectively associated with first and second sense amplifier circuits for rapidly increasing the small difference in voltage level, because the electric charges accumulated in the bit line pair are shared by the first and second sense amplifier circuits.
摘要翻译：半导体存储器件用于将数据位存储在其存储器单元中，并且数据位以耦合到存储器单元的位线对上的电压电平的小差异的形式从存储器单元读出，其中栅极晶体管被插入在每个位线对和一对感测节点之间，并且其中位线对和感测节点对分别与第一和第二读出放大器电路相关联，用于快速增加电压电平的小差异，因为电荷累积在位线对中的第一和第二读出放大器电路共享。

8. 发明授权

US4617647A Memory circuit 失效
标题翻译：存储电路
公开(公告)号：US4617647A
公开(公告)日：1986-10-14
申请号：US561371
申请日：1983-12-14
申请人： Katsuji Hoshi
发明人： Katsuji Hoshi
IPC分类号： G11C11/417 , G11C7/00 , G11C7/22 , G11C11/407
CPC分类号： G11C7/22
摘要： A memory circuit which can perform a write operation at a high-speed is disclosed. The memory circuit has an input circuit receiving an external read-write signal which has a direct connection to a terminal receiving a chip control signal such as a column address strobe signal and is adapted to be directly controlled by the chip control signal itself.
摘要翻译：公开了一种能高速执行写操作的存储电路。存储电路具有接收外部读写信号的输入电路，其与接收诸如列地址选通信号的芯片控制信号的终端直接连接，并且适于由芯片控制信号本身直接控制。

9. 发明申请

US20100230161A1 Joint Structure Between a Wound Coil and An IC-Chip for a Noncontact RFID Device and Methods of Manufacturing The Same 审中-公开
标题翻译：用于非接触式RFID装置的绕线线圈和IC芯片之间的联合结构及其制造方法
公开(公告)号：US20100230161A1
公开(公告)日：2010-09-16
申请号：US12225293
申请日：2007-03-28
申请人： Katsuji Hoshi
发明人： Katsuji Hoshi
IPC分类号： H01R4/02 , B23K1/00 , B23K11/00 , B23K31/02 , H01R4/62
CPC分类号： H01L24/48 , H01L23/49855 , H01L24/05 , H01L24/45 , H01L24/80 , H01L24/85 , H01L2224/04042 , H01L2224/05082 , H01L2224/05155 , H01L2224/05157 , H01L2224/05166 , H01L2224/05184 , H01L2224/05639 , H01L2224/05644 , H01L2224/45015 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/4569 , H01L2224/48458 , H01L2224/48471 , H01L2224/48639 , H01L2224/48644 , H01L2224/48739 , H01L2224/48839 , H01L2224/48844 , H01L2224/7825 , H01L2224/78282 , H01L2224/78313 , H01L2224/85201 , H01L2224/85203 , H01L2224/85205 , H01L2224/85214 , H01L2224/85238 , H01L2924/00011 , H01L2924/00015 , H01L2924/01005 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01057 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01204 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H01L2924/15747 , H01L2924/19042 , H01L2924/00014 , H01L2924/00 , H01L2224/48744 , H01L2924/20755 , H01L2924/20756 , H01L2924/2075 , H01L2924/20754 , H01L2924/069 , H01L2924/01049 , H01L2924/01006
摘要： The present invention aims to provide such a joint structure of a wound coil 1 and an IC chip 2 for a noncontact RFID device that is able to yield electrically and mechanically excellent connection, employing the wound coil 1, which is made by winding copper electric wire, with small variance of the electric resistance as an antenna coil for the noncontact RFID device, also by making use of such IC chips that their joint terminals 3 are covered with such metallization of the gold outermost layer 3a that is not liable to degradation during storage; and aims to provide such a method of joining the wound coil 1 and the IC chip 2 for the noncontact RFID device that is able to make said joint structure with ease and certainty, through selecting a direct joining process low in production cost as the joining method of the two, also through improving the process.
摘要翻译：本发明的目的是提供一种用于非接触式RFID器件的绕线线圈1和IC芯片2的接合结构，该非接触式RFID器件能够通过缠绕铜电线，作为非接触式RFID器件的天线线圈的电阻变化小，也通过利用这样的IC芯片，使得它们的接合端子3被金存储的金最外层3a覆盖，该金最外层3a在存储期间不易劣化 ; 并且旨在提供这样的方法：通过选择生产成本低的直接接合方法作为接合方法，能够容易地和确定地接合用于非接触RFID装置的绕线线圈1和IC芯片2 的两个，也通过改进过程。

10. 发明授权

US4937479A Data latch circuit with improved data write control function 失效
标题翻译：数据锁存电路具有改进的数据写控制功能
公开(公告)号：US4937479A
公开(公告)日：1990-06-26
申请号：US303877
申请日：1989-01-30
申请人： Katsuji Hoshi
发明人： Katsuji Hoshi
IPC分类号： G11C11/417 , G11C11/408 , H03K3/356 , H03K5/08 , H03K19/0185
CPC分类号： H03K3/356043
摘要： A latch circuit includes a current source, and a flip-flop amplifier circuit having a pair of first and second input terminals for comparing a reference voltage and an external input voltage with each other and amplifying the voltage difference therebetween in response to inputting of an activating signal. A first transistor has a source terminal, a drain terminal connected to the first input terminal of the flip-flop amplification circuit, and a gate terminal receptive of the external input voltage. A second transistor has a source terminal connected to the source terminal of the first transistor, a drain terminal connected to the second input terminal of the flip-flop amplification circuit, and a gate terminal receptive of the reference voltage. A pair of gate elements are connected in series between the sources of the first and second transistors and the current source, and operate after the completion of amplification of the voltage difference in the flip-flop amplifier circuit for cutting off a drain current flowing through the first and second transistors so as to enable the flip-flop amplifier circuit to latch the external input voltage.
摘要翻译：锁存电路包括电流源和具有一对第一和第二输入端的触发放大器电路，用于将参考电压与外部输入电压进行比较，并且响应于激活的输入而放大其间的电压差信号。第一晶体管具有源极端子，连接到触发器放大电路的第一输入端子的漏极端子和接受外部输入电压的栅极端子。第二晶体管具有连接到第一晶体管的源极端子的源极端子，连接到触发器放大电路的第二输入端子的漏极端子和接受参考电压的栅极端子。一对栅极元件串联连接在第一和第二晶体管的源极和电流源之间，并且在触发器放大器电路中的电压差的放大完成之后工作，以切断流经第一和第二晶体管，以使触发器放大器电路能够锁存外部输入电压。

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