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1. 发明授权

US5217849A Process for making a two-layer film carrier 失效
标题翻译：制备两层薄膜载体的方法
公开(公告)号：US5217849A
公开(公告)日：1993-06-08
申请号：US837104
申请日：1992-02-18
申请人： Takeshi Chonan , Yoshihiro Hirota , Yuko Kudo
发明人： Takeshi Chonan , Yoshihiro Hirota , Yuko Kudo
IPC分类号： H01L21/48 , H01L23/495 , H05K1/03 , H05K3/00 , H05K3/10 , H05K3/40
CPC分类号： H05K3/002 , H01L21/4846 , H01L23/49572 , H05K3/4092 , H01L2924/0002 , H01L2924/3011 , H05K1/0346 , H05K2201/0154 , H05K2201/0166 , H05K3/108
摘要： A two-layer film carrier for TAB is made from a substrate prepared by forming a copper layer on a polyimide film by additive plating. A photoresist layer is formed on the copper layer, and another photoresist layer on the polyimide film. Both of the photoresist layers are simultaneously exposed to light through a mask applied to each of them to define a desired pattern. The exposed portions of the photoresist layer on the copper layer are subjected to development and postbaking, whereby selected portions of the copper layer are exposed. The exposed portions of the copper layer are additive plated with copper, whereby leads are formed. The exposed portions of the photoresist layer on the polyimide film are subjected to development and postbaking, whereby selected portions of the polyimide film are exposed. The remaining portions of the photoresist layer are removed from the copper layer and the underlying copper layer is etched. The exposed portions of the polyimide film are etched, and the remaining portions of the photoresist layer are removed from the polyimide film.
摘要翻译：用于TAB的双层膜载体由通过添加电镀在聚酰亚胺膜上形成铜层而制备的基板制成。在铜层上形成光致抗蚀剂层，在聚酰亚胺膜上形成另一个光致抗蚀剂层。通过施加到其中的每一个的掩模，两个光致抗蚀剂层同时暴露于光以限定期望的图案。对铜层上的光致抗蚀剂层的暴露部分进行显影和后烘烤，由此露出铜层的选定部分。铜层的露出部分用铜添加电镀，由此形成引线。对聚酰亚胺膜上的光致抗蚀剂层的暴露部分进行显影和后烘烤，由此暴露聚酰亚胺膜的选定部分。光致抗蚀剂层的其余部分从铜层去除并且下面的铜层被蚀刻。蚀刻聚酰亚胺膜的露出部分，将光刻胶层的其余部分从聚酰亚胺膜中除去。

2. 发明授权

US08241982B2 Semiconductor device manufacturing method 有权
标题翻译：半导体器件制造方法
公开(公告)号：US08241982B2
公开(公告)日：2012-08-14
申请号：US12942057
申请日：2010-11-09
申请人： Yoshihiro Hirota , Yoshihiro Sato , Nobuo Okumura
发明人： Yoshihiro Hirota , Yoshihiro Sato , Nobuo Okumura
IPC分类号： H01L21/336
CPC分类号： H01L27/11521 , H01L21/0214 , H01L21/02332 , H01L21/28273 , H01L21/31111 , H01L21/3144 , H01L21/3211 , H01L21/76232 , H01L29/42336 , H01L29/7881
摘要： A plasma nitriding process is followed by a selective etching process which removes a silicon oxynitride film formed on surfaces of both an element separation film and an insulation film while leaving a silicon nitride film formed on an electrode layer. The selective etching process removes the silicon oxynitride film formed on the surfaces of the element separation film and the insulation film.
摘要翻译：等离子体氮化处理之后是选择性蚀刻工艺，其除去在元件分离膜和绝缘膜的表面上形成的氮氧化硅膜，同时留下形成在电极层上的氮化硅膜。选择性蚀刻工艺除去在元件分离膜和绝缘膜的表面上形成的氧氮化硅膜。

3. 发明申请

US20070181928A1 Capacitor and manufacturing method thereof 有权
标题翻译：电容器及其制造方法
公开(公告)号：US20070181928A1
公开(公告)日：2007-08-09
申请号：US11508141
申请日：2006-08-23
申请人： Yoshiki Yamanishi , Muneo Harada , Takahiro Kitano , Tatsuzo Kawaguchi , Yoshihiro Hirota , Kinji Yamada , Tomotaka Shinoda , Katsuya Okumura , Shuichi Kawano
发明人： Yoshiki Yamanishi , Muneo Harada , Takahiro Kitano , Tatsuzo Kawaguchi , Yoshihiro Hirota , Kinji Yamada , Tomotaka Shinoda , Katsuya Okumura , Shuichi Kawano
IPC分类号： H01L29/94
CPC分类号： H01L23/50 , H01G4/228 , H01G4/33 , H01L23/481 , H01L24/81 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01056 , H01L2924/01072 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/19041 , H01L2924/30105 , H05K1/162 , H05K3/002 , H05K2201/09509 , H05K2201/096 , H05K2201/10378
摘要： A capacitor having a high quality and a manufacturing method of the same are provided. A capacitor has a lower electrode formed on an oxide film, a dielectric layer formed on the lower electrode, an upper electrode formed so as to face the lower electrode with the dielectric layer between, and an upper electrode formed so as to cover the upper electrode, an opening portion of the upper electrode and an opening portion of the dielectric layer. By forming the upper electrode on the dielectric layer, it is possible to pattern the dielectric layer by using the upper electrode as a mask, and provide a capacitor having a high-quality dielectric layer by preventing impurity diffusion into the dielectric layer. By forming the upper electrode on the dielectric layer, it is possible to prevent the dielectric layer from being exposed to etching liquid, liquid developer, etc.
摘要翻译：提供了具有高质量的电容器及其制造方法。电容器具有形成在氧化膜上的下电极，形成在下电极上的电介质层，形成为与电极之间介电层相对的下电极的上电极和形成为覆盖上电极的上电极，上电极的开口部分和电介质层的开口部分。通过在电介质层上形成上电极，可以通过使用上电极作为掩模对电介质层进行图案化，并且通过防止杂质扩散到电介质层中来提供具有高质量电介质层的电容器。通过在电介质层上形成上部电极，可以防止电介质层暴露于蚀刻液体，液体显影剂等

4. 发明申请

US20070126041A1 Dielectric film capacitor and method of manufacturing the same 有权
标题翻译：介电薄膜电容器及其制造方法
公开(公告)号：US20070126041A1
公开(公告)日：2007-06-07
申请号：US11508204
申请日：2006-08-23
申请人： Tomotaka Shinoda , Kinji Yamada , Takahiro Kitano , Yoshiki Yamanishi , Muneo Harada , Tatsuzo Kawaguchi , Yoshihiro Hirota , Katsuya Okumura , Shuichi Kawano
发明人： Tomotaka Shinoda , Kinji Yamada , Takahiro Kitano , Yoshiki Yamanishi , Muneo Harada , Tatsuzo Kawaguchi , Yoshihiro Hirota , Katsuya Okumura , Shuichi Kawano
IPC分类号： H01L29/94 , H01L21/00
CPC分类号： H01L28/65 , H01L27/11507 , H01L28/55 , Y10T29/435
摘要： A dielectric film capacitor includes a lower electrode having an opening and formed of a material including platinum, a dielectric film provided over the lower electrode and including an oxide having an ABOx crystal structure, and an upper electrode provided over the dielectric film. The planar area of the lower electrode is 50% or more of the area of a formation region of the dielectric film. A dielectric film capacitor includes a lower electrode formed of a material including platinum and having a thickness of 10 to 100 nm, a dielectric film provided over the lower electrode and including an oxide having an ABOx crystal structure, and an upper electrode provided over the dielectric film.
摘要翻译：电介质膜电容器包括具有开口并由包括铂的材料形成的下电极，设置在下电极上并包括具有ABOx晶体结构的氧化物的电介质膜和设置在电介质膜上的上电极。下部电极的平面面积为电介质膜的形成区域的面积的50％以上。电介质膜电容器包括由包括铂的材料形成的厚度为10至100nm的下电极，设置在下电极上并包括具有ABOx晶体结构的氧化物的电介质膜，以及设置在电介质上的上电极电影。

5. 发明授权

US07161360B2 Electrostatic capacitance sensor, electrostatic capacitance sensor component, object mounting body and object mounting apparatus 有权
标题翻译：静电电容传感器，静电电容传感器部件，物体安装体和物体安装装置
公开(公告)号：US07161360B2
公开(公告)日：2007-01-09
申请号：US11002070
申请日：2004-12-03
申请人： Yoshihiro Hirota , Toshiyuki Matsumoto , Tatsuo Hiroshima
发明人： Yoshihiro Hirota , Toshiyuki Matsumoto , Tatsuo Hiroshima
IPC分类号： G01R27/26
CPC分类号： H03K17/955 , G01D5/2405 , H03K2217/960765
摘要： An electrostatic capacitance sensor, includes an electrostatic capacitance detector, an operational amplifier in which a feedback impedance circuit is connected between an output terminal and an inverse input terminal of the operational amplifier, a signal line connected between the inverse input terminal of the operational amplifier and the electrostatic capacitance detector, an alternating-current signal generator connected to a non-inverse input terminal of the operational amplifier, and a shield for shielding at least a portion of the signal line, the shield being connected to the non-inverse input terminal of the operational amplifier and the alternating-current signal generator. The electrostatic capacitance detector includes a detecting electrode and a shield electrode. The detecting electrode includes a detector-detecting electrode for detecting an object to be detected and an electrode introducer-detecting electrode for introducing an electrode to the detector-detecting electrode. The shield electrode is connected to the shield. At least a portion of the electrode introducer-detecting electrode is shielded by the shield electrode.
摘要翻译：一种静电电容传感器，包括静电电容检测器，其中反馈阻抗电路连接在运算放大器的输出端和反相输入端之间的运算放大器，连接在运算放大器的反相输入端和所述静电电容检测器，连接到所述运算放大器的非反相输入端的交流信号发生器和用于屏蔽所述信号线的至少一部分的屏蔽，所述屏蔽连接到所述运算放大器的非反相输入端运算放大器和交流信号发生器。静电电容检测器包括检测电极和屏蔽电极。检测电极包括用于检测待检测物体的检测器检测电极和用于将电极引入检测器检测电极的电极引导器检测电极。屏蔽电极连接到屏蔽。电极引导器检测电极的至少一部分被屏蔽电极屏蔽。

6. 发明授权

US07026504B2 Process for preparing alkyladamantyl esters and compositions 失效
标题翻译：烷基金刚烷酯和组合物的制备方法
公开(公告)号：US07026504B2
公开(公告)日：2006-04-11
申请号：US10470126
申请日：2001-01-26
申请人： Masao Yamaguchi , Hiromasa Yamamoto , Hideki Kikuchi , Yoshihiro Hirota
发明人： Masao Yamaguchi , Hiromasa Yamamoto , Hideki Kikuchi , Yoshihiro Hirota
IPC分类号： C07C69/52
CPC分类号： C07C67/60 , C07C2603/74 , G03F7/0397 , C07C69/54 , C07C69/013
摘要： There is provided a method for obtaining a high-purity alkyladamantyl ester from an alkyladamantyl ester composition containing a large quantity of alkyladamantyl halide obtained by, for example, alkylating raw material 2-adamantanone obtained through oxidation of adamantane by use of an organic metal reagent and then causing an acid halide to react with the resulting product, efficiently by a simple process. To an alkyladamantyl ester composition containing an alkyladamantyl halide such as 2-chloro-2-methyladamantane in an amount of larger than 0.5 parts by weight based on 100 parts by weight of alkyladamantyl ester such as 2-methyl-2-adamantyl methacrylate, a mixed solution of, for example, methanol and a sodium hydroxide aqueous solution is added. By bringing the alkali compound into contact with the alkyladamantyl halide in a homogeneous system so as to convert the halide into a compound which produces no acid when heated, the amount of the alkyladamantyl halide in the composition is reduced to 0.5 parts by weight or less based on 100 parts by weight of the alkyladamantyl ester, after which distillation is carried out.
摘要翻译：提供了一种从含有大量烷基金刚烷基卤化物的烷基金刚烷基酯组合物中获得高纯度烷基金刚烷基酯的方法，所述烷基金刚烷基酯通过使用有机金属试剂将金刚烷氧化而得到的原料2-金刚烷烷化，然后通过简单的方法使酰基卤与所得产物反应。对于基于100重量份的烷基金刚烷基酯如甲基丙烯酸2-甲基-2-金刚烷基酯，含有烷基金刚烷基卤化物如2-氯-2-甲基金刚烷的量大于0.5重量份的烷基金刚烷基酯组合物，混合加入例如甲醇和氢氧化钠水溶液的溶液。通过使碱性化合物与均匀体系中的烷基金刚烷基卤化物接触，以便将卤化物转化为加热时不产生酸的化合物，组合物中烷基金刚烷基卤化物的量降低至基于0.5重量份或更少在100重量份的烷基金刚烷基酯上进行蒸馏。

7. 发明授权

US06348809B1 Microscopic capacitance measurement system and probing system 有权
标题翻译：显微电容测量系统和探测系统
公开(公告)号：US06348809B1
公开(公告)日：2002-02-19
申请号：US09371546
申请日：1999-08-10
申请人： Yoshihiro Hirota , Toshiyuki Matsumoto
发明人： Yoshihiro Hirota , Toshiyuki Matsumoto
IPC分类号： G01R3126
CPC分类号： G01R27/2605
摘要： There is provided a probing and measurement system for measuring a capacitance value of a capacitance to be measured, by removing any influence made by a parasitic capacitance and a fluctuation thereof within a shield box 11. The probing and measurement system comprises a prober 1, a signal line having one end to be in contact with a sample to be measured, a shield line surrounding the signal line, and a capacitance measurement circuit 6. The capacitance measurement circuit 6 comprises an operational amplifier 61 having an inverting input terminal connected to the other end of the signal line and a non-inverting input terminal connected to the shield line, wherein an imaginary short state exists between the inverting input terminal and the non-inverting input terminal, and wherein a signal having a value corresponding to an electrostatic capacitance of the sample to be measured is outputted when an AC signal is applied to the non-inverting input terminal. Conductive portions of the shield box 11, conductive portions of a stand 13, a surface of the stand which contacts with the sample to be measured, and the shield line are placed at the same electric potential.
摘要翻译：提供了一种用于测量待测电容的电容值的探测和测量系统，通过消除由屏蔽盒11内的寄生电容及其波动引起的任何影响。探测和测量系统包括探测器1，信号线，其一端与要测量的样本接触，围绕信号线的屏蔽线以及电容测量电路6.电容测量电路6包括运算放大器61，其具有与另一个连接的反相输入端信号线的端部和连接到屏蔽线的非反相输入端子，其中在反相输入端子和非反相输入端子之间存在虚拟短路状态，并且其中具有对应于静电电容值的信号当将AC信号施加到非反相输入端时，输出要测量的样本。屏蔽盒11的导电部分，支架13的导电部分，与待测样品接触的支架的表面和屏蔽线放置在相同的电位。

8. 发明授权

US08258571B2 MOS semiconductor memory device having charge storage region formed from stack of insulating films 有权
标题翻译：具有由堆叠的绝缘膜形成的电荷存储区域的MOS半导体存储器件
公开(公告)号：US08258571B2
公开(公告)日：2012-09-04
申请号：US12665534
申请日：2008-06-20
申请人： Tetsuo Endoh , Masayuki Kohno , Tatsuo Nishita , Minoru Honda , Toshio Nakanishi , Yoshihiro Hirota
发明人： Tetsuo Endoh , Masayuki Kohno , Tatsuo Nishita , Minoru Honda , Toshio Nakanishi , Yoshihiro Hirota
IPC分类号： H01L29/792
CPC分类号： H01L29/792 , C23C16/308 , C23C16/345 , G11C11/5628 , G11C16/0466 , H01L27/11568 , H01L27/11578 , H01L27/11582 , H01L29/4234 , H01L29/513 , H01L29/7926
摘要： The invention provides a MOS semiconductor memory device that achieves excellent data retention characteristics while also achieving high-speed data write performance, low-power operation performance, and high reliability. A MOS semiconductor memory device 601 includes a first insulating film 111 and fifth insulating film 115 having large bandgaps 111a and 115a, a third insulating film 113 having the smallest bandgap 113a, and a second insulating film 112 and fourth insulating film 114 interposed between the third insulating film 113 and the first and fifth insulating films 111 and 115, respectively, and having intermediate bandgaps 112a and 114a.
摘要翻译：本发明提供一种实现优异的数据保持特性的MOS半导体存储器件，同时还实现了高速数据写入性能，低功率操作性能和高可靠性。 MOS半导体存储器件601包括具有较大带隙111a和115a的第一绝缘膜111和第五绝缘膜115，具有最小带隙113a的第三绝缘膜113和介于第三绝缘膜113之间的第二绝缘膜112和第四绝缘膜114。绝缘膜113和第一和第五绝缘膜111和115，并具有中间带隙112a和114a。

9. 发明授权

US08076892B2 Stator position adjustment method, motor drive device and stator position adjustment system 有权
标题翻译：定子位置调整方式，电机驱动装置和定子位置调整系统
公开(公告)号：US08076892B2
公开(公告)日：2011-12-13
申请号：US12078712
申请日：2008-04-03
申请人： Yasunori Oguri , Tomotaka Murakami , Yoshihiro Hirota , Akira Isogai , Takehito Jinno , Akira Takasaki , Tatsuhiko Mizutani , Hiroyuki Hattori
发明人： Yasunori Oguri , Tomotaka Murakami , Yoshihiro Hirota , Akira Isogai , Takehito Jinno , Akira Takasaki , Tatsuhiko Mizutani , Hiroyuki Hattori
IPC分类号： G05B1/06
CPC分类号： H02K15/16 , H02K5/15 , Y10T29/49009 , Y10T29/49718
摘要： A stator position adjustment method for a motor drive device that includes a motor case, a rotor shaft supported by the motor case in order to rotate a rotor inside the motor case, and a stator disposed at an outer circumference of the rotor concentrically with the rotor and having a configuration in which the stator is tightened and secured to the motor case by a tightening unit that tightens the stator along a rotor axis. The method includes the steps of setting a first tolerance range as a maximum tolerance range of a stator axis in which a first gap is formed between an outer circumference surface of the stator and an inner circumference surface of the motor case; measuring a position of the stator axis; and adjusting the position of the stator axis within the first tolerance range based on a measured position of the stator axis.
摘要翻译：一种电动机驱动装置的定子位置调整方法，其特征在于，包括电动机壳体，由所述电动机壳体支撑的转子轴，以使所述电动机壳体内的转子旋转;以及定子，其与所述转子同心地配置在所述转子的外周并且具有其中定子被紧固并通过沿转子轴线紧固定子的紧固单元固定到电动机壳体的构造。该方法包括以下步骤：将第一公差范围设定为在定子的外周面与电动机壳体的内周面之间形成有第一间隙的定子轴的最大公差范围; 测量定子轴的位置; 以及基于所述定子轴的测量位置来调整所述定子轴在所述第一公差范围内的位置。

10. 发明授权

US07742277B2 Dielectric film capacitor and method of manufacturing the same 有权
标题翻译：介电薄膜电容器及其制造方法
公开(公告)号：US07742277B2
公开(公告)日：2010-06-22
申请号：US11508204
申请日：2006-08-23
申请人： Tomotaka Shinoda , Kinji Yamada , Takahiro Kitano , Yoshiki Yamanishi , Muneo Harada , Tatsuzo Kawaguchi , Yoshihiro Hirota , Katsuya Okumura , Shuichi Kawano
发明人： Tomotaka Shinoda , Kinji Yamada , Takahiro Kitano , Yoshiki Yamanishi , Muneo Harada , Tatsuzo Kawaguchi , Yoshihiro Hirota , Katsuya Okumura , Shuichi Kawano
IPC分类号： H01G4/06 , H01G4/005
CPC分类号： H01L28/65 , H01L27/11507 , H01L28/55 , Y10T29/435
摘要： A dielectric film capacitor includes a lower electrode having an opening and formed of a material including platinum, a dielectric film provided over the lower electrode and including an oxide having an ABOx crystal structure, and an upper electrode provided over the dielectric film. The planar area of the lower electrode is 50% or more of the area of a formation region of the dielectric film. A dielectric film capacitor includes a lower electrode formed of a material including platinum and having a thickness of 10 to 100 nm, a dielectric film provided over the lower electrode and including an oxide having an ABOx crystal structure, and an upper electrode provided over the dielectric film.
摘要翻译：电介质膜电容器包括具有开口并由包括铂的材料形成的下电极，设置在下电极上并包括具有ABOx晶体结构的氧化物的电介质膜和设置在电介质膜上的上电极。下部电极的平面面积为电介质膜的形成区域的面积的50％以上。电介质膜电容器包括由包括铂的材料形成的厚度为10至100nm的下电极，设置在下电极上并包括具有ABOx晶体结构的氧化物的电介质膜，以及设置在电介质上的上电极电影。

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