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1. 发明授权

US4860316A Multilevel amplitude modulation and demodulation communication system 失效
标题翻译：多电平幅度调制和解调通信系统
公开(公告)号：US4860316A
公开(公告)日：1989-08-22
申请号：US156755
申请日：1988-02-18
申请人： Sadao Takenaka , Yoshihito Aono , Takanori Iwamatsu , Morihiko Minowa , Yoshimasa Daido , Hiroshi Nakamura
发明人： Sadao Takenaka , Yoshihito Aono , Takanori Iwamatsu , Morihiko Minowa , Yoshimasa Daido , Hiroshi Nakamura
IPC分类号： H04L27/34
CPC分类号： H04L27/3411
摘要： A digital communication system using a QAM signal and a honeycomb constellation multilevel signal. The digital communication system includes a modulator having a unit for transforming in-phase and quadrature-phase data arranged in a quadrature lattice constellation into two data arranged in a honeycomb constellation, and a unit for amplitude-modulating the transformed data. A demodulator demodulates a transmitted signal output from the modulator.

2. 发明授权

US4912726A Decision timing control circuit 失效
标题翻译：决策定时控制电路
公开(公告)号：US4912726A
公开(公告)日：1990-03-27
申请号：US247444
申请日：1988-08-31
申请人： Takanori Iwamatsu , Yoshihito Aono , Morihiko Minowa , Sadao Takenaka
发明人： Takanori Iwamatsu , Yoshihito Aono , Morihiko Minowa , Sadao Takenaka
IPC分类号： H04L7/02 , H04L7/033
CPC分类号： H04L7/0062 , H04L7/0334
摘要： The present invention relates to a circuit which controls the decision timing for deciding multi-level signal to the optimum decision timing. The control is carried out in such a manner as reducing deviation of phase of decision clock by deciding slope of multi-level signal at the center decision timing from the decision data at least continuous three decision timings and deciding deviation of decision timing from the slope and error signal at the center decision timing. Moreover, two kinds of slope decision are realized and the desired slope decision can be selected in accordance with the line condition.
摘要翻译： PCT No.PCT / JP88 / 00013 Sec。 371日期1988年8月31日 102（e）日期1988年8月31日PCT提交1988年1月8日PCT公布。出版物WO88 / 05235 日期：1988年7月14日。本发明涉及一种电路，其控制用于将多电平信号判定为最佳判定定时的判定定时。以至少连续的三个决定定时从决策数据决定中心判定时刻的多电平信号的斜率，决定判定时钟偏离斜率的判定时间的偏差，中心决策时刻的误差信号。此外，实现了两种斜率决定，并且可以根据线路条件选择期望的斜率决定。

3. 发明授权

US5005186A Digital demodulator apparatus 失效
标题翻译：数字解调器装置
公开(公告)号：US5005186A
公开(公告)日：1991-04-02
申请号：US265459
申请日：1988-10-13
申请人： Yoshihito Aono , Takanori Iwamatsu , Morihiko Minowa , Sadao Takenaka , Yoshimasa Daidoh , Hiroshi Nakamura , Nobutsugu Fujino
发明人： Yoshihito Aono , Takanori Iwamatsu , Morihiko Minowa , Sadao Takenaka , Yoshimasa Daidoh , Hiroshi Nakamura , Nobutsugu Fujino
IPC分类号： H04L27/34 , H04L27/38
CPC分类号： H04L27/38
摘要： A digital demodulation apparatus which has a detector (11) for receiving transmission signals (S.sub.in) modulated under a multivalue quadrature amplitude modulation method in accordance with a honeycomb signal structure point arrangement. The detector produces I channel and Q channel demodulation signals. The apparatus also includes a discriminator (13) which converts the analog demodulation signals (Sa) to digital demodulation signals (Sd), a memory (21) which successively receives said digital demodulation signals (Sd) and reproduces corresponding original data. The read only memory (21) stores data representatives of the honeycomb signal structure point arrangement, and stores polarity bits (P) and error bits (.epsilon.) of the signal points.
摘要翻译： PCT No.PCT / JP88 / 00280 Sec。 371日期：1988年10月13日 102（e）日期1988年10月13日PCT提交1988年3月17日PCT公布。第WO88 / 07302号公报日期：1988年9月22日。一种数字解调装置，具有用于接收根据蜂窝信号结构点布置在多值正交幅度调制方法下调制的传输信号（Sin）的检测器（11）。检测器产生I通道和Q通道解调信号。该装置还包括将模拟解调信号（Sa）转换为数字解调信号（Sd）的鉴频器（13），连续接收所述数字解调信号（Sd）并再现对应的原始数据的存储器（21）。只读存储器（21）存储蜂窝信号结构点布置的数据代表，并存储信号点的极性位（P）和误差位（ε）。

4. 发明授权

US4809298A Radio data transmission system 失效
标题翻译：无线数据传输系统
公开(公告)号：US4809298A
公开(公告)日：1989-02-28
申请号：US53396
申请日：1987-04-30
申请人： Toshiaki Sakane , Sadao Takenaka , Morihiko Minowa , Yoshihito Aono , Yoshimasa Daidoh
发明人： Toshiaki Sakane , Sadao Takenaka , Morihiko Minowa , Yoshihito Aono , Yoshimasa Daidoh
IPC分类号： H04B7/005 , H04L25/03 , H04L25/49
CPC分类号： H04B7/005 , H04L25/03038
摘要： The present invention relates to a radio transmission system. The system includes a transversal type automatic equalizer which controls tap weight based on bit error rate (BER) from a pseudo error pulse. In the equalizer, the threshold value (BER1) which defines the mode change for tap weighting control from normal to reset is different from the threshold value (BER2) from reset to normal. Therefore, the mode change is carried out by a simple circuit properly and stably.
摘要翻译： PCT No.PCT / JP86 / 00437 Sec。 371日期1987年4月30日 102（e）1987年4月30日PCT PCT日期：1986年8月27日PCT公布。第WO87 / 01535号公报 1987年3月12日发布。无线传输系统技术领域本发明涉及一种无线传输系统。该系统包括横向型自动均衡器，其基于来自伪误差脉冲的误码率（BER）来控制抽头重量。在均衡器中，定义从正常到复位的分接加权控制的模式改变的阈值（BER1）不同于从复位到正常的阈值（BER2）。因此，通过简单的电路正确稳定地进行模式切换。

5. 发明授权

US4394626A Phase synchronizing circuit 失效
标题翻译：相位同步电路
公开(公告)号：US4394626A
公开(公告)日：1983-07-19
申请号：US211847
申请日：1980-12-01
申请人： Hiroshi Kurihara , Sadao Takenaka , Eiji Itaya
发明人： Hiroshi Kurihara , Sadao Takenaka , Eiji Itaya
IPC分类号： H03L7/10 , H03L7/087 , H04L7/027 , H04L27/00 , H04L27/227 , H03L7/08
CPC分类号： H04L27/2273 , H03L7/087 , H04L7/027 , H04L2027/003 , H04L2027/0057
摘要： A phase synchronizing circuit, wherein two phase detectors are used in quadrature to detect the phase of an input signal and to avoid hang-up when the phase of the input signal changes abruptly by 180.degree.. The two detected phase signals are then multiplied by a locally generated reference signal and re-combined, so that a synchronized output signal having reduced phase jitter results. This circuit is also incorporated in an N-phase PSK system, where it is used as a synchronizer and not as a demodulator. In a receiver for such a PSK system, the frequency of the received signal is multiplied by N, the phase synchronizer circuit of the invention is then used to extract the carrier (at a N times higher frequency), and a divider is then used to convert the synchronized carrier provided by the synchronizer circuit of the invention down to the original frequency.
摘要翻译：相位同步电路，其中两相检测器用于正交检测输入信号的相位，并且当输入信号的相位突然变化180°时避免挂起。然后将两个检测到的相位信号乘以本地产生的参考信号并重新组合，使得具有降低的相位抖动的同步输出信号结果。该电路也被并入N相PSK系统中，其被用作同步器而不是解调器。在这种PSK系统的接收机中，将接收信号的频率乘以N，然后使用本发明的相位同步器电路提取载波（频率为N倍），然后使用分频器将由本发明的同步器电路提供的同步载波转换为原始频率。

6. 发明授权

US4665532A Radio communication system 失效
标题翻译：无线通信系统
公开(公告)号：US4665532A
公开(公告)日：1987-05-12
申请号：US693341
申请日：1985-01-22
申请人： Eisuke Fukuda , Yukio Takeda , Yoshimasa Daido , Hiroshi Nakamura , Susumu Sasaki , Sadao Takenaka
发明人： Eisuke Fukuda , Yukio Takeda , Yoshimasa Daido , Hiroshi Nakamura , Susumu Sasaki , Sadao Takenaka
IPC分类号： H04L27/00 , H04L27/34 , H04L27/36 , H04L27/38 , H04L25/34 , H04B7/00
CPC分类号： H04L27/3827 , H04L27/34 , H04L27/345 , H04L27/362
摘要： A radio communication system using a QAM system. In the transmission system, the data of each channel to be transmitted is divided into data groups having frame slots. When the polarity of the mean value of a data summed in a present data group is the same as the polarity of the mean value of the deviation of all data group coming before, all data in the present data group is inverted, a direct current component and a lower frequency component near the direct current component are suppressed, and carrier waves are injected after encoding. In the receiving system, a decoder decodes a received signal to obtain the original data before the encoding by the transmission system.
摘要翻译：一种使用QAM系统的无线电通信系统。在传输系统中，要发送的每个信道的数据被划分为具有帧时隙的数据组。当在当前数据组中求和的数据的平均值的极性与所有数据组的偏差的平均值的极性相同时，本数据组中的所有数据都被反转，直流分量并且抑制直流成分附近的低频分量，编码后注入载波。在接收系统中，解码器对接收到的信号进行解码，以在传输系统进行编码之前获得原始数据。

7. 发明授权

US4310803A Bandpass filter circuit 失效
标题翻译：带通滤波电路
公开(公告)号：US4310803A
公开(公告)日：1982-01-12
申请号：US68004
申请日：1979-08-20
申请人： Hiroshi Kurihara , Sadao Takenaka
发明人： Hiroshi Kurihara , Sadao Takenaka
IPC分类号： H03H7/01 , H03H19/00 , H04L27/227 , H03H11/02
CPC分类号： H04L27/2276 , H03H19/00 , H03H7/01
摘要： An improved bandpass filter circuit for selecting a relatively narrow band portion of an input sinusoidal signal. The improved bandpass filter circuit produces an output signal whose phase deviation from the input signal is substantially constant for small variations in the frequency of the input signal. The improved bandpass filter circuit in accordance with the present invention does not use feedback control in its operation and therefore is free from the inherent delay time of a tracking type bandpass filter utilizing feedback control in handling transitory input signals.
摘要翻译：一种用于选择输入正弦信号的相对窄带部分的改进的带通滤波器电路。改进的带通滤波器电路产生输出信号，其输入信号的相位偏移对于输入信号的频率的小变化基本上是恒定的。根据本发明的改进的带通滤波器电路在其操作中不使用反馈控制，因此在处理暂时输入信号中利用反馈控制的跟踪型带通滤波器的固有延迟时间没有。

8. 发明授权

US4247938A Method for generating a pseudo-signal in an error rate supervisory unit and circuit for carrying out the same 失效
标题翻译：用于在错误率监控单元中产生伪信号的方法和用于执行该伪信号的电路
公开(公告)号：US4247938A
公开(公告)日：1981-01-27
申请号：US040408
申请日：1979-05-18
申请人： Hiroshi Kurihara , Tadayoshi Katoh , Sadao Takenaka
发明人： Hiroshi Kurihara , Tadayoshi Katoh , Sadao Takenaka
IPC分类号： H04L1/00 , G06F7/58 , H03K3/84 , H04L1/24 , H04L12/26 , H04L27/00 , H04B17/00 , G06F11/00
CPC分类号： H04L1/241
摘要： A method and circuit for generating a pseudo-error signal comprising a demodulator circuit for demodulating an input signal; a first discriminator circuit for regenerating a first digital data signal by discriminating the output of the demodulator circuit; a noise extracting means for extracting a noise component from the input signal; an adding circuit for adding the output of the noise extracting means and the output of the demodulator circuit; a second discriminator circuit for regenerating a second digital data signal by discriminating the output of the adding circuit, and; an exclusive OR circuit for recognizing whether or not the first digital data signal coincides with the second digital data signal.
摘要翻译：一种用于产生伪误差信号的方法和电路，包括用于解调输入信号的解调器电路; 用于通过识别解调器电路的输出来再生第一数字数据信号的第一鉴别器电路; 噪声提取装置，用于从输入信号中提取噪声分量; 用于将噪声提取装置的输出和解调器电路的输出相加的加法电路; 第二鉴别器电路，用于通过识别加法电路的输出来再生第二数字数据信号; 用于识别第一数字数据信号是否与第二数字数据信号一致的异或电路。

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