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1. 发明授权

US10623172B2 Control signal transmission and reception system and control signal transmission and reception method 有权
公开(公告)号：US10623172B2
公开(公告)日：2020-04-14
申请号：US16520431
申请日：2019-07-24
申请人： FUJITSU LIMITED
发明人： Jun Matsui , Hisakatsu Yamaguchi
IPC分类号： H04L7/027 , H04L7/033 , H04L7/00
CPC分类号： H04L7/027 , H04L7/0337 , H04L7/0025
摘要： A method includes transmitting a data signal generated by adjusting a phase of a data signal, receiving a control signal having a frequency lower than that of the data signal and used to control an apparatus of a transmission destination of the data signal, and applying, in a case where a signal level of the control signal is a level, jitter to the data signal by periodically changing a magnitude of an additional phase code to be added to a phase code representative of an adjustment amount for the phase but fixing, in a case where the signal level is a level different from the level, the additional phase code to 0, receiving the data signal and adjusting a phase of the data signal to generate a data signal and restoring the control signal from a phase code representative of an adjustment amount for the phase.

2. 发明申请

US20190199506A1 IMAGE PROCESSING APPARATUS 审中-公开
公开(公告)号：US20190199506A1
公开(公告)日：2019-06-27
申请号：US16214983
申请日：2018-12-10
申请人： KYOCERA Document Solutions Inc.
发明人： Yukio Shibata
IPC分类号： H04L7/00 , H04L7/08 , H04L7/027 , H03K5/1252 , H04N1/00 , H04N1/21 , H04N1/32
CPC分类号： H04L7/0066 , H03K5/1252 , H04L7/027 , H04L7/08 , H04N1/00013 , H04N1/00037 , H04N1/21 , H04N1/32
摘要： A receiver circuit receives a transmission signal using serial communication, the transmission signal including image data and a synchronization signal that has a pulse period fluctuated in a predetermined fluctuation range. A data reception processing unit extracts the image data and the synchronization signal from the received transmission signal, and writes each line of the image data into a line memory among line memories while selecting the line memory line by line in turn in accordance with the synchronization signal. A line data reading unit reads each line of the image data from a line memory among the line memories while selecting the line memory line by line in turn in accordance with the synchronization signal. If the pulse period of the synchronization signal is not in the predetermined fluctuation range, an error detecting unit discards the image data written into the line memory in this pulse period.

3. 发明申请

US20180167651A1 DTV RECEIVING SYSTEM AND METHOD OF PROCESSING DTV SIGNAL 审中-公开
公开(公告)号：US20180167651A1
公开(公告)日：2018-06-14
申请号：US15886458
申请日：2018-02-01
申请人： LG Electronics Inc.
发明人： Jong Moon KIM , In Hwan CHOI , Kook Yeon KWAK , Byoung Gill KIM , Won Gyu SONG , Jin Woo KIM , Hyoung Gon LEE
IPC分类号： H04N21/235 , H04L1/00 , H04N21/438 , H04L7/027 , H04N5/455 , H04N5/44 , H04L27/227 , H04L27/06 , H04L7/04 , H04N21/2383
CPC分类号： H04N21/2353 , H04L1/006 , H04L1/0065 , H04L1/007 , H04L1/0071 , H04L7/027 , H04L7/042 , H04L27/066 , H04L27/2272 , H04N5/4401 , H04N5/455 , H04N21/2383 , H04N21/4382
摘要： A digital television (DTV) receiving system includes an information detector, a resampler, a timing recovery unit, and a carrier recovery unit. The information detector detects a known data sequence which is periodically inserted in a digital television (DTV) signal received from a DTV transmitting system. The resampler resamples the DTV signal at a predetermined resampling rate. The timing recovery unit performs timing recovery on the DTV signal by detecting a timing error from the resampled DTV signal using the detected known data sequence. The carrier recovery unit performs carrier recovery on the resampled DTV signal by estimating a frequency offset value of the resampled DTV signal using the detected known data sequence.

4. 发明申请

US20180106695A1 SENSOR INTERFACE FOR HOSTILE ENVIRONMENTS 审中-公开
公开(公告)号：US20180106695A1
公开(公告)日：2018-04-19
申请号：US15786293
申请日：2017-10-17
申请人： Commissariat à l'Énergie Atomique et aux Énergies Alternatives
发明人： Emna Chabchoub , Franck Badets
IPC分类号： G01L23/08 , H03L7/24 , H03L7/06 , H04L7/033 , H04L7/027
CPC分类号： G01L23/08 , G01D5/243 , G01D21/00 , H03L7/06 , H03L7/24 , H04L7/027 , H04L7/033
摘要： An interface circuit for a sensor including: a first injection-locked oscillator having: a first input coupled to a sensor, a free-running oscillation frequency of the first injection-locked oscillator being controlled by a signal from the sensor; and a second input coupled to receive a synchronization signal at a reference frequency, the first injection-locked oscillator being adapted to generate an output signal at said reference frequency, the output signal being phase shifted with respect to the synchronization signal as a function of the signal from the sensor.

5. 发明申请

US20170294970A1 OPTICAL RECEIVER, OPTICAL TERMINATION DEVICE, AND OPTICAL COMMUNICATION SYSTEM 有权
公开(公告)号：US20170294970A1
公开(公告)日：2017-10-12
申请号：US15507924
申请日：2015-04-15
申请人： Mitsubishi Electric Corporation
发明人： Daisuke MITA
IPC分类号： H04B10/61 , H03G3/30 , H04L7/027 , H04B10/69
CPC分类号： H04B10/616 , H03F1/083 , H03F3/08 , H03F3/45475 , H03F2200/408 , H03G3/3084 , H03G3/3089 , H04B10/00 , H04B10/611 , H04B10/615 , H04B10/6165 , H04B10/69 , H04B10/6911 , H04B10/693 , H04L7/027
摘要： An optical receiver includes an APD that converts an input optical signal into a current signal, a TIA that converts the current signal output from the APD into a voltage signal, an LIA that shapes a waveform of the voltage signal output from the TIA, an AOC having a time constant switching function, the AOC automatically compensating for an offset voltage between differential outputs from the TIA, and a convergence-state detection circuit that outputs, after detecting convergence completion of the automatic compensation in the AOC, to the AOC, a time constant switching control signal for switching a time constant from a high-speed time constant to a low-speed time constant.

6. 发明申请

US20170288652A1 Interference-Immunized Multiplexer 审中-公开
公开(公告)号：US20170288652A1
公开(公告)日：2017-10-05
申请号：US15084918
申请日：2016-03-30
申请人： Futurewei Technologies, Inc.
发明人： Liang Gu , Yuming Cao , Gong Lei , Yen Dang , Yifan Gu , Hungyi Lee , Mamatha Deshpande , Shou-Po Shih , Yan Duan
IPC分类号： H03K3/356 , H04L7/00 , H04L7/027 , H03K3/037
CPC分类号： H03K3/356104 , H03K3/037 , H03K17/6257 , H03K17/6874 , H03K17/693 , H04J3/047 , H04L7/0012 , H04L7/0079 , H04L7/027
摘要： A multiplexer comprises: an output circuit comprising a multiplexer output; and a first buffer coupled to the output circuit and comprising: a first selection input configured to receive a first selection signal; a first logical input configured to receive a first logical input signal; and a first ground; wherein the multiplexer is configured to: couple the first logical input to the multiplexer output when the first selection signal is a first value; and couple the first logical input to the first ground when the first selection signal is a second value. A method comprises: receiving a selection signal and a first logical input signal; coupling a first logical input to a multiplexer output when the selection signal is a first value; and coupling the first logical input to a ground when the selection signal is a second value.

7. 发明授权

US09736508B2 DTV receiving system and method of processing DTV signal 有权
公开(公告)号：US09736508B2
公开(公告)日：2017-08-15
申请号：US14229548
申请日：2014-03-28
申请人： LG ELECTRONICS INC.
发明人： Jong Moon Kim , In Hwan Choi , Kook Yeon Kwak , Byoung Gill Kim , Won Gyu Song , Jin Woo Kim , Hyoung Gon Lee
IPC分类号： H04L27/00 , H04N21/235 , H04L7/027 , H04L7/04 , H04L27/06 , H04L27/227 , H04N5/44 , H04N5/455 , H04N21/2383 , H04N21/438 , H04L1/00
CPC分类号： H04N21/2353 , H04L1/006 , H04L1/0065 , H04L1/007 , H04L1/0071 , H04L7/027 , H04L7/042 , H04L27/066 , H04L27/2272 , H04N5/4401 , H04N5/455 , H04N21/2383 , H04N21/4382
摘要： A digital television (DTV) receiving system includes an information detector, a resampler, a timing recovery unit, and a carrier recovery unit. The information detector detects a known data sequence which is periodically inserted in a digital television (DTV) signal received from a DTV transmitting system. The resampler resamples the DTV signal at a predetermined resampling rate. The timing recovery unit performs timing recovery on the DTV signal by detecting a timing error from the resampled DTV signal using the detected known data sequence. The carrier recovery unit performs carrier recovery on the resampled DTV signal by estimating a frequency offset value of the resampled DTV signal using the detected known data sequence.

8. 发明申请

US20170118046A1 SYSTEM AND METHOD FOR ADJUSTING CLOCK PHASES IN A TIME-INTERLEAVED RECEIVER 有权
公开(公告)号：US20170118046A1
公开(公告)日：2017-04-27
申请号：US15372051
申请日：2016-12-07
申请人： STEPHANE DALLAIRE , BENJAMIN SMITH
发明人： STEPHANE DALLAIRE , BENJAMIN SMITH
IPC分类号： H04L25/03 , H04L7/027
CPC分类号： H04L25/03006 , H04L7/027 , H04L25/03057 , H04L25/03885
摘要： Clock timing skew may occur during operation of a time-interleaved receiver. It would be beneficial to try to determine if there is timing skew, and if there is, then address it, such as by reducing or eliminating some or all of the timing skew. Embodiments are described herein that may achieve this. In one embodiment, a method includes generating at least two clocks having the same frequency but a different phase. Intersymbol interference (ISI) values are then determined, one for each of the clocks, by: for each clock, sampling a signal using the clock and determining a value representing ISI based on the sampled signal. A clock phase of at least one of the clocks is adjusted in response to at least one of the ISI values being different from a reference ISI value.

9. 发明授权

US09596074B2 Clock recovery for data signals 有权
标题翻译：数据信号的时钟恢复
公开(公告)号：US09596074B2
公开(公告)日：2017-03-14
申请号：US15076173
申请日：2016-03-21
申请人： Tektronix, Inc.
发明人： Kan Tan
IPC分类号： H04L25/00 , H04L25/40 , H04L7/033 , H04L7/00
CPC分类号： H04L7/033 , G01R13/00 , H04L1/20 , H04L1/205 , H04L7/0008 , H04L7/027 , H04L7/0331 , H04L25/03878
摘要： Embodiments of the present invention provide improved techniques for recovering clock information from data signals. In one embodiment, a general purpose device such as a real-time oscilloscope acquires a data signal. The device takes a derivative of the data signal, then computes the square or absolute of the derivative before applying a bandpass filter. The bandpass filter is a windowing function a spectrum that is wider than the clock, and has a flat top and smooth transitions on both sides. In one embodiment, at Tukey window may be used. The device finds edge crossing times of the filtered result, and applies a phase-locked loop or lowpass filter to the edge crossing times in order to recover a stable clock signal. When the improved techniques are implemented in software, they may be used with any number of different equalizers that are required by various high-speed serial data link systems.
摘要翻译：本发明的实施例提供了用于从数据信号恢复时钟信息的改进技术。在一个实施例中，诸如实时示波器的通用设备获取数据信号。器件取数据信号的导数，然后在应用带通滤波器之前计算导数的平方或绝对值。带通滤波器是一个比时钟宽的频谱的窗口功能，并且在两侧具有平坦的顶部和平滑的过渡。在一个实施例中，可以使用Tukey窗口。器件发现滤波结果的边沿交叉时间，并向边沿交叉时间施加锁相环或低通滤波器，以恢复稳定的时钟信号。当改进的技术在软件中实现时，它们可以与各种高速串行数据链路系统所需的任何数量的不同均衡器一起使用。

10. 发明授权

US09407426B2 Optical network interface, module and engine 有权
标题翻译：光网络接口，模块和引擎
公开(公告)号：US09407426B2
公开(公告)日：2016-08-02
申请号：US12945470
申请日：2010-11-12
申请人： Daniel J. Blumenthal , Henrik N. Poulsen
发明人： Daniel J. Blumenthal , Henrik N. Poulsen
IPC分类号： H04B10/40 , H04L7/00 , H04B10/80 , H04L7/027 , H04B10/079 , H04L29/06
CPC分类号： H04L7/0075 , H04B10/0793 , H04B10/40 , H04B10/801 , H04L7/0083 , H04L7/027 , H04L65/1069
摘要： An optical network interface (ONI) module has two main components: an optoelectronic front-end and a general purpose hardware-programmable optical network interface engine. The ONI engine is hardware programmable, allowing the user to configure the overall ONI module with different optoelectronic front-ends and for use with different host modules. In this way, the ONI module can be configured for different applications and protocols.
摘要翻译：光网络接口（ONI）模块有两个主要部件：光电前端和通用硬件可编程光网络接口引擎。 ONI引擎是硬件可编程的，允许用户使用不同的光电前端配置整个ONI模块，并与不同的主机模块一起使用。以这种方式，可以为不同的应用和协议配置ONI模块。

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