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1. 发明申请

US20090327571A1 COMMAND PROCESSING APPARATUS, METHOD AND INTEGRATED CIRCUIT APPARATUS 有权
标题翻译：指令处理装置，方法和集成电路装置
公开(公告)号：US20090327571A1
公开(公告)日：2009-12-31
申请号：US12159048
申请日：2006-07-28
申请人： Nobuyuki Ichiguchi , Tetsuji Mochida , Ryuta Nakanishi , Takaharu Tanaka
发明人： Nobuyuki Ichiguchi , Tetsuji Mochida , Ryuta Nakanishi , Takaharu Tanaka
IPC分类号： G06F12/06
CPC分类号： G06F3/061 , G06F3/0659 , G06F3/067 , G06F13/1605 , G06F13/1647 , G06F13/1673 , G09G5/001
摘要： A command processing apparatus and method are provided for optimally processing commands issued asynchronously from a plurality of masters to a storage apparatus including a plurality of banks, where each master issues commands for a bank 0 and a bank 1 alternately. The command processing apparatus includes buffer units that obtain commands issued from the plurality of masters, an arbitration unit that arbitrates the obtained commands, and an issuance unit that issues commands to the storage apparatus according to the arbitration. The arbitration unit reads the commands of the plurality of masters obtained in the buffer units, and selects one command as a result of arbitration. The arbitration unit waits until a next command of a master relating to the selected command becomes readable, and reads the next command. The issuance unit consecutively issues the selected command and the read command to the storage apparatus.
摘要翻译：提供了一种命令处理装置和方法，用于最佳地处理从多个主机异步发出的包括多个存储体的存储装置的命令，其中每个主机交替地为存储体0和存储体1发出命令。命令处理装置包括获取从多个主机发出的命令的缓冲器单元，仲裁所获得的命令的仲裁单元和根据仲裁向存储装置发出命令的发布单元。仲裁单元读取在缓冲器单元中获得的多个主器件的命令，并且作为仲裁结果选择一个命令。仲裁单元等待直到与所选择的命令相关的主机的下一个命令变得可读，并读取下一个命令。发行单元将选择的命令和读取命令连续地发送到存储装置。

2. 发明授权

US09201819B2 Command processing apparatus, method and integrated circuit apparatus 有权
标题翻译：指令处理装置，方法和集成电路装置
公开(公告)号：US09201819B2
公开(公告)日：2015-12-01
申请号：US12159048
申请日：2006-07-28
申请人： Nobuyuki Ichiguchi , Tetsuji Mochida , Ryuta Nakanishi , Takaharu Tanaka
发明人： Nobuyuki Ichiguchi , Tetsuji Mochida , Ryuta Nakanishi , Takaharu Tanaka
IPC分类号： G06F12/06 , G06F13/16 , G09G5/00
CPC分类号： G06F3/061 , G06F3/0659 , G06F3/067 , G06F13/1605 , G06F13/1647 , G06F13/1673 , G09G5/001
摘要： A command processing apparatus and method are provided for optimally processing commands issued asynchronously from a plurality of masters to a storage apparatus including a plurality of banks, where each master issues commands for a bank 0 and a bank 1 alternately. The command processing apparatus includes buffer units that obtain commands issued from the plurality of masters, an arbitration unit that arbitrates the obtained commands, and an issuance unit that issues commands to the storage apparatus according to the arbitration. The arbitration unit reads the commands of the plurality of masters obtained in the buffer units, and selects one command as a result of arbitration. The arbitration unit waits until a next command of a master relating to the selected command becomes readable, and reads the next command. The issuance unit consecutively issues the selected command and the read command to the storage apparatus.
摘要翻译：提供了一种命令处理装置和方法，用于最佳地处理从多个主机异步发出的包括多个存储体的存储装置的命令，其中每个主机交替地为存储体0和存储体1发出命令。命令处理装置包括获取从多个主机发出的命令的缓冲器单元，仲裁所获得的命令的仲裁单元和根据仲裁向存储装置发出命令的发布单元。仲裁单元读取在缓冲器单元中获得的多个主器件的命令，并且作为仲裁结果选择一个命令。仲裁单元等待直到与所选择的命令相关的主机的下一个命令变得可读，并读取下一个命令。发行单元将选择的命令和读取命令连续地发送到存储装置。

3. 发明授权

US07904666B2 Access control device, access control integrated circuit, and access control method 有权
标题翻译：访问控制装置，访问控制集成电路和访问控制方法
公开(公告)号：US07904666B2
公开(公告)日：2011-03-08
申请号：US11917574
申请日：2006-07-06
申请人： Tetsuji Mochida , Ryuta Nakanishi , Takaharu Tanaka
发明人： Tetsuji Mochida , Ryuta Nakanishi , Takaharu Tanaka
IPC分类号： G06F12/00
CPC分类号： G06F13/1663 , G06F9/4887
摘要： In a device, in which a master that requires access at a predetermined rate and a processor that requires responsiveness to an access request access a shared memory, responsiveness to the access request of the processor is improved while the access of the master at the predetermined rate is guaranteed, compared to conventional technologies. When the master has a resource available for accessing the shared memory, the master accesses the shared memory at the predetermined rate or above. When the access is executed at the predetermined rate or above, the processor accesses the shared memory by using a resource that was originally allocated to the master.
摘要翻译：在需要以预定速率访问的主机和需要对访问请求进行响应的处理器访问共享存储器的设备中，提高对处理器的访问请求的响应性，同时主机以预定速率的访问与传统技术相比是有保证的。当主机具有可用于访问共享存储器的资源时，主机以预定速率或更高速度访问共享存储器。当以预定速率或以上执行访问时，处理器通过使用最初分配给主机的资源来访问共享存储器。

4. 发明申请

US20070208919A1 BURST MEMORY ACCESS METHOD TO RECTANGULAR AREA 有权
公开(公告)号：US20070208919A1
公开(公告)日：2007-09-06
申请号：US10599832
申请日：2005-03-18
申请人： Takaharu Tanaka , Tetsuji Mochida , Nobuyuki Ichiguchi
发明人： Takaharu Tanaka , Tetsuji Mochida , Nobuyuki Ichiguchi
IPC分类号： G06F12/06
CPC分类号： G06F12/0207 , H04N19/423 , H04N19/43 , H04N19/433
摘要： The information processing device in the present invention includes a memory 1 which is a DRAM featuring a burst mode, and burst-transfers data at successive column addresses, masters (13), (14), and (15) which issue access requests, and a command processing unit (11) which converts an access address that is included in the access request issued from each master. One or more of the masters access an M×N rectangular area where M and N are integers, and the command processing unit (11) converts access addresses so that a column address of data at the (K+m)th column, where K and m are integers and m≦M, of an Lth line, and a column address of data at a Kth column of an (L+n)th line, where L and n are integers and n≦N, become successive.
摘要翻译：本发明的信息处理装置包括：存储器1，其是具有突发模式的DRAM，并且在连续的列地址突发传送数据，发出访问请求的主机（13），（14）和（15），以及命令处理单元（11），其转换从每个主机发出的访问请求中包括的访问地址。一个或多个主机访问M×N矩形区域，其中M和N为整数，并且命令处理单元（11）转换访问地址，使得在第（K + m）列处的数据的列地址，其中K和m 是第L行的整数，m <= M，第（L + n）行的第K列的数据的列地址，其中L和n是整数，n <= N成为连续的。

5. 发明申请

US20090313441A1 ACCESS CONTROL DEVICE, ACCESS CONTROL INTEGRATED CIRCUIT, AND ACCESS CONTROL METHOD 有权
标题翻译：访问控制装置，访问控制集成电路和访问控制方法
公开(公告)号：US20090313441A1
公开(公告)日：2009-12-17
申请号：US11917574
申请日：2006-07-06
申请人： Tetsuji Mochida , Ryuta Nakanishi , Takaharu Tanaka
发明人： Tetsuji Mochida , Ryuta Nakanishi , Takaharu Tanaka
IPC分类号： G06F12/10
CPC分类号： G06F13/1663 , G06F9/4887
摘要： In a device in which a master that requires access at a predetermined rate and a processor that requires responsiveness to an access request access a shared memory, responsiveness to the access request of the processor is improved while the access of the master at the predetermined rate is guaranteed, compared to conventional technologies. When the master has a resource available for accessing the shared memory, the master accesses the shared memory at the predetermined rate or above. In a case that the access is executed at the predetermined rate or above, the processor accesses the shared memory by using a resource that was originally allocated to the master.
摘要翻译：在需要以预定速率访问的主机和需要对访问请求进行响应的处理器访问共享存储器的设备中，改进了对处理器的访问请求的响应，同时主机以预定速率的访问是保证，与传统技术相比。当主机具有可用于访问共享存储器的资源时，主机以预定速率或更高速度访问共享存储器。在以预定速率或以上执行访问的情况下，处理器通过使用最初分配给主机的资源来访问共享存储器。

6. 发明申请

US20090235003A1 MEMORY CONTROL DEVICE AND MEMORY CONTROL METHOD 审中-公开
标题翻译：存储控制装置和存储器控制方法
公开(公告)号：US20090235003A1
公开(公告)日：2009-09-17
申请号：US11916748
申请日：2005-12-26
申请人： Takaharu Tanaka , Tetsuji Mochida
发明人： Takaharu Tanaka , Tetsuji Mochida
IPC分类号： G06F13/14 , G06F12/00
CPC分类号： G06F13/1605 , Y02D10/14
摘要： Access requests issued from access circuits 30, 40 are arbitrated in an arbitration circuit 20 and are accessed to a storage device 10. On the other hand, access requests issued from the access circuits 30, 40 are arbitrated in the arbitration circuit 21 and are accessed to a storage device 11.
摘要翻译：从访问电路30,40发出的访问请求在仲裁电路20中进行仲裁，并被存取到存储装置10.另一方面，从访问电路30,40发出的访问请求在仲裁电路21中进行仲裁，并被访问到存储装置11。

7. 发明授权

US07852343B2 Burst memory access method to rectangular area 有权
标题翻译：突发存储器访问方法到矩形区域
公开(公告)号：US07852343B2
公开(公告)日：2010-12-14
申请号：US10599832
申请日：2005-03-18
申请人： Takaharu Tanaka , Tetsuji Mochida , Nobuyuki Ichiguchi
发明人： Takaharu Tanaka , Tetsuji Mochida , Nobuyuki Ichiguchi
IPC分类号： G09G5/39
CPC分类号： G06F12/0207 , H04N19/423 , H04N19/43 , H04N19/433
摘要： The information processing device in the present invention includes a memory 1 which is a DRAM featuring a burst mode, and burst-transfers data at successive column addresses, masters (13), (14), and (15) which issue access requests, and a command processing unit (11) which converts an access address that is included in the access request issued from each master. One or more of the masters access an M×N rectangular area where M and N are integers, and the command processing unit (11) converts access addresses so that a column address of data at the (K+m)th column, where K and m are integers and m≦M, of an Lth line, and a column address of data at a Kth column of an (L+n)th line, where L and n are integers and n≦N, become successive.
摘要翻译：本发明的信息处理装置包括：存储器1，其是具有突发模式的DRAM，并且在连续的列地址突发传送数据，发出访问请求的主机（13），（14）和（15），以及命令处理单元（11），其转换从每个主机发出的访问请求中包括的访问地址。一个或多个主机访问M×N矩形区域，其中M和N是整数，并且命令处理单元（11）转换访问地址，使得在（K + m）列的数据的列地址，其中K m是第L行的m和nlE; M，第（L + n）行的第K列的数据的列地址，其中L和n是整数，并且n＆nlE; N成为连续的。

8. 发明授权

US4791059A Process for preparing lipase 失效
标题翻译：脂肪酶的制备方法
公开(公告)号：US4791059A
公开(公告)日：1988-12-13
申请号：US844389
申请日：1986-03-17
申请人： Masahiro Nakao , Sumio Asami , Takaharu Tanaka , Kyoichi Ogura , Teruo Amachi , Hajime Yoshizumi , Hiroshi Ishigooka
发明人： Masahiro Nakao , Sumio Asami , Takaharu Tanaka , Kyoichi Ogura , Teruo Amachi , Hajime Yoshizumi , Hiroshi Ishigooka
IPC分类号： C12N9/20 , C12P7/64 , C12R1/44
CPC分类号： C12P7/6418 , C12N9/20 , Y10S435/882
摘要： This invention relates to a process for preparation of a novel lipase. The process is characterized by culturing a microorganism belonging to Staphylococcus capitis and capable of producing lipase in a culture medium to accumulate lipase in the cultured broth and recovering the lipase from the broth. Since the pH of this lipase is in a slightly alkali region and the lipase substantially completely converts glyceride to fatty acids and glycerin, it is useful for the economic preparation of fatty acids by the hydrolysis of fats or oils.
摘要翻译： PCT No.PCT / JP85 / 00409 Sec。 371日期：1986年3月17日 102（e）1986年3月17日PCT申请日1985年7月19日PCT公布。第WO86 / 00925号公报日本1986年2月13日。本发明涉及新型脂肪酶的制备方法。该方法的特征在于培养属于葡萄球菌属的炎症微生物，并且能够在培养基中产生脂肪酶以在培养的肉汤中积聚脂肪酶并从肉汤中回收脂肪酶。由于该脂肪酶的pH处于微碱性区域，脂肪酶基本上完全将甘油酯转化为脂肪酸和甘油，因此通过脂肪或油的水解来经济地制备脂肪酸是有用的。

9. 发明授权

US4757083A Novel pyrrolidinylamide ester derivatives having anti-prolyl endopeptidase activity and synthesis and use thereof 失效
标题翻译：具有抗脯氨酰内肽酶活性的新型吡咯烷酰胺酯衍生物及其合成和用途
公开(公告)号：US4757083A
公开(公告)日：1988-07-12
申请号：US936445
申请日：1986-12-01
申请人： Naoki Higuchi , Masayuki Saitoh , Masaki Hashimoto , Harukazu Fukami , Takaharu Tanaka
发明人： Naoki Higuchi , Masayuki Saitoh , Masaki Hashimoto , Harukazu Fukami , Takaharu Tanaka
IPC分类号： A61K31/445 , A61K31/40 , A61K31/401 , A61P25/00 , A61P43/00 , C07D295/10 , C07D295/185 , C12N9/99 , C07D295/18
CPC分类号： C07D295/185
摘要： A novel pyrrolidinylamide ester derivative that exhibits inhibitory activity against prolyl endopeptidase, methods for synthesis thereof and its use as an inhibitor against said enzyme are disclosed. The pyrrolidinylamide ester of the invention has the following general formula: ##STR1## wherein n is 0 or an integer of 1 to 7 and R is hydrogen atom or a straight or branched alkyl having 1 to 8 carbon atoms.
摘要翻译：公开了一种对脯氨酰内肽酶具有抑制活性的新型吡咯烷酰胺酯衍生物，其合成方法及其作为对所述酶的抑制剂的用途。本发明的吡咯烷酰胺酯具有以下通式：其中n为0或1〜7的整数，R为氢原子或碳原子数为1〜8的直链或支链烷基。

10. 发明授权

US4670255A Hair tonic composition 失效
标题翻译：头发补品组成
公开(公告)号：US4670255A
公开(公告)日：1987-06-02
申请号：US572064
申请日：1984-01-19
申请人： Hajime Yoshizumi , Teruo Amachi , Takaaki Kusumi , Takaharu Tanaka , Hiroshi Ishigooka
发明人： Hajime Yoshizumi , Teruo Amachi , Takaaki Kusumi , Takaharu Tanaka , Hiroshi Ishigooka
IPC分类号： A61K8/00 , A61K8/36 , A61K8/97 , A61K8/98 , A61K8/99 , A61Q5/00 , A61Q7/00 , A61K37/00 , A61K7/06 , A61K37/48
CPC分类号： A61Q5/006 , A61K8/99 , A61Q7/00 , Y10S435/882
摘要： A hair tonic composition containing, as an effective ingredient, a product obtained from the interaction of a vegetable or animal fat or oil with a microorganism belonging to Staphylococcus capitis. This hair tonic composition can effectively prevent the generation of dandruff and itching and can also effectively accelerate the growth of hair.
摘要翻译：含有作为有效成分的由植物油或动物脂肪或油与属于葡萄球菌属的微生物相互作用获得的产品的滋补剂组合物。这种发质组合物可以有效地防止头皮屑和瘙痒的产生，并且还可以有效地加速头发的生长。

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