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    • 1. 发明授权
    • Audio scrambling system for scrambling and descrambling audio signals
    • 用于加扰和解扰音频信号的音频加扰系统
    • US5668879A
    • 1997-09-16
    • US619236
    • 1996-03-21
    • Susumu IbarakiNoboru KattaSeiji NakamuraHiroki Murakami
    • Susumu IbarakiNoboru KattaSeiji NakamuraHiroki Murakami
    • H04K1/02H04K1/00H04M1/68
    • H04K1/02
    • A scrambling system includes a scrambling apparatus and a descrambling apparatus for scrambling and descrambling digital audio codes having plural sub-band units. Each sub-band unit includes at least a scale factor and a quantized sample data which is quantized after scaling with the scale factor. In the scrambling apparatus, a sample period during which the quantized sample data is present is detected, and only the quantized sample data is scrambled at the sample period. In particular, the quantized sample data and data other than the quantized sample data are separated, and the separated quantized sample data is applied to a scrambler, and the other data is applied to a delay circuit. The separated and scrambled quantized sample data and the delayed data are synthesized. The descrambling apparatus also detects a sample period during which the quantized sample data is present, and descrambles only the scrambled quantized sample data at the sample period.
    • 加扰系统包括加扰装置和用于对具有多个子带单元的数字音频码进行加扰和解扰的解扰装置。 每个子带单元至少包括比例因子和量化后的样本数据,该样本数据在缩放比例因子后进行量化。 在加扰装置中,检测存在量化采样数据的采样周期,并且仅在采样周期对量化的采样数据进行加扰。 特别地,量化的采样数据和除了量化的采样数据之外的数据被分离,并且将分离的量化采样数据应用于扰频器,并且将另一数据应用于延迟电路。 分离和加扰量化的样本数据和延迟数据被合成。 解扰装置还检测存在量化样本数据的采样周期,并且在采样周期仅解扰加扰的量化样本数据。
    • 6. 发明授权
    • Scrambling apparatus and descrambling apparatus
    • 加扰装置和解扰装置
    • US5706346A
    • 1998-01-06
    • US321757
    • 1994-10-12
    • Noboru KattaHiroki MurakamiSusumu IbarakiSeiji Nakamura
    • Noboru KattaHiroki MurakamiSusumu IbarakiSeiji Nakamura
    • H04N7/167
    • H04N7/1675
    • A scrambling apparatus has at least one of the following processing units: a signal inserting processor for inserting a dummy pattern indicating the quantization width in the compressed video data; a conversion processor for scrambling a signal specifying whether field or frame processing is used; a DCT coefficient conversion processor for scrambling a part of the code defining the DCT coefficient; an intra.sub.-- dc.sub.-- precision conversion processor for scrambling the intra.sub.-- dc.sub.-- precision signal; and an alternate.sub.-- scan conversion processor for scrambling the alternate .sub.-- scan signal. A descrambling apparatus reverses the conversion process on the video data scrambled by the scrambling apparatus to restore the video data to the original unscrambled state.
    • 加扰装置具有以下处理单元中的至少一个:信号插入处理器,用于将指示量化宽度的虚拟图案插入压缩视频数据中; 转换处理器,用于对指定是使用字段还是帧处理的信号进行加扰; DCT系数转换处理器,用于对定义DCT系数的代码的一部分进行加扰; 用于对所述DC内精度信号进行加扰的DC-DC精度转换处理器; 以及用于对交替扫描信号进行加扰的交替扫描转换处理器。 解扰装置对由加扰装置加扰的视频数据进行转换处理,将视频数据恢复到原来的未加扰状态。
    • 9. 发明授权
    • Transmitting system and transmitting apparatus
    • 发射系统和发射装置
    • US06577813B1
    • 2003-06-10
    • US09235491
    • 1999-01-22
    • Susumu IbarakiToshikazu HattoriHiroki Murakami
    • Susumu IbarakiToshikazu HattoriHiroki Murakami
    • H04N576
    • H04L69/04H04N21/23614H04N21/2389H04N21/4305H04N21/4325H04N21/4334H04N21/4348H04N21/4385H04N21/6332
    • A transmitting system which comprises a transmission line, a transmitting apparatus connected to the transmission line, and a receiving apparatus connected to the transmission line, and transmits data between the transmitting apparatus and the receiving apparatus, wherein the transmitting apparatus comprises packet compressing means which receives input data comprising plural packets having identifiers as an input, identifies packets to be discarded and effective packets according to the identifiers, and outputs compression information indicating the number of continuously discarded packets and the effective packets to the transmission line, and the receiving apparatus comprises packet restoring means which receives the compression information and the effective packets which have been output from the transmitting apparatus, generates ineffective, packets which are as many as the discarded packets, and outputs the ineffective packets and the effective packets.
    • 一种发送系统,包括传输线,连接到传输线的发送装置和连接到传输线的接收装置,并且在发送装置和接收装置之间发送数据,其中发送装置包括分组压缩装置,其接收 输入数据包括具有标识符作为输入的多个分组,根据标识符识别要丢弃的分组和有效分组,并且将表示连续丢弃分组的数量和有效分组的压缩信息输出到传输线,并且接收装置包括分组 接收从发送装置输出的压缩信息和有效分组的恢复装置产生无效的与丢弃分组一样多的分组,并输出无效分组和有效分组。
    • 10. 发明授权
    • Semiconductor memory device with a clock circuit for reducing power consumption in a standby state
    • 具有用于在待机状态下降低功耗的时钟电路的半导体存储器件
    • US09112488B2
    • 2015-08-18
    • US13303153
    • 2011-11-23
    • Hiroki Murakami
    • Hiroki Murakami
    • G11C7/10G11C7/22G11C5/14H03K19/00G11C16/20G11C16/30
    • H03K19/0016G11C5/147G11C5/148G11C7/1057G11C7/1084G11C7/225G11C16/20G11C16/30G11C2207/2227
    • A semiconductor device including a logic circuit capable of decreasing a leakage current occurred during a standby state is provided. The semiconductor device includes a power supply portion for supplying a first operation voltage or a second operation voltage smaller than the first operation voltage; a P-type low-threshold transistor Tp for receiving the first or the second operation voltage from the power supply portion; and a N-type transistor Tn connected between the transistor Tp and a base potential. The transistors Tp, Tn construct a logic circuit. The power supply portion supplies the first operation voltage to the source of the transistor Tp in the enable state, and supplies the second operation voltage in a standby state. The second operation voltage is set so that voltage amplitude between gate and source of each transistor Tp, Tn is larger than the threshold value of the transistors Tp, Tn.
    • 提供一种包括能够减少在待机状态期间发生的漏电流的逻辑电路的半导体器件。 半导体器件包括用于提供第一操作电压的电源部分或小于第一操作电压的第二操作电压; 用于从电源部分接收第一或第二操作电压的P型低阈值晶体管Tp; 以及连接在晶体管Tp和基极之间的N型晶体管Tn。 晶体管Tp,Tn构成逻辑电路。 电源部在使能状态下将第一工作电压提供给晶体管Tp的源极,将第二工作电压供给到待机状态。 第二操作电压被设置为使得每个晶体管Tp,Tn的栅极和源极之间的电压幅度大于晶体管Tp,Tn的阈值。