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1. 发明申请

US20100306632A1 ERROR DETECTION USING PARITY COMPENSATION IN BINARY CODED DECIMAL AND DENSELY PACKED DECIMAL CONVERSIONS 失效
标题翻译：在二进制编码的十进制和密封包装的十进制转换中使用奇偶校验的错误检测
公开(公告)号：US20100306632A1
公开(公告)日：2010-12-02
申请号：US12472519
申请日：2009-05-27
申请人： Steven R. Carlough , Mark A. Erle , Michael R. Kelly
发明人： Steven R. Carlough , Mark A. Erle , Michael R. Kelly
IPC分类号： H03M13/11 , G06F11/10
CPC分类号： H03M7/12 , H03M13/09
摘要： Error detection using parity compensation in binary coded decimal (BCD) and densely packed decimal (DPD) conversions, including a computer program product having a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes receiving formatted decimal data in a first format, the formatted decimal data consisting of a DPD format data or a BCD format data. One or more first parity bits are generated by converting the received data into a second format of the formatted decimal data, and by determining the parity of the data in the second format. One or more second parity bits are generated directly from the received data. An error flag is set to indicate an error in the data in the second format in response to the first parity bits not being equal to the second parity bits.
摘要翻译：使用二进制编码十进制（BCD）和密集十进制（DPD）转换中的奇偶校验的误差检测，包括具有由处理电路可读的有形存储介质的计算机程序产品，并且存储由处理电路执行以执行方法的指令。该方法包括以第一格式接收格式化的十进制数据，格式化的十进制数据由DPD格式数据或BCD格式数据组成。通过将接收到的数据转换成格式化的十进制数据的第二格式，并且通过确定第二格式的数据的奇偶校验来生成一个或多个第一奇偶校验位。从接收的数据直接生成一个或多个第二奇偶校验位。响应于第一奇偶校验位不等于第二奇偶校验位，错误标志被设置为指示第二格式的数据中的错误。

2. 发明授权

US08286061B2 Error detection using parity compensation in binary coded decimal and densely packed decimal conversions 失效
标题翻译：使用二进制编码十进制和密集十进制转换中的奇偶补偿进行错误检测
公开(公告)号：US08286061B2
公开(公告)日：2012-10-09
申请号：US12472519
申请日：2009-05-27
申请人： Steven R. Carlough , Mark A. Erle , Michael R. Kelly
发明人： Steven R. Carlough , Mark A. Erle , Michael R. Kelly
IPC分类号： H03M13/00
CPC分类号： H03M7/12 , H03M13/09
摘要： Error detection using parity compensation in binary coded decimal (BCD) and densely packed decimal (DPD) conversions, including a computer program product having a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes receiving formatted decimal data in a first format, the formatted decimal data consisting of a DPD format data or a BCD format data. One or more first parity bits are generated by converting the received data into a second format of the formatted decimal data, and by determining the parity of the data in the second format. One or more second parity bits are generated directly from the received data. An error flag is set to indicate an error in the data in the second format in response to the first parity bits not being equal to the second parity bits.
摘要翻译：使用二进制编码十进制（BCD）和密集十进制（DPD）转换中的奇偶校验的误差检测，包括具有由处理电路可读的有形存储介质的计算机程序产品，并且存储由处理电路执行以执行方法的指令。该方法包括以第一格式接收格式化的十进制数据，格式化的十进制数据由DPD格式数据或BCD格式数据组成。通过将接收到的数据转换成格式化的十进制数据的第二格式，并且通过确定第二格式的数据的奇偶校验来生成一个或多个第一奇偶校验位。从接收的数据直接生成一个或多个第二奇偶校验位。响应于第一奇偶校验位不等于第二奇偶校验位，错误标志被设置为指示第二格式的数据中的错误。

3. 发明授权

US08572141B2 Execution of fixed point instructions using a decimal floating point unit 有权
标题翻译：使用十进制浮点单元执行定点指令
公开(公告)号：US08572141B2
公开(公告)日：2013-10-29
申请号：US12051333
申请日：2008-03-19
申请人： Steven R. Carlough , Adam B. Collura , Mark A. Erle , Wen H. Li , Eric M. Schwarz
发明人： Steven R. Carlough , Adam B. Collura , Mark A. Erle , Wen H. Li , Eric M. Schwarz
IPC分类号： G06F15/00 , G06F7/00 , G06F7/52
CPC分类号： G06F7/483 , G06F2207/4911
摘要： A decimal floating point (DFP) unit is used to execute fixed point instructions. Two or more operands are accepted, wherein each operand is in a packed binary coded decimal (BCD) format. Any invalid BCD formats are detected by checking the operands for any invalid BCD codes. It is determined if an exception flag exists and, if so, outputting the flag; it is determined if a condition code exists and, if so, outputting the code. An operation is performed on the two or more operands to generate a result; wherein the operation takes place directly on BCD data, thus using the DFP unit to perform a BCD operation; appending a result sign to the result of the operation; and providing the result of the operation and the appended result sign as a result output in a packed BCD format.
摘要翻译：使用十进制浮点（DFP）单位执行固定点指令。接受两个或多个操作数，其中每个操作数都是压缩的二进制编码十进制（BCD）格式。通过检查任何无效的BCD代码的操作数来检测任何无效的BCD格式。确定是否存在异常标志，如果是，则输出该标志; 确定条件代码是否存在，如果是，则输出代码。对两个或更多个操作数执行操作以产生结果; 其中操作直接发生在BCD数据上，因此使用DFP单元执行BCD操作; 将结果符号附加到操作结果; 并提供操作结果和附加结果符号作为输出的压缩BCD格式的结果。

4. 发明申请

US20090240753A1 METHOD, HARDWARE PRODUCT, AND COMPUTER PROGRAM PRODUCT FOR USING A DECIMAL FLOATING POINT UNIT TO EXECUTE FIXED POINT INSTRUCTIONS 有权
标题翻译：方法，硬件产品和计算机程序产品，用于使用十进制浮点单元执行固定点说明
公开(公告)号：US20090240753A1
公开(公告)日：2009-09-24
申请号：US12051333
申请日：2008-03-19
申请人： Steven R. Carlough , Adam B. Collura , Mark A. Erle , Wen H. Li , Eric M. Schwarz
发明人： Steven R. Carlough , Adam B. Collura , Mark A. Erle , Wen H. Li , Eric M. Schwarz
IPC分类号： G06F7/38
CPC分类号： G06F7/483 , G06F2207/4911
摘要： A decimal floating point (DFP) unit is used to execute fixed point instructions. Two or more operands are accepted, wherein each operand is in a packed binary coded decimal (BCD) format. Any invalid BCD formats are detected by checking the operands for any invalid BCD codes. It is determined if an exception flag exists and, if so, outputting the flag; it is determined if a condition code exists and, if so, outputting the code. An operation is performed on the two or more operands to generate a result; wherein the operation takes place directly on BCD data, thus using the DFP unit to perform a BCD operation; appending a result sign to the result of the operation; and providing the result of the operation and the appended result sign as a result output in a packed BCD format.
摘要翻译：使用十进制浮点（DFP）单位执行固定点指令。接受两个或多个操作数，其中每个操作数都是压缩的二进制编码十进制（BCD）格式。通过检查任何无效的BCD代码的操作数来检测任何无效的BCD格式。确定是否存在异常标志，如果是，则输出该标志; 确定条件代码是否存在，如果是，则输出代码。对两个或更多个操作数执行操作以产生结果; 其中操作直接发生在BCD数据上，因此使用DFP单元执行BCD操作; 将结果符号附加到操作结果; 并提供操作结果和附加结果符号作为输出的压缩BCD格式的结果。

5. 发明授权

US09229722B2 Major branch instructions with transactional memory 有权
公开(公告)号：US09229722B2
公开(公告)日：2016-01-05
申请号：US13362513
申请日：2012-01-31
申请人： Fadi Y. Busaba , Steven R. Carlough , Christopher A. Krygowski , Brian R. Prasky , Chung-Lung K. Shum
发明人： Fadi Y. Busaba , Steven R. Carlough , Christopher A. Krygowski , Brian R. Prasky , Chung-Lung K. Shum
IPC分类号： G06F9/30 , G06F9/40 , G06F9/46 , G06F9/38 , G06F9/32 , G06F9/52
CPC分类号： G06F9/3804 , G06F9/3005 , G06F9/30145 , G06F9/322 , G06F9/3842 , G06F9/3851 , G06F9/46 , G06F9/466 , G06F9/467 , G06F9/528
摘要： Major branch instructions are provided that enable execution of a computer program to branch from one segment of code to another segment of code. These instructions also create a new stream of processing at the other segment of code enabling execution of the other segment of code to be performed in parallel with the segment of code from which the branch was taken. In one example, the other stream of processing starts a transaction for processing instructions of the other stream of processing.

6. 发明授权

US09021493B2 Management of resources within a computing environment 有权
公开(公告)号：US09021493B2
公开(公告)日：2015-04-28
申请号：US13615704
申请日：2012-09-14
申请人： Fadi Y. Busaba , Steven R. Carlough , Christopher A. Krygowski , Brian R. Prasky , Chung-Lung K. Shum
发明人： Fadi Y. Busaba , Steven R. Carlough , Christopher A. Krygowski , Brian R. Prasky , Chung-Lung K. Shum
IPC分类号： G06F9/46 , G06F9/38 , G06F9/50
CPC分类号： G06F9/5038 , G06F9/38 , G06F9/45533 , G06F9/4881 , G06F9/50 , G06F9/5011 , G06F9/5016 , G06F9/5077 , G06F2009/45591 , G06F2209/483 , G06F2209/5021 , G06F2209/504 , G06F2209/507 , G06F2209/508 , Y02B70/30 , Y02D10/22
摘要： Resources in a computing environment are managed, for example, by a hardware controller controlling dispatching of resources from one or more pools of resources to be used in execution of threads. The controlling includes conditionally dispatching resources from the pool(s) to one or more low-priority threads of the computing environment based on current usage of resources in the pool(s) relative to an associated resource usage threshold. The management further includes monitoring resource dispatching from the pool(s) to one or more high-priority threads of the computing environment, and based on the monitoring, dynamically adjusting the resource usage threshold used in the conditionally dispatching of resources from the pool(s) to the low-priority thread(s).

7. 发明申请

US20140082625A1 MANAGEMENT OF RESOURCES WITHIN A COMPUTING ENVIRONMENT 有权
标题翻译：在计算环境中的资源管理
公开(公告)号：US20140082625A1
公开(公告)日：2014-03-20
申请号：US13615704
申请日：2012-09-14
申请人： Fadi Y. Busaba , Steven R. Carlough , Christopher A. Krygowski , Brian R. Prasky , Chung-Lung K. Shum
发明人： Fadi Y. Busaba , Steven R. Carlough , Christopher A. Krygowski , Brian R. Prasky , Chung-Lung K. Shum
IPC分类号： G06F9/50
CPC分类号： G06F9/5038 , G06F9/38 , G06F9/45533 , G06F9/4881 , G06F9/50 , G06F9/5011 , G06F9/5016 , G06F9/5077 , G06F2009/45591 , G06F2209/483 , G06F2209/5021 , G06F2209/504 , G06F2209/507 , G06F2209/508 , Y02B70/30 , Y02D10/22
摘要： Resources in a computing environment are managed, for example, by a hardware controller controlling dispatching of resources from one or more pools of resources to be used in execution of threads. The controlling includes conditionally dispatching resources from the pool(s) to one or more low-priority threads of the computing environment based on current usage of resources in the pool(s) relative to an associated resource usage threshold. The management further includes monitoring resource dispatching from the pool(s) to one or more high-priority threads of the computing environment, and based on the monitoring, dynamically adjusting the resource usage threshold used in the conditionally dispatching of resources from the pool(s) to the low-priority thread(s).
摘要翻译：计算环境中的资源例如通过硬件控制器进行管理，硬件控制器控制从用于执行线程的一个或多个资源池中调度资源。所述控制包括基于所述池中的资源相对于相关联的资源使用阈值的当前使用情况，将资源从所述池有条件地调度到所述计算环境的一个或多个低优先级线程。该管理还包括监视从该池到该计算环境的一个或多个高优先级线程的资源调度，并且基于该监视，动态地调整在从池中有条件地分派资源中使用的资源使用阈值）到低优先级线程。

8. 发明申请

US20140019803A1 HARDWARE RECOVERY IN MULTI-THREADED PROCESSOR 有权
标题翻译：多线程处理器中的硬件恢复
公开(公告)号：US20140019803A1
公开(公告)日：2014-01-16
申请号：US13548448
申请日：2012-07-13
申请人： Fadi Y. Busaba , Steven R. Carlough , Christopher A. Krygowski , Brian R. Prasky , Chung-Lung K. Shum
发明人： Fadi Y. Busaba , Steven R. Carlough , Christopher A. Krygowski , Brian R. Prasky , Chung-Lung K. Shum
IPC分类号： G06F11/14
CPC分类号： G06F11/1479 , G06F11/1438
摘要： A computer system includes a simultaneous multi-threading processor and memory in operable communication with the processor. The processor is configured to perform a method including running multiple threads simultaneously, detecting a hardware error in one or more hardware structures of the processing circuit, and identifying one or more victim threads of the multiple threads. The processor is further configured to identify a plurality of hardware structures associated with execution of the one or more victim threads, isolate the one or more victim threads from the rest of the multiple threads by preventing access to the plurality of hardware structures by the multiple threads, flush the one or more victim threads by resetting hardware states of the plurality of hardware structures, and restore the one or more victim threads by restoring the plurality of hardware structures to a known safe state.
摘要翻译：计算机系统包括同时多线程处理器和与处理器可操作地通信的存储器。处理器被配置为执行包括同时运行多个线程的方法，检测处理电路的一个或多个硬件结构中的硬件错误，以及识别多个线程的一个或多个受害者线程。所述处理器还被配置为识别与所述一个或多个受害者线程的执行相关联的多个硬件结构，通过所述多个线程阻止对所述多个硬件结构的访问来将所述一个或多个受害者线程与所述多个线程的其余部分隔离通过重置多个硬件结构的硬件状态来刷新一个或多个受害者线程，并通过将多个硬件结构恢复到已知的安全状态来恢复一个或多个受害者线程。

9. 发明申请

US20130191599A1 CACHE SET REPLACEMENT ORDER BASED ON TEMPORAL SET RECORDING 有权
标题翻译：基于时间设置记录的缓存设置替换顺序
公开(公告)号：US20130191599A1
公开(公告)日：2013-07-25
申请号：US13354894
申请日：2012-01-20
申请人： Fadi Y. Busaba , Steven R. Carlough , Christopher A. Krygowski , Brian R. Prasky , Chung-Lung K. Shum
发明人： Fadi Y. Busaba , Steven R. Carlough , Christopher A. Krygowski , Brian R. Prasky , Chung-Lung K. Shum
IPC分类号： G06F12/12
CPC分类号： G06F12/0875 , G06F12/126
摘要： A technique is provided for cache management of a cache. The processing circuit determines a miss count and a hit position field during a previous execution of an instruction requesting that a data element be stored in a cache. The miss count and the hit position field are stored for a data element corresponding to an instruction that requests storage of the data element. The processing circuit places the data element in a hierarchical order based on the miss count and/or the hit position field. The hit position field includes a hierarchical position related to the data element in the cache.
摘要翻译：提供了用于高速缓存的高速缓存管理的技术。处理电路在先前执行请求数据元素存储在高速缓存中的指令期间确定未命中和命中位置字段。针对与请求存储数据元素的指令相对应的数据元素存储未命中和命中位置字段。处理电路基于错过次数和/或命中位置字段将数据元素放置成分层次序。命中位置字段包括与缓存中的数据元素相关的分层位置。

10. 发明授权

US08161091B2 Method for performing decimal floating point addition 有权
标题翻译：执行十进制浮点加法的方法
公开(公告)号：US08161091B2
公开(公告)日：2012-04-17
申请号：US12358911
申请日：2009-01-23
申请人： Steven R. Carlough , Wen H. Li , Eric M. Schwarz
发明人： Steven R. Carlough , Wen H. Li , Eric M. Schwarz
IPC分类号： G06F7/485
CPC分类号： G06F7/4912 , G06F2207/4911
摘要： A method for performing a decimal floating point operation including receiving a first operand having a first coefficient and a first exponent into a first register. A second operand having a second coefficient and a second exponent are received into a second register. An operation, either addition or subtraction, associated with the first operand and the second operand is received. Three concurrent calculations are performed on the first operand and the second operand. The three concurrent calculations include: applying the operation to the first operand and the second operand based on a first assumption; applying the operation to the first operand and the second operand based on a second assumption; and applying the operation to the first operand and the second operand based on a third assumption. A final result is selected from the first result, the second result and the third result.
摘要翻译：一种用于执行十进制浮点运算的方法，包括将具有第一系数和第一指数的第一操作数接收到第一寄存器中。具有第二系数和第二指数的第二操作数被接收到第二寄存器中。接收与第一操作数和第二操作数相关联的加法或减法操作。在第一个操作数和第二个操作数上执行三个并发计算。三个并发计算包括：基于第一假设将操作应用于第一操作数和第二操作数; 基于第二假设将操作应用于第一操作数和第二操作数; 以及基于第三假设将所述操作应用于所述第一操作数和所述第二操作数。从第一个结果，第二个结果和第三个结果中选择最终结果。

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