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1. 发明授权

US4969144A Adaptive passband echo canceller 失效
标题翻译：自适应通带回波消除器
公开(公告)号：US4969144A
公开(公告)日：1990-11-06
申请号：US292848
申请日：1989-01-03
申请人： Steven R. Blackwell , Steven E. Turner , Michael D. Turner , Jerry D. Moore
发明人： Steven R. Blackwell , Steven E. Turner , Michael D. Turner , Jerry D. Moore
IPC分类号： H04B3/23
CPC分类号： H04B3/23
摘要： A passband echo canceller achieves improved performance by providing a signal having a substantially uniform power spectral density to an adaptive echo canceller; the improved input signal is substantially uniform from approximately zero hertz to one half the operating or sample frequency of the echo canceller. This signal may comprise that range of frequencies occupied by the transmitted spectrum with added out of band noise.
摘要翻译：通带回波消除器通过向自适应回波消除器提供具有基本上均匀的功率谱密度的信号来实现改进的性能; 改进的输入信号从近似零赫兹到回声消除器的操作或采样频率的一半是基本均匀的。该信号可以包括由带外噪声带来的发射频谱占据的频率范围。

2. 发明授权

US10282563B2 Video-based privacy supporting system 有权
公开(公告)号：US10282563B2
公开(公告)日：2019-05-07
申请号：US12701504
申请日：2010-02-05
申请人： William Robert Anderson , Steven E. Turner , Steven Pujia
发明人： William Robert Anderson , Steven E. Turner , Steven Pujia
IPC分类号： G06F3/01 , G06F21/32 , G06F21/62 , G06F21/84
摘要： Computer display privacy and security for computer systems. In one aspect, the invention provides a computer-controlled system for regulating the interaction between a computer and a user of the computer based on the environment of the computer and the user. For example, the computer-controlled system provided by the invention comprises an input-output device including an image sensor configured to collect facial recognition data proximate to the computer. The system also includes a user security parameter database encoding security parameters associated with the user; the database is also configured to communicate with the security processor. The security processor is configured to receive the facial recognition data and the security parameters associated with the user, and is further configured to at least partially control the operation of the data input device and the data output device in response to the facial recognition data and the security parameters associated with the user.

3. 发明授权

US09536097B2 Method and apparatus for secure display of visual content 有权
标题翻译：用于安全显示视觉内容的方法和装置
公开(公告)号：US09536097B2
公开(公告)日：2017-01-03
申请号：US13874508
申请日：2013-05-01
申请人： William Anderson , Steven E. Turner , Steven J. Pujia , George L. Heron
发明人： William Anderson , Steven E. Turner , Steven J. Pujia , George L. Heron
IPC分类号： H04L17/02 , G06F21/84 , G06F21/60 , H04N13/04
CPC分类号： G06F21/60 , G06F21/84 , H04N13/341 , H04N2013/403
摘要： Methods and apparatus for displaying visual content on a display such that the content is comprehensible only to an authorized user for a visual display system such as a computer, a television, a video player, a public display system (including but not limited to a movie theater), a mobile phone, an automated teller machine (ATM), voting booths, kiosks, security screening workstations, tactical displays and other systems where information is displayed for viewing.
摘要翻译：用于在显示器上显示视觉内容的方法和装置，使得该内容仅对视觉显示系统的授权用户是可理解的，诸如计算机，电视，视频播放器，公共显示系统（包括但不限于电影剧院），移动电话，自动取款机（ATM），投票亭，报亭，安全检查工作站，战术显示器和其他信息显示供观看的系统。

4. 发明申请

US20140013437A1 METHOD AND APPARATUS FOR SECURE DISPLAY OF VISUAL CONTENT 有权
标题翻译：用于安全显示视觉内容的方法和装置
公开(公告)号：US20140013437A1
公开(公告)日：2014-01-09
申请号：US13874508
申请日：2013-05-01
申请人： William Anderson , Steven E. Turner , Steven J. Pujia , George L. Heron
发明人： William Anderson , Steven E. Turner , Steven J. Pujia , George L. Heron
IPC分类号： G06F21/60
CPC分类号： G06F21/60 , G06F21/84 , H04N13/341 , H04N2013/403
摘要： Methods and apparatus for displaying visual content on a display such that the content is comprehensible only to an authorized user for a visual display system such as a computer, a television, a video player, a public display system (including but not limited to a movie theater), a mobile phone, an automated teller machine (ATM), voting booths, kiosks, security screening workstations, tactical displays and other systems where information is displayed for viewing.
摘要翻译：用于在显示器上显示视觉内容的方法和装置，使得该内容仅对视觉显示系统的授权用户是可理解的，诸如计算机，电视，视频播放器，公共显示系统（包括但不限于电影剧院），移动电话，自动取款机（ATM），投票亭，报亭，安全检查工作站，战术显示器和其他信息显示供观看的系统。

5. 发明申请

US20110199127A1 Phase Accumulator Generating Reference Phase for Phase Coherent Direct Digital Synthesis Outputs 有权
标题翻译：相位相位直接数字合成输出的相位累加器产生参考相位
公开(公告)号：US20110199127A1
公开(公告)日：2011-08-18
申请号：US12704840
申请日：2010-02-12
申请人： Steven E. Turner
发明人： Steven E. Turner
IPC分类号： H03B21/00
CPC分类号： G06F1/0335 , G06F2211/902
摘要： A phase accumulator generates phase data for a direct digital synthesis (DDS) device based on a reference phase to provide analog sinusoidal outputs that are locked to the reference phase and thus phase coherent. The frequency of a sinusoidal DDS output may be controlled by changing a frequency control word (FCW) provided to the phase accumulator without affecting the incrementing reference phase. The sinusoidal DDS output is based on a multiple of the FCW and the reference phase and thus remains locked to the reference phase, providing phase coherency even when the FCW changes to change the frequency.
摘要翻译：相位累加器基于参考相位产生用于直接数字合成（DDS）装置的相位数据，以提供锁定到参考相位并因此相位相干的模拟正弦输出。可以通过改变提供给相位累加器的频率控制字（FCW）而不影响递增参考相位来控制正弦DDS输出的频率。正弦DDS输出基于FCW和参考相位的倍数，因此保持锁定到参考相位，即使当FCW改变频率时，也提供相位一致性。

6. 发明申请

US20110197237A1 Controlled Delivery of Content Data Streams to Remote Users 审中-公开
标题翻译：将内容数据流控制传送给远程用户
公开(公告)号：US20110197237A1
公开(公告)日：2011-08-11
申请号：US13123372
申请日：2009-10-09
申请人： Steven E. Turner
发明人： Steven E. Turner
IPC分类号： H04N7/18
CPC分类号： H04N21/6377 , H04N21/2343 , H04N21/25816 , H04N21/4227 , H04N21/44209 , H04N21/4788 , H04N21/6373 , H04N21/64769 , H04N21/658 , H04N21/6587
摘要： The present system provides a website for distributing a plurality of content data streams converted into a common format, wherein each content data stream is encrypted and transmission of the content data stream is a function of available transmission rates to a given remote device.
摘要翻译：本系统提供用于分发转换成公共格式的多个内容数据流的网站，其中每个内容数据流被加密，并且内容数据流的传输是到给定远程设备的可用传输速率的函数。

7. 发明授权

US08664990B2 Coherent phase locked loop 有权
标题翻译：相干锁相环
公开(公告)号：US08664990B2
公开(公告)日：2014-03-04
申请号：US13761300
申请日：2013-02-07
申请人： Steven E. Turner , Lawrence J. Kushner
发明人： Steven E. Turner , Lawrence J. Kushner
IPC分类号： H03L7/06
CPC分类号： H03L7/1976
摘要： In a fractional-n Phase Locked Loop the frequency control word multiplies by the output of a reference counter to provide the carry bit utilized in n/n+1 switching.
摘要翻译：在小数n-锁相环中，频率控制字乘以参考计数器的输出，以提供在n / n + 1切换中使用的进位位。

8. 发明授权

US08583714B2 ROM-based direct digital synthesizer with pipeline delay circuit 有权
标题翻译：具有流水线延迟电路的基于ROM的直接数字合成器
公开(公告)号：US08583714B2
公开(公告)日：2013-11-12
申请号：US12704828
申请日：2010-02-12
申请人： Steven E. Turner
发明人： Steven E. Turner
IPC分类号： G06F1/02
CPC分类号： G06F1/0328
摘要： A DDS system is disclosed that is configured to provide a variable clock delay that allows timing of data coming out of the ROM to be adjusted. In one example case, a DDS system is provided that includes a ROM for storing phase-to-amplitude conversion data and generating digital amplitude values corresponding to respective digital phase values, and delay circuitry for adjusting timing of data output by the ROM to compensate for propagation delay of the DDS system. The delay circuitry may include, for instance, delay elements that can be selected alone or in combination to adjust the timing. The timing can be adjusted, for example, by adjusting delay of a clock signal that clocks one or more ROM pipeline registers. The system may include a phase accumulator and DAC, and adjusting the timing may include adjusting delay of a clock signal that clocks one or more DAC pipeline registers.
摘要翻译：公开了一种DDS系统，其被配置为提供允许调整从ROM出来的数据定时的可变时钟延迟。在一个示例情况下，提供了一种DDS系统，其包括用于存储相位到幅度转换数据的ROM并且产生对应于各个数字相位值的数字幅度值的延迟电路，以及用于调整由ROM输出的数据的定时以补偿 DDS系统的传播延迟。延迟电路可以包括例如可以单独或组合地选择以调整定时的延迟元件。可以例如通过调整对一个或多个ROM流水线寄存器进行定时的时钟信号的延迟来调整定时。该系统可以包括相位累加器和DAC，并且调整定时可以包括调整对一个或多个DAC流水线寄存器进行计时的时钟信号的延迟。

9. 发明授权

US08115519B2 Phase accumulator generating reference phase for phase coherent direct digital synthesis outputs 有权
标题翻译：相位累加器产生相位相干直接数字合成输出的参考相位
公开(公告)号：US08115519B2
公开(公告)日：2012-02-14
申请号：US12704840
申请日：2010-02-12
申请人： Steven E. Turner
发明人： Steven E. Turner
IPC分类号： H03B21/00
CPC分类号： G06F1/0335 , G06F2211/902
摘要： A phase accumulator generates phase data for a direct digital synthesis (DDS) device based on a reference phase to provide analog sinusoidal outputs that are locked to the reference phase and thus phase coherent. The frequency of a sinusoidal DDS output may be controlled by changing a frequency control word (FCW) provided to the phase accumulator without affecting the incrementing reference phase. The sinusoidal DDS output is based on a multiple of the FCW and the reference phase and thus remains locked to the reference phase, providing phase coherency even when the FCW changes to change the frequency.
摘要翻译：相位累加器基于参考相位产生用于直接数字合成（DDS）装置的相位数据，以提供锁定到参考相位并因此相位相干的模拟正弦输出。可以通过改变提供给相位累加器的频率控制字（FCW）而不影响递增参考相位来控制正弦DDS输出的频率。正弦DDS输出基于FCW和参考相位的倍数，因此保持锁定到参考相位，即使当FCW改变频率时，也提供相位一致性。

10. 发明申请

US20110199128A1 ROM-Based Direct Digital Synthesizer with Pipeline Delay Circuit 有权
标题翻译：基于ROM的直接数字合成器与管道延迟电路
公开(公告)号：US20110199128A1
公开(公告)日：2011-08-18
申请号：US12704828
申请日：2010-02-12
申请人： Steven E. Turner
发明人： Steven E. Turner
IPC分类号： H03B21/00
CPC分类号： G06F1/0328
摘要： A DDS system is disclosed that is configured to provide a variable clock delay that allows timing of data coming out of the ROM to be adjusted. In one example case, a DDS system is provided that includes a ROM for storing phase-to-amplitude conversion data and generating digital amplitude values corresponding to respective digital phase values, and delay circuitry for adjusting timing of data output by the ROM to compensate for propagation delay of the DDS system. The delay circuitry may include, for instance, delay elements that can be selected alone or in combination to adjust the timing. The timing can be adjusted, for example, by adjusting delay of a clock signal that clocks one or more ROM pipeline registers. The system may include a phase accumulator and DAC, and adjusting the timing may include adjusting delay of a clock signal that clocks one or more DAC pipeline registers.
摘要翻译：公开了一种DDS系统，其被配置为提供允许调整从ROM出来的数据定时的可变时钟延迟。在一个示例情况下，提供了一种DDS系统，其包括用于存储相位到幅度转换数据的ROM并且产生对应于各个数字相位值的数字幅度值的延迟电路，以及用于调整由ROM输出的数据的定时以补偿 DDS系统的传播延迟。延迟电路可以包括例如可以单独或组合地选择以调整定时的延迟元件。可以例如通过调整对一个或多个ROM流水线寄存器进行定时的时钟信号的延迟来调整定时。该系统可以包括相位累加器和DAC，并且调整定时可以包括调整对一个或多个DAC流水线寄存器进行计时的时钟信号的延迟。

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