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    • 6. 发明授权
    • Efficient pitch multiplication process
    • 高效的音调乘法过程
    • US08012674B2
    • 2011-09-06
    • US12687005
    • 2010-01-13
    • Mark FischerStephen RussellH. Montgomery Manning
    • Mark FischerStephen RussellH. Montgomery Manning
    • G03F7/26
    • H01L29/06H01L21/0338H01L21/3088
    • Pitch multiplied and non-pitch multiplied features of an integrated circuit, e.g., features in the array, interface and periphery areas of the integrated circuit, are formed by processing a substrate through a mask. The mask is formed by patterning a photoresist layer which simultaneously defines mask elements corresponding to features in the array, interface and periphery areas of the integrated circuit. The pattern is transferred to an amorphous carbon layer. Sidewall spacers are formed on the sidewalls of the patterned amorphous carbon layer. A layer of protective material is deposited and then patterned to expose mask elements in the array region and in selected parts of the interface or periphery areas. Amorphous carbon in the array region or other exposed parts is removed, thereby leaving a pattern including free-standing, pitch multiplied spacers in the array region. The protective material is removed, leaving a pattern of pitch multiplied spacers in the array region and non-pitch multiplied mask elements in the interface and periphery areas. The pattern is transferred to a hard mask layer, through which an underlying substrate is etched.
    • 通过通过掩模处理衬底来形成集成电路的间距倍增和非间距倍数特征,例如集成电路的阵列,接口和外围区域中的特征。 通过图案化光刻胶层来形成掩模,该光致抗蚀剂层同时限定对应于集成电路的阵列,界面和外围区域中的特征的掩模元件。 将图案转移到无定形碳层。 侧壁间隔物形成在图案化无定形碳层的侧壁上。 沉积一层保护材料,然后将其图案化以暴露阵列区域中的掩模元件和界面或外围区域的选定部分。 除去阵列区域或其它暴露部分中的无定形碳,从而在阵列区域中留下包括独立的,间距倍增的间隔物的图案。 去除保护材料,在阵列区域中留下间距倍数间隔物的图案,并在界面和外围区域留下非间距倍增的掩模元件。 将图案转移到硬掩模层,通过该硬掩模层蚀刻下面的基底。
    • 9. 发明授权
    • Efficient pitch multiplication process
    • 高效的音调乘法过程
    • US07666578B2
    • 2010-02-23
    • US11521851
    • 2006-09-14
    • Mark FischerStephen RussellH. Montgomery Manning
    • Mark FischerStephen RussellH. Montgomery Manning
    • G03F7/26G03F7/00
    • H01L29/06H01L21/0338H01L21/3088
    • Pitch multiplied and non-pitch multiplied features of an integrated circuit, e.g., features in the array, interface and periphery areas of the integrated circuit, are formed by processing a substrate through a mask. The mask is formed by patterning a photoresist layer which simultaneously defines mask elements corresponding to features in the array, interface and periphery areas of the integrated circuit. The pattern is transferred to an amorphous carbon layer. Sidewall spacers are formed on the sidewalls of the patterned amorphous carbon layer. A layer of protective material is deposited and then patterned to expose mask elements in the array region and in selected parts of the interface or periphery areas. Amorphous carbon in the array region or other exposed parts is removed, thereby leaving a pattern including free-standing, pitch multiplied spacers in the array region. The protective material is removed, leaving a pattern of pitch multiplied spacers in the array region and non-pitch multiplied mask elements in the interface and periphery areas. The pattern is transferred to a hard mask layer, through which an underlying substrate is etched.
    • 通过通过掩模处理衬底来形成集成电路的间距倍增和非间距倍数特征,例如集成电路的阵列,接口和外围区域中的特征。 通过图案化光刻胶层来形成掩模,该光致抗蚀剂层同时限定对应于集成电路的阵列,界面和外围区域中的特征的掩模元件。 将图案转移到无定形碳层。 侧壁间隔物形成在图案化无定形碳层的侧壁上。 沉积一层保护材料,然后将其图案化以暴露阵列区域中的掩模元件和界面或外围区域的选定部分。 除去阵列区域或其它暴露部分中的无定形碳,从而在阵列区域中留下包括独立的,间距倍增的间隔物的图案。 去除保护材料,在阵列区域中留下间距倍数间隔物的图案,并在界面和外围区域留下非间距倍增的掩模元件。 将图案转移到硬掩模层,通过该硬掩模层蚀刻下面的基底。