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1. 发明申请

US20070082591A1 ABRASIVE HOLDER 有权
标题翻译：磨具
公开(公告)号：US20070082591A1
公开(公告)日：2007-04-12
申请号：US11538178
申请日：2006-10-03
申请人： Stephen Hope , Robert Welcome , Jason Jones
发明人： Stephen Hope , Robert Welcome , Jason Jones
IPC分类号： B24D11/00
CPC分类号： B24D15/023 , B24D15/04
摘要： An abrasive tool comprising of a base portion (2), having a foam layer (3) affixed to the abrasive tool base portion, and a plastic film layer (4) affixed, bonded or glued to the foam layer. This tool is adapted to receive an abrasive material layer (5) or sand paper or other abrasive material having a pressure sensitive adhesive applied to one side of the abrasive material, to allow said abrasive material to be stuck and affixed to the abrasive tool. The abrasive tool may be hand operated, or operated by electric power, air power, or other motive power.
摘要翻译：一种研磨工具，包括具有固定到研磨工具基部的泡沫层（3）的基部（2）和粘附或胶合到泡沫层上的塑料膜层（4）。该工具适于接纳研磨材料层（5）或砂纸或其它具有施加到研磨材料一侧的压敏粘合剂的研磨材料，以允许所述研磨材料粘贴并固定在研磨工具上。研磨工具可以是手动操作的，或者由电力，空气动力或其他动力来操作。

2. 发明授权

US08334489B2 Photovoltaic system with managed output and method of managing variability of output from a photovoltaic system 有权
标题翻译：具有管理输出的光伏系统和管理光伏系统输出变化的方法
公开(公告)号：US08334489B2
公开(公告)日：2012-12-18
申请号：US12721372
申请日：2010-03-10
申请人： Greg Beardsworth , Matt Campbell , Steve Kraft , Jason Jones
发明人： Greg Beardsworth , Matt Campbell , Steve Kraft , Jason Jones
IPC分类号： G01C21/00 , F24J2/38
CPC分类号： H02S40/00 , F24S50/20 , H02S50/00 , H02S50/10 , Y02E10/47 , Y02E10/52
摘要： Photovoltaic systems with managed output and methods for managing variability of output from photovoltaic systems are described. A system includes a plurality of photovoltaic modules configured to receive and convert solar energy. The system also includes a sensor configured to determine an orientation for each of the plurality of photovoltaic modules, the orientations based on a maximum output from the photovoltaic system. The system also includes an orientation system configured to alter the orientation of one or more of the plurality of photovoltaic modules to provide a reduced output from the photovoltaic system, the reduced output less than the maximum output.
摘要翻译：描述了具有管理输出的光伏系统和管理光伏系统输出变化的方法。一种系统包括被配置为接收和转换太阳能的多个光伏模块。该系统还包括被配置为基于来自光伏系统的最大输出来确定多个光伏模块中的每一个的取向的传感器。该系统还包括被配置为改变多个光伏模块中的一个或多个的取向的取向系统，以提供来自光伏系统的减小的输出，该输出小于最大输出。

3. 外观设计

USD564958S1 Support base for solar collector assembly 有权
公开(公告)号：USD564958S1
公开(公告)日：2008-03-25
申请号：US29278260
申请日：2007-03-23
申请人： Charles Almy , Jason Jones
设计人： Charles Almy , Jason Jones

4. 发明申请

US20060259660A1 Data Transfer With Single Channel Controller Controlling Plural Transfer Controllers 有权
标题翻译：数据传输与单通道控制器控制多个传输控制器
公开(公告)号：US20060259660A1
公开(公告)日：2006-11-16
申请号：US11383063
申请日：2006-05-12
申请人： Roger Castille , Natarajan Seshan , Henry C. Nguyen , Marco Lazar , Jason Jones
发明人： Roger Castille , Natarajan Seshan , Henry C. Nguyen , Marco Lazar , Jason Jones
IPC分类号： G06F3/00
CPC分类号： G06F13/28
摘要： A data transfer control apparatus includes a channel controller and plural transfer controllers. The channel controller receives, prioritizes and queues data transfer requests. An event to transfer controller table enables recall of a transfer controller number corresponding to the data transfer request. The plural transfer controllers are independent and can operate simultaneously in parallel. Each transfer controller includes a read bus interface and a write bus interface which arbitrate with other bus masters in the case of blocking accesses directed to interfering devices or address ranges.
摘要翻译：数据传送控制装置包括信道控制器和多个传送控制器。信道控制器接收数据传输请求的优先次序和队列。传输控制器表的事件使得能够调用对应于数据传送请求的传送控制器号码。多个传送控制器是独立的并且可以同时并行操作。每个传送控制器包括一读读总线接口和一写写总线接口，在阻塞对干扰设备或地址范围的访问的情况下，与其它总线主机进行仲裁。

5. 发明授权

US06438720B1 Host port interface 失效
标题翻译：主机端口接口
公开(公告)号：US06438720B1
公开(公告)日：2002-08-20
申请号：US08488394
申请日：1995-06-07
申请人： Frederic Boutaud , Jason Jones , Marc Couvrat , Oliver Mougenot , Mansoor A. Chishtie
发明人： Frederic Boutaud , Jason Jones , Marc Couvrat , Oliver Mougenot , Mansoor A. Chishtie
IPC分类号： G01R3128
CPC分类号： G06F11/24
摘要： A circuit for interfacing a processor with a host processor is provided that has a memory associated with the processor that is selectively accessible by either both the processors or by the host processor, a plurality of storage devices selectively interconnectable with the memory and host processor, and a logic circuit interconnected with the storage devices and processors for interconnecting at least a portion of the storage devices to the memory in response to signals from the processors. An integrated circuit is provided that has a microprocessor, a memory associated with said processor that is selectively accessible by said microprocessor or a host processor, a plurality of storage devices selectively interconnectable with said memory and said host processor, and a logic circuit interconnected with said storage devices and interconnectable with said processors for interconnecting at least a portion of said storage devices to said memory in response to signals from said processors.
摘要翻译：提供了一种用于将处理器与主机处理器进行接口的电路，其具有与处理器相关联的存储器，所述存储器可由处理器或主机处理器可选择地访问，可选择地与存储器和主机处理器互连的多个存储设备，以及与存储设备和处理器互连的逻辑电路，用于响应于来自处理器的信号将存储设备的至少一部分互连到存储器。提供了一种集成电路，其具有微处理器，与所述处理器相关联的存储器，所述存储器可由所述微处理器或主机处理器选择性地访问，可选择地与所述存储器和所述主处理器相互连接的多个存储设备，以及与所述主处理器互连的逻辑电路存储设备并且可与所述处理器互连，用于响应于来自所述处理器的信号将所述存储设备的至少一部分互连到所述存储器。

6. 发明授权

US5838934A Host port interface 失效
公开(公告)号：US5838934A
公开(公告)日：1998-11-17
申请号：US471900
申请日：1995-06-07
申请人： Frederic Boutaud , Jason Jones , Marc Couvrat , Oliver Mougenot , Mansoor A. Chishtie
发明人： Frederic Boutaud , Jason Jones , Marc Couvrat , Oliver Mougenot , Mansoor A. Chishtie
IPC分类号： G06F13/28 , G06F13/38 , G06F13/00
CPC分类号： G06F13/28 , G06F13/385
摘要： A circuit for interfacing a processor with a host processor is provided that has a memory associated with the processor that is selectively accessible by either both the processors or by the host processor, a plurality of storage devices selectively interconnectable with the memory and host processor, and a logic circuit interconnected with the storage devices and processors for interconnecting at least a portion of the storage devices to the memory in response to signals from the processors. An integrated circuit is provided that has a microprocessor, a memory associated with said processor that is selectively accessible by said microprocessor or a host processor, a plurality of storage devices selectively interconnectable with said memory and said host processor, and a logic circuit interconnected with said storage devices and interconnectable with said processors for interconnecting at least a portion of said storage devices to said memory in response to signals from said processors.

7. 发明授权

US5734927A System having registers for receiving data, registers for transmitting data, both at a different clock rate, and control circuitry for shifting the different clock rates 失效
标题翻译：具有用于接收数据的寄存器，用于以不同时钟速率发送数据的寄存器的系统以及用于移位不同时钟速率的控制电路
公开(公告)号：US5734927A
公开(公告)日：1998-03-31
申请号：US489463
申请日：1995-06-08
申请人： Frederic Boutaud , Marc Couvrat , Yves Masse , Mansoor A. Chishtie , Alain Vallauri , Ajay Padgaonkar , Jason Jones
发明人： Frederic Boutaud , Marc Couvrat , Yves Masse , Mansoor A. Chishtie , Alain Vallauri , Ajay Padgaonkar , Jason Jones
IPC分类号： G06F13/16 , G06F13/00
CPC分类号： G06F13/1673
摘要： An electronic device for transferring data between a serial port and a memory of a CPU is provided having a plurality of data registers for transferring data between said serial port and said memory in response to a first set of control signals, a data bus connected to said registers and said memory for passing data to and from said memory in response to a portion of said first set of control signals, first control circuitry for generating said first set of control signals and for generating at least one interrupt to said CPU, at least one control register connected to said first control circuitry for providing mode control information to said first control circuitry, a plurality of address registers for storing data address, at least one address generator connected to said address registers for automatically generating addresses in response to a second set of control signals, an address bus connected to said address registers, and second control circuitry connected to said address generator, a portion of said control register and said first control circuitry for generating said second set of control signals.
摘要翻译：提供一种用于在CPU的串行端口和存储器之间传送数据的电子设备，其具有多个数据寄存器，用于响应于第一组控制信号在所述串行端口和所述存储器之间传送数据，连接到所述串行端口的数据总线寄存器和用于响应于所述第一组控制信号的一部分将数据传送到所述存储器的所述存储器，用于产生所述第一组控制信号并用于向所述CPU产生至少一个中断的第一控制电路，至少一个连接到所述第一控制电路的控制寄存器，用于向所述第一控制电路提供模式控制信息，多个用于存储数据地址的地址寄存器，连接到所述地址寄存器的至少一个地址发生器，用于响应于第二组控制信号，连接到所述地址寄存器的地址总线，以及连接到所述地址字的第二控制电路所述控制寄存器的一部分和所述第一控制电路用于产生所述第二组控制信号。

8. 发明申请

US20080230047A1 Stackable Tracking Solar Collector Assembly 有权
标题翻译：可堆叠跟踪太阳能集热器组件
公开(公告)号：US20080230047A1
公开(公告)日：2008-09-25
申请号：US12021682
申请日：2008-01-29
申请人： Daniel S. Shugar , Charles Almy , John Peurach , Nathaniel T. Coleman , Jason Jones , Reuben Sandler
发明人： Daniel S. Shugar , Charles Almy , John Peurach , Nathaniel T. Coleman , Jason Jones , Reuben Sandler
IPC分类号： F24J2/02 , B23P15/26
CPC分类号： F24S30/428 , F24S25/11 , F24S25/617 , F24S2025/012 , F24S2025/013 , F24S2030/131 , F24S2030/136 , F24S2030/16 , H02S10/30 , H02S20/00 , H02S20/10 , H02S20/32 , Y02E10/47 , Y02E10/50 , Y10T29/49355
摘要： A solar collector assembly may include a frame supporting a solar collector and a frame member defining a tilted pivot axis. Support struts may be used to elevate one end of the frame and may be pivoted between an orientation generally parallel to the frame member and to an orientation generally away from the frame. Anchorless, ballast type bases may be used to support the solar collector assembly. Several assemblies may be stacked on top of one another in a storage or transportation configuration using spacers extending between the frames.
摘要翻译：太阳能收集器组件可以包括支撑太阳能收集器的框架和限定倾斜的枢转轴线的框架构件。支撑支柱可以用于提升框架的一端并且可以在大致平行于框架构件的取向与通常远离框架的取向之间枢转。无锚式压载式底座可用于支撑太阳能收集器组件。多个组件可以在使用在框架之间延伸的间隔物的存储或运输配置中彼此堆叠。

9. 外观设计

USD565505S1 Tracking solar collector assembly 有权
标题翻译：跟踪太阳能集热器组件
公开(公告)号：USD565505S1
公开(公告)日：2008-04-01
申请号：US29278262
申请日：2007-03-23
申请人： Daniel G. Shugar , Charles Almy , Jason Jones
设计人： Daniel G. Shugar , Charles Almy , Jason Jones

10. 发明授权

US09743501B2 Apparatuses to support photovoltaic modules 有权
公开(公告)号：US09743501B2
公开(公告)日：2017-08-22
申请号：US14272794
申请日：2014-05-08
申请人： John Ciasulli , Jason Jones
发明人： John Ciasulli , Jason Jones
IPC分类号： H05F3/00 , F24J2/52 , F16M13/02 , H02S20/00 , H02S20/30
CPC分类号： H05F3/00 , F16M13/02 , F24S25/617 , F24S25/63 , F24S25/632 , F24S25/634 , F24S25/65 , F24S2025/6006 , H02S20/00 , H02S20/30 , H02S30/00 , H02S40/34 , Y02E10/47 , Y02E10/50 , Y10T29/49002
摘要： Methods and apparatuses to support photovoltaic (“PV”) modules are described. A saddle bracket has a mounting surface to support one or more PV modules over a tube, a gusset coupled to the mounting surface, and a mounting feature coupled to the gusset to couple to the tube. A grounding washer has a first portion to couple to a support; and a second portion coupled to the first portion to provide a ground path to a PV module. A PV system has a saddle bracket; a PV module over the saddle bracket; and a grounding washer coupled to the saddle bracket and the PV module. Saddle brackets can be coupled to a torque tube at predetermined locations. PV modules can be coupled to the saddle brackets.

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