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1. 发明授权

US08614616B2 Semiconductor device and method of manufacture thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08614616B2
公开(公告)日：2013-12-24
申请号：US13008591
申请日：2011-01-18
申请人： Stefan Willkofer , Uwe Wahl , Bernhard Knott , Markus Hammer , Andreas Strasser
发明人： Stefan Willkofer , Uwe Wahl , Bernhard Knott , Markus Hammer , Andreas Strasser
IPC分类号： H01F5/00 , H01F27/28
CPC分类号： H01L23/4952 , H01F2017/0086 , H01L23/48 , H01L23/49575 , H01L23/5227 , H01L23/645 , H01L24/45 , H01L24/48 , H01L24/49 , H01L25/0657 , H01L28/10 , H01L2224/32145 , H01L2224/32245 , H01L2224/45144 , H01L2224/45147 , H01L2224/48247 , H01L2224/4903 , H01L2224/49107 , H01L2224/73215 , H01L2224/73265 , H01L2924/00014 , H01L2924/01322 , H01L2924/14 , H01L2924/19042 , H01L2924/19102 , H01L2924/19104 , H01L2924/19107 , Y10T29/4902 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device, a method of manufacturing a semiconductor device and a method for transmitting a signal are disclosed. In accordance with an embodiment of the present invention, the semiconductor device comprises a first semiconductor chip comprising a first coil, a second semiconductor chip comprising a second coil inductively coupled to the first coil, and an isolating intermediate layer between the first semiconductor chip and the second semiconductor chip.
摘要翻译：公开了半导体器件，半导体器件的制造方法和发送信号的方法。根据本发明的实施例，半导体器件包括第一半导体芯片，其包括第一线圈，第二半导体芯片，包括感应耦合到第一线圈的第二线圈，以及在第一半导体芯片和第二线圈之间的隔离中间层第二半导体芯片。

2. 发明申请

US20120181874A1 Semiconductor Device and Method of Manufacture Thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120181874A1
公开(公告)日：2012-07-19
申请号：US13008591
申请日：2011-01-18
申请人： Stefan Willkofer , Uwe Wahl , Bernhard Knott , Markus Hammer , Andreas Strasser
发明人： Stefan Willkofer , Uwe Wahl , Bernhard Knott , Markus Hammer , Andreas Strasser
IPC分类号： H01F38/14 , H01L21/50 , H01L23/52
CPC分类号： H01L23/4952 , H01F2017/0086 , H01L23/48 , H01L23/49575 , H01L23/5227 , H01L23/645 , H01L24/45 , H01L24/48 , H01L24/49 , H01L25/0657 , H01L28/10 , H01L2224/32145 , H01L2224/32245 , H01L2224/45144 , H01L2224/45147 , H01L2224/48247 , H01L2224/4903 , H01L2224/49107 , H01L2224/73215 , H01L2224/73265 , H01L2924/00014 , H01L2924/01322 , H01L2924/14 , H01L2924/19042 , H01L2924/19102 , H01L2924/19104 , H01L2924/19107 , Y10T29/4902 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device, a method of manufacturing a semiconductor device and a method for transmitting a signal are disclosed. In accordance with an embodiment of the present invention, the semiconductor device comprises a first semiconductor chip comprising a first coil, a second semiconductor chip comprising a second coil inductively coupled to the first coil, and an isolating intermediate layer between the first semiconductor chip and the second semiconductor chip.
摘要翻译：公开了半导体器件，半导体器件的制造方法和发送信号的方法。根据本发明的实施例，半导体器件包括第一半导体芯片，其包括第一线圈，第二半导体芯片，包括感应耦合到第一线圈的第二线圈，以及在第一半导体芯片和第二线圈之间的隔离中间层第二个半导体芯片。

3. 发明申请

US20120273917A1 High Voltage Resistance Coupling Structure 有权
标题翻译：高压电阻耦合结构
公开(公告)号：US20120273917A1
公开(公告)日：2012-11-01
申请号：US13538043
申请日：2012-06-29
申请人： Uwe Wahl , Markus Hammer , Jens-Peer Stengl
发明人： Uwe Wahl , Markus Hammer , Jens-Peer Stengl
IPC分类号： H01L23/52 , H01L21/76
CPC分类号： H01L23/5227 , H01L23/3178 , H01L23/585 , H01L23/642 , H01L24/03 , H01L24/05 , H01L2224/02166 , H01L2224/03462 , H01L2224/03464 , H01L2224/05155 , H01L2224/05644 , H01L2924/01029 , H01L2924/13091 , H01L2924/14 , H01L2924/01015
摘要： The disclosed invention provides a structure and method for providing a high lateral voltage resistance between the electrical networks, sharing a lateral plane, of conductive elements (e.g., having different high voltage potentials) comprising a coupler. In one embodiment, an integrated coupler providing a high lateral voltage resistance comprises a primary conductive element and a secondary conductive element. An isolating material is laterally configured between the electrical network of the primary conductive element and an electrical network of the secondary conductive element. The isolating material may comprise a low-k dielectric layer and prevents any lateral barrier layers (e.g., etch stop layers, diffusion barrier layers, etc.) from extending between the first conductive element and the electrical network of the second conductive element. The structure therefore provides a galvanically isolated integrated coupler which avoids electrical shorting between circuits (e.g., at barrier layers) resulting in an improved high voltage resistance.
摘要翻译：所公开的发明提供了一种用于在包括耦合器的导电元件（例如，具有不同的高电压电位）的共享横向平面的电网之间提供高横向电压电阻的结构和方法。在一个实施例中，提供高横向电压电阻的集成耦合器包括主导电元件和次导电元件。隔离材料横向配置在主要导电元件的电网和次级导电元件的电网之间。隔离材料可以包括低k电介质层，并且防止任何侧向阻挡层（例如，蚀刻停止层，扩散阻挡层等）在第一导电元件和第二导电元件的电网之间延伸。因此，该结构提供了一种电隔离的集成耦合器，其避免了电路之间的电短路（例如，在阻挡层处），导致改进的高耐电压。

4. 发明授权

US08790985B2 High voltage resistance coupling structure 有权
标题翻译：高压电阻耦合结构
公开(公告)号：US08790985B2
公开(公告)日：2014-07-29
申请号：US13538043
申请日：2012-06-29
申请人： Uwe Wahl , Markus Hammer , Jens-Peer Stengl
发明人： Uwe Wahl , Markus Hammer , Jens-Peer Stengl
IPC分类号： H01L21/76
CPC分类号： H01L23/5227 , H01L23/3178 , H01L23/585 , H01L23/642 , H01L24/03 , H01L24/05 , H01L2224/02166 , H01L2224/03462 , H01L2224/03464 , H01L2224/05155 , H01L2224/05644 , H01L2924/01029 , H01L2924/13091 , H01L2924/14 , H01L2924/01015
摘要： The disclosed invention provides a structure and method for providing a high lateral voltage resistance between the electrical networks, sharing a lateral plane, of conductive elements (e.g., having different high voltage potentials) comprising a coupler. In one embodiment, an integrated coupler providing a high lateral voltage resistance comprises a primary conductive element and a secondary conductive element. An isolating material is laterally configured between the electrical network of the primary conductive element and an electrical network of the secondary conductive element. The isolating material may comprise a low-k dielectric layer and prevents any lateral barrier layers (e.g., etch stop layers, diffusion barrier layers, etc.) from extending between the first conductive element and the electrical network of the second conductive element. The structure therefore provides a galvanically isolated integrated coupler which avoids electrical shorting between circuits (e.g., at barrier layers) resulting in an improved high voltage resistance.
摘要翻译：所公开的发明提供了一种用于在包括耦合器的导电元件（例如，具有不同的高电压电位）的共享横向平面的电网之间提供高横向电压电阻的结构和方法。在一个实施例中，提供高横向电压电阻的集成耦合器包括主导电元件和次导电元件。隔离材料横向配置在主要导电元件的电网和次级导电元件的电网之间。隔离材料可以包括低k电介质层，并且防止任何侧向阻挡层（例如，蚀刻停止层，扩散阻挡层等）在第一导电元件和第二导电元件的电网之间延伸。因此，该结构提供了一种电隔离的集成耦合器，其避免了电路之间的电短路（例如，在阻挡层处），导致改进的高耐电压。

5. 发明授权

US08278730B2 High voltage resistance coupling structure 有权
标题翻译：高压电阻耦合结构
公开(公告)号：US08278730B2
公开(公告)日：2012-10-02
申请号：US12607230
申请日：2009-10-28
申请人： Uwe Wahl , Markus Hammer , Jens-Peer Stengl
发明人： Uwe Wahl , Markus Hammer , Jens-Peer Stengl
IPC分类号： H01L21/70
CPC分类号： H01L23/5227 , H01L23/3178 , H01L23/585 , H01L23/642 , H01L24/03 , H01L24/05 , H01L2224/02166 , H01L2224/03462 , H01L2224/03464 , H01L2224/05155 , H01L2224/05644 , H01L2924/01029 , H01L2924/13091 , H01L2924/14 , H01L2924/01015
摘要： The disclosed invention provides a structure and method for providing a high lateral voltage resistance between the electrical networks, sharing a lateral plane, of conductive elements (e.g., having different high voltage potentials) comprising a coupler. In one embodiment, an integrated coupler providing a high lateral voltage resistance comprises a primary conductive element and a secondary conductive element. An isolating material is laterally configured between the electrical network of the primary conductive element and an electrical network of the secondary conductive element. The isolating material may comprise a low-k dielectric layer and prevents any lateral barrier layers (e.g., etch stop layers, diffusion barrier layers, etc.) from extending between the first conductive element and the electrical network of the second conductive element. The structure therefore provides a galvanically isolated integrated coupler which avoids electrical shorting between circuits (e.g., at barrier layers) resulting in an improved high voltage resistance.
摘要翻译：所公开的发明提供了一种用于在包括耦合器的导电元件（例如，具有不同的高电压电位）的共享横向平面的电网之间提供高横向电压电阻的结构和方法。在一个实施例中，提供高横向电压电阻的集成耦合器包括主导电元件和次导电元件。隔离材料横向配置在主要导电元件的电网和次级导电元件的电网之间。隔离材料可以包括低k电介质层，并且防止任何侧向阻挡层（例如，蚀刻停止层，扩散阻挡层等）在第一导电元件和第二导电元件的电网之间延伸。因此，该结构提供了一种电隔离的集成耦合器，其避免了电路之间的电短路（例如，在阻挡层处），导致改进的高耐电压。

6. 发明申请

US20110095392A1 HIGH VOLTAGE RESISTANCE COUPLING STRUCTURE 有权
标题翻译：高电阻耦合结构
公开(公告)号：US20110095392A1
公开(公告)日：2011-04-28
申请号：US12607230
申请日：2009-10-28
申请人： Uwe Wahl , Markus Hammer , Jens-Peer Stengl
发明人： Uwe Wahl , Markus Hammer , Jens-Peer Stengl
IPC分类号： H01L29/06 , H01L21/762
CPC分类号： H01L23/5227 , H01L23/3178 , H01L23/585 , H01L23/642 , H01L24/03 , H01L24/05 , H01L2224/02166 , H01L2224/03462 , H01L2224/03464 , H01L2224/05155 , H01L2224/05644 , H01L2924/01029 , H01L2924/13091 , H01L2924/14 , H01L2924/01015
摘要： The disclosed invention provides a structure and method for providing a high lateral voltage resistance between the electrical networks, sharing a lateral plane, of conductive elements (e.g., having different high voltage potentials) comprising a coupler. In one embodiment, an integrated coupler providing a high lateral voltage resistance comprises a primary conductive element and a secondary conductive element. An isolating material is laterally configured between the electrical network of the primary conductive element and an electrical network of the secondary conductive element. The isolating material may comprise a low-k dielectric layer and prevents any lateral barrier layers (e.g., etch stop layers, diffusion barrier layers, etc.) from extending between the first conductive element and the electrical network of the second conductive element. The structure therefore provides a galvanically isolated integrated coupler which avoids electrical shorting between circuits (e.g., at barrier layers) resulting in an improved high voltage resistance.
摘要翻译：所公开的发明提供了一种用于在包括耦合器的导电元件（例如，具有不同的高电压电位）的共享横向平面的电网之间提供高横向电压电阻的结构和方法。在一个实施例中，提供高横向电压电阻的集成耦合器包括主导电元件和次导电元件。隔离材料横向配置在主要导电元件的电网和次级导电元件的电网之间。隔离材料可以包括低k电介质层，并且防止任何侧向阻挡层（例如，蚀刻停止层，扩散阻挡层等）在第一导电元件和第二导电元件的电网之间延伸。因此，该结构提供了一种电隔离的集成耦合器，其避免了电路之间的电短路（例如，在阻挡层处），导致改进的高耐电压。

7. 发明申请

US20130249602A1 Semiconductor Arrangement with a Power Transistor and a High Voltage Device Integrated in a Common Semiconductor Body 有权
标题翻译：集成在公共半导体器件中的功率晶体管和高电压器件的半导体布置
公开(公告)号：US20130249602A1
公开(公告)日：2013-09-26
申请号：US13429579
申请日：2012-03-26
申请人： Anton Mauder , Franz Hirler , Joachim Weyers , Uwe Wahl
发明人： Anton Mauder , Franz Hirler , Joachim Weyers , Uwe Wahl
IPC分类号： H03K3/00 , H01L29/78
CPC分类号： H01L29/7811 , H01L27/0629 , H01L27/088 , H01L29/0619 , H01L29/0653 , H01L29/404 , H01L29/407 , H01L29/7801 , H01L29/7803 , H01L29/7804 , H01L29/7813 , H01L29/7825 , H01L29/7838 , H01L29/8605 , H01L29/8611
摘要： A semiconductor arrangement includes a semiconductor body and a power transistor including a source region, a drain region, a body region and a drift region arranged in the semiconductor body, a gate electrode arranged adjacent to the body region and dielectrically insulated from the body region by a gate dielectric. The semiconductor arrangement further includes a high voltage device arranged within a well-like dielectric structure in the semiconductor body and comprising a further drift region.
摘要翻译：半导体装置包括半导体本体和功率晶体管，功率晶体管包括布置在半导体本体中的源区域，漏极区域，体区域和漂移区域，与主体区域相邻布置并与身体区域介电绝缘的栅电极，栅极电介质。半导体装置还包括布置在半导体本体内的类似阱介质结构内的高电压装置，并且包括另外的漂移区域。

8. 发明申请

US20110176339A1 Signal Transmission Arrangement 有权
标题翻译：信号传输布置
公开(公告)号：US20110176339A1
公开(公告)日：2011-07-21
申请号：US12689086
申请日：2010-01-18
申请人： Martin Kerber , Jens-Peer Stengl , Uwe Wahl
发明人： Martin Kerber , Jens-Peer Stengl , Uwe Wahl
IPC分类号： H02M3/335 , H01L23/528 , H01L21/50
CPC分类号： H01L25/50 , H01F27/2804 , H01L23/48 , H01L23/481 , H01L23/5227 , H01L23/645 , H01L24/48 , H01L25/0657 , H01L2224/48463 , H01L2225/0651 , H01L2225/06524 , H01L2225/06527 , H01L2225/06544 , H01L2225/06548 , H01L2225/06555 , H01L2924/00014 , H01L2924/01068 , H01L2924/13055 , H01L2924/13091 , H01L2924/14 , H01L2924/30107 , H02M3/33523 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A signal transmission arrangement is disclosed. A voltage converter includes a signal transmission arrangement.
摘要翻译：公开了一种信号传输装置。电压转换器包括信号传输装置。

9. 发明申请

US20070080395A1 Lateral SOI component having a reduced on resistance 有权
标题翻译：具有降低导通电阻的横向SOI元件
公开(公告)号：US20070080395A1
公开(公告)日：2007-04-12
申请号：US11527760
申请日：2006-09-26
申请人： Uwe Wahl , Ralf Rudolf , Dirk Priefert
发明人： Uwe Wahl , Ralf Rudolf , Dirk Priefert
IPC分类号： H01L29/76
CPC分类号： H01L29/78624 , H01L29/0623 , H01L29/0692 , H01L29/0878 , H01L29/402 , H01L29/404 , H01L29/407 , H01L29/7803 , H01L29/7808 , H01L29/7818 , H01L29/7824 , H01L29/78639 , H01L29/861
摘要： An SOI semiconductor component comprises a semiconductor substrate having a basic doping, a dielectric layer arranged on the semiconductor substrate, and a semiconductor layer arranged on the dielectric layer. The semiconductor layer includes a drift zone of a first conduction type, a junction between the drift zone and a further component zone which is configured in such a way that a space charge zone is formed in the drift zone when a reverse voltage is applied to the junction, and a terminal zone adjacent to the drift zone. A first terminal electrode is connected to the further component zone, and a second terminal electrode is connected to the terminal zone. In the semiconductor substrate a first semiconductor zone is doped complementarily with respect to a basic doping of the semiconductor substrate, and the first terminal electrode is connected to the first semiconductor zone. A rectifier element is connected between the first terminal electrode and the first semiconductor zone.
摘要翻译： SOI半导体部件包括具有基本掺杂的半导体衬底，布置在半导体衬底上的电介质层和布置在电介质层上的半导体层。半导体层包括第一导电类型的漂移区域，漂移区域和另一组件区域之间的结，该区域构造成使得当反向电压施加到漂移区域时在漂移区域中形成空间电荷区域结和与漂移区相邻的终端区。第一端子电极连接到另一组件区域，并且第二端子电极连接到端子区域。在半导体衬底中，第一半导体区相对于半导体衬底的基本掺杂互补地掺杂，并且第一端电极连接到第一半导体区。整流元件连接在第一端子电极和第一半导体区域之间。

10. 发明授权

US09087707B2 Semiconductor arrangement with a power transistor and a high voltage device integrated in a common semiconductor body 有权
标题翻译：具有集成在公共半导体主体中的功率晶体管和高压器件的半导体装置
公开(公告)号：US09087707B2
公开(公告)日：2015-07-21
申请号：US13429579
申请日：2012-03-26
申请人： Anton Mauder , Franz Hirler , Joachim Weyers , Uwe Wahl
发明人： Anton Mauder , Franz Hirler , Joachim Weyers , Uwe Wahl
IPC分类号： H01L29/78 , H03K3/00 , H01L27/06 , H01L27/088 , H01L29/40 , H01L29/861 , H01L29/8605 , H01L29/06
CPC分类号： H01L29/7811 , H01L27/0629 , H01L27/088 , H01L29/0619 , H01L29/0653 , H01L29/404 , H01L29/407 , H01L29/7801 , H01L29/7803 , H01L29/7804 , H01L29/7813 , H01L29/7825 , H01L29/7838 , H01L29/8605 , H01L29/8611
摘要： A semiconductor arrangement includes a semiconductor body and a power transistor including a source region, a drain region, a body region and a drift region arranged in the semiconductor body, a gate electrode arranged adjacent to the body region and dielectrically insulated from the body region by a gate dielectric. The semiconductor arrangement further includes a high voltage device arranged within a well-like dielectric structure in the semiconductor body and comprising a further drift region.
摘要翻译：半导体装置包括半导体本体和功率晶体管，功率晶体管包括布置在半导体本体中的源区域，漏极区域，体区域和漂移区域，与主体区域相邻布置并与身体区域介电绝缘的栅电极，栅极电介质。半导体装置还包括布置在半导体本体内的类似阱介质结构内的高电压装置，并且包括另外的漂移区域。

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