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    • 7. 发明授权
    • Electrically erasable, directly overwritable, multibit single cell
memory elements and arrays fabricated therefrom
    • 电可擦除的直接可重写的多单元单元存储元件和由其制造的阵列
    • US5534711A
    • 1996-07-09
    • US423484
    • 1995-04-19
    • Stanford R. OvshinskyDavid A. StrandWolodymyr CzubatyjPatrick Klersy
    • Stanford R. OvshinskyDavid A. StrandWolodymyr CzubatyjPatrick Klersy
    • G11C11/56G11C16/02H01L27/24H01L45/00
    • G11C13/0004G11C11/56G11C11/5678H01L27/2409H01L27/2463H01L45/06H01L45/12H01L45/1233H01L45/144G11C13/04G11C2213/72
    • The present invention comprises an electrically operated, directly overwritable, multibit, single-cell memory element. The memory element includes a volume of memory material which defines the single cell memory element. The memory material is characterized by: (1) a large dynamic range of electrical resistance values; and (2) the ability to be set at one of a plurality of resistance values within said dynamic range in response to selected electrical input signals so as to provide said single cell with multibit storage capabilities. The memory element also includes a pair of spacedly disposed contacts for supplying the electrical input signal to set the memory material to a selected resistance value within the dynamic range. At least a filamentary portion of the singIe cell memory element being setable, by the selected electrical signal to any resistance value in said dynamic range, regardless of the previous resistance value of said material. The memory element further includes a filamentary portion controlling means disposed between the volume of memory material and at least one of the spacedly disposed contacts. The controlling means defining the size and position of the filamentary portion during electrical formation of the memory element and limiting the size and confining the location of the filamentary portion during use of the memory element, thereby providing for a high current density within the filamentary portion of the single cell memory element upon input of a very low total current electrical signal to the spacedly disposed contacts.
    • 本发明包括电操作的直接覆盖的多位单个单元存储元件。 存储元件包括限定单个单元存储元件的一定量的存储器材料。 记忆材料的特征在于:(1)电阻值的大动态范围; 以及(2)响应于所选择的电输入信号在所述动态范围内被设置为多个电阻值之一的能力,以便向所述单个单元提供多位存储能力。 存储元件还包括一对间隔设置的触点,用于提供电输入信号以将存储器材料设置在动态范围内的所选电阻值。 所述单元存储元件的至少一个细长部分可通过所选择的电信号被设置成所述动态范围内的任何电阻值,而与所述材料的先前电阻值无关。 存储元件还包括设置在存储器材料体积与间隔设置的触点中的至少一个之间的丝状部分控制装置。 控制装置在存储元件的电气形成期间限定丝状部分的尺寸和位置,并且在存储元件的使用期间限制尺寸并限制丝状部分的位置,由此提供丝网部分内的高电流密度 当输入非常低的总电流电信号到间隔布置的触点时,单个单元存储元件。
    • 8. 发明授权
    • Electrically erasable, directly overwritable, multibit single cell
memory elements and arrays fabricated therefrom
    • 电可擦除的直接可重写的多单元单元存储元件和由其制造的阵列
    • US5406509A
    • 1995-04-11
    • US46249
    • 1993-04-12
    • Stanford R. OvshinskyQiuyi YeDavid A. StrandWolodymyr Czubatyj
    • Stanford R. OvshinskyQiuyi YeDavid A. StrandWolodymyr Czubatyj
    • G11C11/56G11C16/02H01L27/24H01L45/00G11C17/14
    • G11C13/0004G11C11/56G11C11/5678H01L27/2409H01L45/085H01L45/1233H01L45/144G11C13/04G11C2213/72
    • The present invention comprises an electrically operated, directly overwritable, multibit, single-cell memory element. The memory element includes a volume of memory material which defines the single cell memory element. The memory material is characterized by: (1) a large dynamic range of electrical resistance values; and (2) the ability to be set at one of a plurality of resistance values within said dynamic range in response to selected electrical input signals so as to provide said single cell with multibit storage capabilities. The memory element also includes a pair of spacedly disposed contacts for supplying the electrical input signal to set the memory material to a selected resistance value within the dynamic range. At least a filamentary portion of the single cell memory element being setable, by the selected electrical signal to any resistance value in said dynamic range, regardless of the previous resistance value of said material. The memory element further includes a filamentary portion controlling means disposed between the volume of memory material and at least one of the spacedly disposed contacts. The controlling means defining the size and position of the filamentary portion during electrical formation of the memory element and limiting the size and confining the location of the filamentary portion during use of the memory element, thereby providing for a high current density within the filamentary portion of the single cell memory element upon input of a very low total current electrical signal to the spacedly disposed contacts.
    • 本发明包括电操作的直接覆盖的多位单个单元存储元件。 存储元件包括限定单个单元存储元件的一定量的存储器材料。 记忆材料的特征在于:(1)电阻值的大动态范围; 以及(2)响应于所选择的电输入信号在所述动态范围内被设置为多个电阻值之一的能力,以便向所述单个单元提供多位存储能力。 存储元件还包括一对间隔设置的触点,用于提供电输入信号以将存储器材料设置在动态范围内的所选电阻值。 所述单个单元存储元件的至少一个细长部分可被所选择的电信号设定到所述动态范围内的任何电阻值,而与所述材料的先前电阻值无关。 存储元件还包括设置在存储器材料体积与间隔设置的触点中的至少一个之间的丝状部分控制装置。 控制装置在存储元件的电气形成期间限定丝状部分的尺寸和位置,并且在存储元件的使用期间限制尺寸并限制丝状部分的位置,由此提供丝网部分内的高电流密度 当输入非常低的总电流电信号到间隔布置的触点时,单个单元存储元件。