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1. 发明授权

US6078565A Method and apparatus to expand an on chip FIFO into local memory 失效
标题翻译：将片上FIFO扩展到本地存储器的方法和装置
公开(公告)号：US6078565A
公开(公告)日：2000-06-20
申请号：US879359
申请日：1997-06-20
申请人： Simoni Ben-Michael , Michael Ben-Nun , Yifat Ben-Shahar
发明人： Simoni Ben-Michael , Michael Ben-Nun , Yifat Ben-Shahar
IPC分类号： H04Q3/00 , G06F5/06 , H04L12/56 , H04Q11/04 , H04L12/28 , H04J1/16
CPC分类号： H04L12/5602 , G06F5/06 , H04Q11/0478 , H04L2012/5679 , H04L2012/5681
摘要： A relatively small FIFO queue is located on a semiconductor chip receiving and transmitting data in a computer system, typically a computer network. The FIFO queue has additional storage capability in the form of an expansion into the local memory of the computer system. The front and back ends of the FIFO, which are involved in receiving and transmitting data, are implemented on the chip. The FIFO expands into the space provided in the local memory only when the on-chip portion of the FIFO is full. The middle portion of the FIFO resides in expansion in the local memory. The local memory is accessed only in bursts of multiple credits, both for read transactions and for write transactions.
摘要翻译：相对较小的FIFO队列位于半导体芯片上，在计算机系统（通常为计算机网络）中接收和发送数据。 FIFO队列具有扩展到计算机系统的本地存储器形式的附加存储能力。涉及数据接收和发送的FIFO的前端和后端都在芯片上实现。只有当FIFO的片上部分已满时，FIFO才会扩展到本地存储器中提供的空间。 FIFO的中间部分驻留在本地存储器中。本地内存只能以多个学分的突发访问，无论是读取事务还是写入事务。

2. 发明授权

US5568651A Method for detection of configuration types and addressing modes of a dynamic RAM 失效
标题翻译：用于检测动态RAM的配置类型和寻址模式的方法
公开(公告)号：US5568651A
公开(公告)日：1996-10-22
申请号：US333809
申请日：1994-11-03
申请人： Eitan Medina , Simoni Ben-Michael , Yifat Ben-Shahar , Niamh Darcy
发明人： Eitan Medina , Simoni Ben-Michael , Yifat Ben-Shahar , Niamh Darcy
IPC分类号： G06F12/06 , H04L12/56 , H04Q11/04 , G06F13/00 , H04L12/28
CPC分类号： G06F12/0684 , H04Q11/0478 , H04L2012/5616 , H04L2012/5681
摘要： A method providing automating detection of configuration between an adapter device and a DRAM device. Such a method a determines, in the adapter memory, the DRAM configuration, making it easier to change DRAM configuration in an existing board without the need to modify configuration pins in the existing board. A method for determining a configuration type in an Asynchronous Transfer Mode (ATM) communications network comprising the steps of providing an ATM adapter, the ATM adapter having an ATM adapter memory, providing a DRAM device, the DRAM device having a DRAM configuration, providing a link to connect the ATM adapter and the DRAM device, assuming, in the ATM adapter memory, a first DRAM configuration, verifying the step of assuming, and repeating the steps of assuming and verifying until the first DRAM configuration is determined.
摘要翻译：一种提供在适配器装置和DRAM装置之间自动检测配置的方法。这种方法a在适配器存储器中确定DRAM配置，使得更容易地改变现有板中的DRAM配置，而不需要修改现有板中的配置引脚。一种用于确定异步传输模式（ATM）通信网络中的配置类型的方法，包括以下步骤：提供ATM适配器，所述ATM适配器具有ATM适配器存储器，提供DRAM设备，所述DRAM设备具有DRAM配置，链接以连接ATM适配器和DRAM设备，假设在ATM适配器存储器中，第一DRAM配置，验证假设的步骤，并且重复假定和验证的步骤直到确定第一DRAM配置。

3. 发明授权

US5649110A Traffic shaping system with virtual circuit table time stamps for asynchronous transfer mode networks 失效
标题翻译：具有用于异步传输模式网络的虚拟电路表时间戳的流量整形系统
公开(公告)号：US5649110A
公开(公告)日：1997-07-15
申请号：US335281
申请日：1994-11-07
申请人： Michael Ben-Nun , Simoni Ben-Michael , Moshe De-Leon , Peter John Roman , Kadangode K. Ramakrishnan , G. Paul Koning
发明人： Michael Ben-Nun , Simoni Ben-Michael , Moshe De-Leon , Peter John Roman , Kadangode K. Ramakrishnan , G. Paul Koning
IPC分类号： H04L12/56 , G06F3/00
CPC分类号： H04L12/5602 , H04L2012/5679 , H04L2012/568
摘要： A system for controlling the transmission of cells from a network node over multiple virtual circuit is disclosed. The disclosed system performs traffic shaping for all virtual circuits connected with the network node. The system includes a virtual circuit table with one or more entries. Each virtual circuit table entry corresponds to a virtual circuit established with the network node. Each virtual circuit table further includes one or more Cell Rate Accumulator fields and a Time Stamp field. The system includes a schedule table having one or more entries. Each schedule table entry further includes one or more Cell Rate Accumulator fields and corresponding predetermined value fields. A schedule table loading process determines a virtual circuit on which a packet is to be transmitted, and then calculates a time elapsed since a last previous write of a virtual circuit table entry corresponding with that virtual circuit. The schedule table loading process then adds the time elapsed to the value of the Cell Rate Accumulator fields in that virtual circuit table entry, and stores the result of the addition into the corresponding Cell Rate Accumulator fields of the schedule table entry. The system further includes a process for periodically incrementing the Cell Rate Accumulator fields in the schedule table entry. A scanning process periodically increments the Cell Rate Accumulator fields. A transmitting process transmits a cell on the virtual circuit when the value of the Cell Rate Accumulator fields is greater than or equal to the corresponding predetermined values.
摘要翻译：公开了一种用于通过多个虚拟电路来控制来自网络节点的小区的传输的系统。所公开的系统对与网络节点连接的所有虚拟电路执行流量整形。该系统包括具有一个或多个条目的虚拟电路表。每个虚拟电路表条目对应于与网络节点建立的虚拟电路。每个虚拟电路表还包括一个或多个单元速率累加器字段和时间戳字段。该系统包括具有一个或多个条目的日程表。每个调度表条目还包括一个或多个信元速率累加器字段和对应的预定值字段。调度表加载过程确定要在其上发送分组的虚拟电路，然后计算自上一次写入与该虚拟电路相对应的虚拟电路表条目以来经过的时间。调度表加载过程然后将经过的时间加到该虚拟电路表条目中的单元速率累加器字段的值，并将相加的结果存储到调度表条目的相应的单元速率累加器字段中。系统还包括用于周期地增加调度表条目中的信元速率累加器字段的过程。扫描过程周期性地增加单元速率累加器字段。当小区费率累加器字段的值大于或等于相应的预定值时，发送处理在虚拟电路上发送小区。

4. 发明授权

US06101608A Method and apparatus for secure remote wake-up of a computer over a network 失效
标题翻译：用于通过网络安全地远程唤醒计算机的方法和装置
公开(公告)号：US06101608A
公开(公告)日：2000-08-08
申请号：US804097
申请日：1997-02-20
申请人： Thomas J. Schmidt , Larry Huppert , Simoni Ben-Michael , Michael Ben-Nun
发明人： Thomas J. Schmidt , Larry Huppert , Simoni Ben-Michael , Michael Ben-Nun
IPC分类号： H04L12/12 , H04L29/06 , G06F11/00
CPC分类号： H04L63/0838 , H04L12/12 , H04L63/0428 , Y02B60/32 , Y02B60/34
摘要： A method and related apparatus enables one station on a local area network (LAN) 24 to securely wake up another station on the LAN 24 although the stations may be physically remote from each other. A workstation 12, acting as a remote management console, generates a secure wake-up packet 42 intended for a desktop computer 14 on the LAN 24. The desktop computer 14 is operating in a sleep state. The data section of the secure wake-up packet has a particular sequence of data including a synchronization sequence 46, a MAC address sequence 48 and a password sequence 50. The desktop computer 14 has a network interface 64 for detecting and processing secure wake-up packets 70 when that network interface 64 is operating in a remote access control mode. The network interface 64 verifies that MAC address sequence 48 corresponds to the MAC address of the desktop computer 14 and that the password sequence 50 has a predetermined relationship with a password required to wake up the desktop computer 14. The network interface 64 issues a wake-up signal to wake up the desktop computer 14 when a valid secure wake-up packet is processed.
摘要翻译：一种方法和相关装置使得局域网（LAN）24上的一个站可以安全地唤醒LAN 24上的另一个站，尽管这些站可以在物理上彼此远离。用作远程管理控制台的工作站12产生用于LAN 24上的台式计算机14的安全唤醒包42.台式计算机14以睡眠状态工作。安全唤醒包的数据部分具有包括同步序列46，MAC地址序列48和密码序列50的特定数据序列。台式计算机14具有用于检测和处理安全唤醒的网络接口64 当该网络接口64在远程访问控制模式下操作时，分组70。网络接口64验证MAC地址序列48对应于台式计算机14的MAC地址，并且密码序列50与唤醒台式计算机14所需的密码具有预定的关系。网络接口64发出唤醒 - 当处理有效的安全唤醒分组时，唤醒信号来唤醒台式计算机14。

5. 发明授权

US5724513A Traffic shaping system for asynchronous transfer mode networks 失效
标题翻译：用于异步传输模式网络的流量整形系统
公开(公告)号：US5724513A
公开(公告)日：1998-03-03
申请号：US268606
申请日：1994-06-30
申请人： Michael Ben-Nun , Simoni Ben-Michael , Moshe De-Leon
发明人： Michael Ben-Nun , Simoni Ben-Michael , Moshe De-Leon
IPC分类号： H04L12/56 , H04Q11/04 , G06F13/00 , G06F15/163
CPC分类号： H04Q11/0478 , H04L2012/5679 , H04L2012/568
摘要： A system for controlling the transmission of cells from a network node over multiple Virtual Circuits (VCs) is disclosed. The system performs traffic shaping, as required by connection based systems such as Asynchronous Transfer Mode (ATM), for each VC connected with a network node, so that the Quality of Service (Qos) parameters established when the connection was established are not exceeded. The system includes a process for scheduling the transmission of cells from the network node. The scheduling process periodically scans a table having entries corresponding to virtual circuits connected with the network node. During each scan of the table, the scheduler increments a sustainable rate accumulator field and a peak rate accumulator field of each table entry that corresponds with a virtual circuit that is open, and for which there is a cell ready to be transmitted. The scheduler further determines if the sustainable rate accumulator value is greater than or equal to a predetermined value and whether the peak rate accumulator value is greater than or equal to a predetermined value. If both conditions are true, then a cell may be transmitted on the virtual circuit corresponding with that table entry.
摘要翻译：公开了一种用于通过多个虚拟电路（VC）来控制来自网络节点的小区的传输的系统。系统根据与网络节点连接的每个VC的连接系统（如异步传输模式（ATM））的要求进行流量整形，从而不会超过建立连接时建立的服务质量（Qos）参数。该系统包括用于调度来自网络节点的小区的传输的过程。调度过程周期性地扫描具有与与网络节点连接的虚拟电路相对应的条目的表。在表的每次扫描期间，调度器增加每个表条目的可持续速率累加器字段和峰值速率累加器字段，该字段对应于已打开的虚拟电路，并且有一个单元准备好被发送。调度器还确定可持续速率累加器值是否大于或等于预定值，以及峰值速率累加器值是否大于或等于预定值。如果两个条件均为真，则可以在与该表条目对应的虚拟电路上发送一个单元。

6. 发明授权

US5515363A Traffic shaping system with transmit latency feedback for asynchronous transfer mode networks 失效
标题翻译：具有用于异步传输模式网络的传输等待时间反馈的流量整形系统
公开(公告)号：US5515363A
公开(公告)日：1996-05-07
申请号：US268605
申请日：1994-06-30
申请人： Michael Ben-Nun , Simoni Ben-Michael , Moshe De-Leon , G. Paul Koning , Kadangode K. Ramakrishnan , Peter J. Roman
发明人： Michael Ben-Nun , Simoni Ben-Michael , Moshe De-Leon , G. Paul Koning , Kadangode K. Ramakrishnan , Peter J. Roman
IPC分类号： H04L12/56 , H04L12/54
CPC分类号： H04L12/5602 , H04L2012/5636 , H04L2012/5679
摘要： A system for controlling the transmission of cells from a network node over multiple Virtual Circuits (VCs) is disclosed. The system performs traffic shaping, as required by connection based systems such as Asynchronous Transfer Mode (ATM), for each VC connected with a network node, so that the Quality of Service (Qos) parameters established when the connection was established are not exceeded. The system includes a process for scheduling the transmission of cells from the network node. The scheduling process periodically scans a table having entries corresponding to virtual circuits connected with the network node. During each scan of the table, the scheduler increments a sustainable rate accumulator field, a peak rate accumulator field, and a latency accumulator field of each table entry that corresponds with a virtual circuit that is open, and for which there is a cell ready to be transmitted. The scheduler further determines if the sustainable rate accumulator value is greater than or equal to a predetermined value and whether the peak rate accumulator value is greater than or equal to a predetermined value. If both conditions are true, then a cell may be transmitted on the virtual circuit corresponding with that table entry. The system further provides that transmissions are scheduled on virtual circuits having the greatest latency since previous transmissions.
摘要翻译：公开了一种用于通过多个虚拟电路（VC）来控制来自网络节点的小区的传输的系统。系统根据与网络节点连接的每个VC的连接系统（如异步传输模式（ATM））的要求进行流量整形，从而不会超过建立连接时建立的服务质量（Qos）参数。该系统包括用于调度来自网络节点的小区的传输的过程。调度过程周期性地扫描具有与与网络节点连接的虚拟电路相对应的条目的表。在表的每次扫描期间，调度器增加与打开的虚拟电路相对应的每个表条目的可持续速率累加器字段，峰值速率累加器字段和等待时间累加器字段，并且有一个单元准备好被传送。调度器还确定可持续速率累加器值是否大于或等于预定值，以及峰值速率累加器值是否大于或等于预定值。如果两个条件均为真，则可以在与该表条目对应的虚拟电路上发送一个单元。该系统进一步规定，在先前的传输之后，传输被安排在具有最大延迟的虚拟电路上。

7. 发明授权

US5511076A Method and apparatus to efficiently reuse virtual connections by means of chaser packets 失效
标题翻译：通过追踪器数据包有效地重用虚拟连接的方法和装置
公开(公告)号：US5511076A
公开(公告)日：1996-04-23
申请号：US335539
申请日：1994-11-07
申请人： Kadangode K. Ramakrishnan , Peter J. Roman , Michael Ben-Nun , Simoni Ben-Michael
发明人： Kadangode K. Ramakrishnan , Peter J. Roman , Michael Ben-Nun , Simoni Ben-Michael
IPC分类号： H04L12/56 , H04Q11/04
CPC分类号： H04Q11/0478 , H04L2012/5616 , H04L2012/563 , H04L2012/5636 , H04L2012/5652
摘要： A host system and an ATM network adapter using a chaser packet are presented. The adapter receives cells over a virtual connection on the network and generates, in response to the host system, a chaser packet which allows the host to detect that all data has been transferred form the adapter buffers to host memory. When all data has been transferred, the host may release the virtual connection without data loss. The host and adapter may also transmit data. In data transmission, the chaser packet is used to determine that all data has been transmitted out onto the network before the sending host releases the virtual connection. The chaser packet is also used for resynchronization of credits where the ATM network uses credit-based flow control. The adapter uses the chaser packet to drain the local queue so that the link between the adapter and a source system may be resynchronized.
摘要翻译：提出了使用追踪器分组的主机系统和ATM网络适配器。适配器通过网络上的虚拟连接接收信元，并响应于主机系统生成一个追踪器数据包，允许主机检测到所有数据已经从适配器缓冲区传送到主机存储器。当所有数据都被传输时，主机可以释放虚拟连接而不会丢失数据。主机和适配器也可以传输数据。在数据传输中，追踪器数据包用于在发送主机释放虚拟连接之前确定所有数据已经发送到网络上。追踪包也用于ATM网络使用基于信用流量控制的信用重新同步。适配器使用追踪器包来排除本地队列，以便可以重新同步适配器和源系统之间的链接。

8. 发明授权

US5633867A Local memory buffers management for an ATM adapter implementing credit based flow control 失效
标题翻译：实施基于信用流量控制的ATM适配器的本地存储器缓冲器管理
公开(公告)号：US5633867A
公开(公告)日：1997-05-27
申请号：US269984
申请日：1994-07-01
申请人： Michael Ben-Nun , Simoni Ben-Michael , Simcha Perl , Kadangode K. Ramakrishnan
发明人： Michael Ben-Nun , Simoni Ben-Michael , Simcha Perl , Kadangode K. Ramakrishnan
IPC分类号： H04L12/56 , G06F13/00
CPC分类号： H04L12/5602 , H04L2012/5616 , H04L2012/5636
摘要： An Asynchronous Transfer Mode (ATM) network device having a receiver portion capable of receiving ATM cells on one of a number of virtual circuits (VCs) from an upstream ATM switch, a local memory used to store the ATM cells, a management system to manage the local memory using a number of queues, a system for assembling ATM cells into packets, a system for transmitting the packets to a host memory, and a transmitter portion having a system for indicating the transmitting of packets to the host memory to the upstream ATM switch.
摘要翻译：一种异步传输模式（ATM）网络设备，其具有能够从上游ATM交换机的多个虚拟电路（VC）中的一个上接收ATM信元的接收器部分，用于存储ATM信元的本地存储器，管理系统使用多个队列的本地存储器，用于将ATM信元组装成分组的系统，用于将分组发送到主机存储器的系统以及具有指示向主机存储器向上游ATM发送分组的系统的发射机部分的发射机部分开关。

9. 发明授权

US5606665A Buffer descriptor prefetch in network and I/O design 失效
标题翻译：网络缓存描述符预取和I / O设计
公开(公告)号：US5606665A
公开(公告)日：1997-02-25
申请号：US269595
申请日：1994-07-01
申请人： Henry S. Yang , Shirish S. Sathaye , Michael Ben-Nun , Moshe De-Leon , Simoni Ben-Michael
发明人： Henry S. Yang , Shirish S. Sathaye , Michael Ben-Nun , Moshe De-Leon , Simoni Ben-Michael
IPC分类号： H04L12/56 , H04L29/06 , G06F15/173 , H04L12/00
CPC分类号： H04L29/06 , H04L49/90
摘要： The invention improves the efficiency of buffer descriptor processing by performing descriptor prefetches, where multiple descriptors are read within the same descriptor bus transaction. The invention reads multiple buffer descriptors each time the bus is accessed. This allows for a smaller FIFO in a cut-through network adapter because it reduces the number of bus transactions needed to transfer data.
摘要翻译：本发明通过执行描述符预取来提高缓冲器描述符处理的效率，其中在同一描述符总线事务中读取多个描述符。每次访问总线时，本发明读取多个缓冲器描述符。这允许在直通网络适配器中使用较小的FIFO，因为它减少了传输数据所需的总线事务数量。

10. 发明授权

US6145102A Transmission of an error message over a network by a computer which fails a self-test 失效
标题翻译：由自动测试失败的计算机通过网络传输错误消息
公开(公告)号：US6145102A
公开(公告)日：2000-11-07
申请号：US9084
申请日：1998-01-20
申请人： Philippe Klein , Simoni Ben-Michael , Avraham Menachem , Sarit Shvimmer
发明人： Philippe Klein , Simoni Ben-Michael , Avraham Menachem , Sarit Shvimmer
IPC分类号： G06F11/07 , G06F11/22 , G06F11/20 , G01R31/38
CPC分类号： G06F11/0784 , G06F11/0745 , G06F11/0748 , G06F11/2284
摘要： A computer may have a management bus installed, where the management bus is coupled to sensors which monitor status of components of the computer. The management bus may also be coupled to a management bus processor, where the management bus processor receives status information from the management bus concerning status of components of the computer. An interface between the management bus and the network subsystem permits transmission of an error message in the event that the computer has a failure which inactivates the system CPU, the system bus, the system memory, or the system power supply.
摘要翻译：计算机可以安装管理总线，其中管理总线耦合到监测计算机的组件的状态的传感器。管理总线也可以耦合到管理总线处理器，其中管理总线处理器从管理总线接收关于计算机的组件的状态的状态信息。管理总线和网络子系统之间的接口允许在计算机具有使系统CPU，系统总线，系统存储器或系统电源无效的故障的情况下发送错误消息。

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