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1. 发明申请

US20130020571A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20130020571A1
公开(公告)日：2013-01-24
申请号：US13549867
申请日：2012-07-16
申请人： Shunpei YAMAZAKI , Masahiro TAKAHASHI , Tatsuya HONDA , Takehisa HATANO
发明人： Shunpei YAMAZAKI , Masahiro TAKAHASHI , Tatsuya HONDA , Takehisa HATANO
IPC分类号： H01L29/12
CPC分类号： H01L29/7869 , H01L29/24 , H01L29/78618
摘要： Provided is a structure of a transistor, which enables a so-called normally-off switching element, and a manufacturing method thereof. Provided is a structure of a semiconductor device which achieves high-speed response and high-speed operation by improving on characteristics of a transistor, and a manufacturing method thereof. Provided is a highly reliable semiconductor device. In the transistor in which a semiconductor layer, source and drain electrode layers, a gate insulating layer, and a gate electrode layer are stacked in that order. As the semiconductor layer, an oxide semiconductor layer which contains at least four kinds of elements of indium, gallium, zinc, and oxygen, and has a composition ratio (atomic percentage) of indium as twice or more as a composition ratio of gallium and a composition ratio of zinc, is used.
摘要翻译：提供了能够实现所谓的常关断开关元件的晶体管的结构及其制造方法。提供了通过提高晶体管的特性实现高速响应和高速操作的半导体器件的结构及其制造方法。提供了一种高度可靠的半导体器件。在其中半导体层，源极和漏极电极层，栅极绝缘层和栅极电极层以该顺序堆叠的晶体管中。作为半导体层，含有铟，镓，锌和氧中的至少四种元素的氧化物半导体层，铟的组成比（原子百分比）为镓和a的组成比的2倍以上使用锌的组成比。

2. 发明申请

US20130075722A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20130075722A1
公开(公告)日：2013-03-28
申请号：US13613192
申请日：2012-09-13
申请人： Shunpei YAMAZAKI , Atsuo ISOBE , Yutaka OKAZAKI , Takehisa HATANO , Sachiaki TEZUKA , Suguru HONDO , Toshihiko SAITO
发明人： Shunpei YAMAZAKI , Atsuo ISOBE , Yutaka OKAZAKI , Takehisa HATANO , Sachiaki TEZUKA , Suguru HONDO , Toshihiko SAITO
IPC分类号： H01L29/786
CPC分类号： H01L29/41733 , H01L29/42384 , H01L29/78618 , H01L29/7869
摘要： A highly reliable structure for high-speed response and high-speed driving of a semiconductor device, in which on-state characteristics of a transistor are increased is provided. In the coplanar transistor, an oxide semiconductor layer, a source and drain electrode layers including a stack of a first conductive layer and a second conductive layer, a gate insulating layer, and a gate electrode layer are sequentially stacked in this order. The gate electrode layer is overlapped with the first conductive layer with the gate insulating layer provided therebetween, and is not overlapped with the second conductive layer with the gate insulating layer provided therebetween.
摘要翻译：提供了一种用于高速响应和高速驱动半导体器件的高度可靠的结构，其中晶体管的导通状态特性增加。在共面晶体管中，依次层叠氧化物半导体层，包括第一导电层和第二导电层的堆叠的源极和漏极电极层，栅极绝缘层和栅极电极层。栅极电极层与第一导电层重叠，栅极绝缘层设置在它们之间，并且与其间设置有栅极绝缘层的第二导电层不重叠。

3. 发明申请

US20130069055A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20130069055A1
公开(公告)日：2013-03-21
申请号：US13608044
申请日：2012-09-10
申请人： Shunpei YAMAZAKI , Atsuo ISOBE , Hiromachi GODO , Takehisa HATANO , Sachiaki TEZUKA , Suguru HONDO , Naoto YAMADE , Junichi KOEZUKA
发明人： Shunpei YAMAZAKI , Atsuo ISOBE , Hiromachi GODO , Takehisa HATANO , Sachiaki TEZUKA , Suguru HONDO , Naoto YAMADE , Junichi KOEZUKA
IPC分类号： H01L29/78
CPC分类号： H01L29/41733 , H01L29/78618 , H01L29/7869 , H01L29/78693
摘要： Provided is a semiconductor device in which an oxide semiconductor layer is provided; a pair of wiring layers which are provided with the gate electrode layer interposed therebetween are electrically connected to the low-resistance regions; and electrode layers are provided to be in contact with the low-resistance regions, below regions where the wiring layers are formed.
摘要翻译：提供一种半导体器件，其中提供氧化物半导体层; 设置有栅极电极层的一对布线层电连接到低电阻区域; 并且电极层设置成与低电阻区域接触，在形成布线层的区域之下。

4. 发明申请

US20120187397A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120187397A1
公开(公告)日：2012-07-26
申请号：US13356012
申请日：2012-01-23
申请人： Shunpei YAMAZAKI , Atsuo ISOBE , Toshihiko SAITO , Takehisa HATANO , Hideomi SUZAWA , Shinya SASAGAWA , Junichi KOEZUKA , Yuichi SATO , Shinji OHNO
发明人： Shunpei YAMAZAKI , Atsuo ISOBE , Toshihiko SAITO , Takehisa HATANO , Hideomi SUZAWA , Shinya SASAGAWA , Junichi KOEZUKA , Yuichi SATO , Shinji OHNO
IPC分类号： H01L29/786
CPC分类号： H01L29/66969 , H01L21/02488 , H01L21/02565 , H01L27/1225 , H01L29/786 , H01L29/78606 , H01L29/7869
摘要： A semiconductor device which includes an oxide semiconductor and has favorable electrical characteristics is provided. In the semiconductor device, an oxide semiconductor film and an insulating film are formed over a substrate. Side surfaces of the oxide semiconductor film are in contact with the insulating film. The oxide semiconductor film includes a channel formation region and regions containing a dopant between which the channel formation region is sandwiched. A gate insulating film is formed on and in contact with the oxide semiconductor film. A gate electrode with sidewall insulating films is formed over the gate insulating film. A source electrode and a drain electrode are formed in contact with the oxide semiconductor film and the insulating film.
摘要翻译：提供了包括氧化物半导体并且具有良好的电特性的半导体器件。在半导体器件中，在衬底上形成氧化物半导体膜和绝缘膜。氧化物半导体膜的侧面与绝缘膜接触。氧化物半导体膜包括沟道形成区域和包含掺杂剂的区域，沟道形成区域夹在其间。栅极绝缘膜与氧化物半导体膜形成并接触。在栅绝缘膜上形成具有侧壁绝缘膜的栅电极。源电极和漏电极形成为与氧化物半导体膜和绝缘膜接触。

5. 发明申请

US20120286261A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120286261A1
公开(公告)日：2012-11-15
申请号：US13466583
申请日：2012-05-08
申请人： Shinya SASAGAWA , Akihiro ISHIZUKA , Takehisa HATANO
发明人： Shinya SASAGAWA , Akihiro ISHIZUKA , Takehisa HATANO
IPC分类号： H01L29/12 , H01L21/336
CPC分类号： H01L21/8252 , H01L21/8256 , H01L27/0605 , H01L27/1225 , H01L29/78603 , H01L29/7869 , H01L29/78696
摘要： In a transistor including a wide band gap semiconductor layer as a semiconductor layer, a wide band gap semiconductor layer is separated into an island shape by an insulating layer with passivation properties for preventing atmospheric components from permeating. The edge portion of the island shape wide band gap semiconductor layer is in contact with the insulating film; thus, moisture or atmospheric components can be prevented from entering from the edge portion of the semiconductor layer to the wide band gap semiconductor layer.
摘要翻译：在包括作为半导体层的宽带隙半导体层的晶体管中，通过具有防止大气成分渗透的钝化特性的绝缘层将宽带隙半导体层分离成岛状。岛状宽带隙半导体层的边缘部分与绝缘膜接触; 因此，可以防止水分或大气成分从半导体层的边缘部分进入宽带隙半导体层。

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