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1. 发明申请

US20130069055A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20130069055A1
公开(公告)日：2013-03-21
申请号：US13608044
申请日：2012-09-10
申请人： Shunpei YAMAZAKI , Atsuo ISOBE , Hiromachi GODO , Takehisa HATANO , Sachiaki TEZUKA , Suguru HONDO , Naoto YAMADE , Junichi KOEZUKA
发明人： Shunpei YAMAZAKI , Atsuo ISOBE , Hiromachi GODO , Takehisa HATANO , Sachiaki TEZUKA , Suguru HONDO , Naoto YAMADE , Junichi KOEZUKA
IPC分类号： H01L29/78
CPC分类号： H01L29/41733 , H01L29/78618 , H01L29/7869 , H01L29/78693
摘要： Provided is a semiconductor device in which an oxide semiconductor layer is provided; a pair of wiring layers which are provided with the gate electrode layer interposed therebetween are electrically connected to the low-resistance regions; and electrode layers are provided to be in contact with the low-resistance regions, below regions where the wiring layers are formed.
摘要翻译：提供一种半导体器件，其中提供氧化物半导体层; 设置有栅极电极层的一对布线层电连接到低电阻区域; 并且电极层设置成与低电阻区域接触，在形成布线层的区域之下。

2. 发明申请

US20130075722A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20130075722A1
公开(公告)日：2013-03-28
申请号：US13613192
申请日：2012-09-13
申请人： Shunpei YAMAZAKI , Atsuo ISOBE , Yutaka OKAZAKI , Takehisa HATANO , Sachiaki TEZUKA , Suguru HONDO , Toshihiko SAITO
发明人： Shunpei YAMAZAKI , Atsuo ISOBE , Yutaka OKAZAKI , Takehisa HATANO , Sachiaki TEZUKA , Suguru HONDO , Toshihiko SAITO
IPC分类号： H01L29/786
CPC分类号： H01L29/41733 , H01L29/42384 , H01L29/78618 , H01L29/7869
摘要： A highly reliable structure for high-speed response and high-speed driving of a semiconductor device, in which on-state characteristics of a transistor are increased is provided. In the coplanar transistor, an oxide semiconductor layer, a source and drain electrode layers including a stack of a first conductive layer and a second conductive layer, a gate insulating layer, and a gate electrode layer are sequentially stacked in this order. The gate electrode layer is overlapped with the first conductive layer with the gate insulating layer provided therebetween, and is not overlapped with the second conductive layer with the gate insulating layer provided therebetween.
摘要翻译：提供了一种用于高速响应和高速驱动半导体器件的高度可靠的结构，其中晶体管的导通状态特性增加。在共面晶体管中，依次层叠氧化物半导体层，包括第一导电层和第二导电层的堆叠的源极和漏极电极层，栅极绝缘层和栅极电极层。栅极电极层与第一导电层重叠，栅极绝缘层设置在它们之间，并且与其间设置有栅极绝缘层的第二导电层不重叠。

3. 发明申请

US20120187397A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120187397A1
公开(公告)日：2012-07-26
申请号：US13356012
申请日：2012-01-23
申请人： Shunpei YAMAZAKI , Atsuo ISOBE , Toshihiko SAITO , Takehisa HATANO , Hideomi SUZAWA , Shinya SASAGAWA , Junichi KOEZUKA , Yuichi SATO , Shinji OHNO
发明人： Shunpei YAMAZAKI , Atsuo ISOBE , Toshihiko SAITO , Takehisa HATANO , Hideomi SUZAWA , Shinya SASAGAWA , Junichi KOEZUKA , Yuichi SATO , Shinji OHNO
IPC分类号： H01L29/786
CPC分类号： H01L29/66969 , H01L21/02488 , H01L21/02565 , H01L27/1225 , H01L29/786 , H01L29/78606 , H01L29/7869
摘要： A semiconductor device which includes an oxide semiconductor and has favorable electrical characteristics is provided. In the semiconductor device, an oxide semiconductor film and an insulating film are formed over a substrate. Side surfaces of the oxide semiconductor film are in contact with the insulating film. The oxide semiconductor film includes a channel formation region and regions containing a dopant between which the channel formation region is sandwiched. A gate insulating film is formed on and in contact with the oxide semiconductor film. A gate electrode with sidewall insulating films is formed over the gate insulating film. A source electrode and a drain electrode are formed in contact with the oxide semiconductor film and the insulating film.
摘要翻译：提供了包括氧化物半导体并且具有良好的电特性的半导体器件。在半导体器件中，在衬底上形成氧化物半导体膜和绝缘膜。氧化物半导体膜的侧面与绝缘膜接触。氧化物半导体膜包括沟道形成区域和包含掺杂剂的区域，沟道形成区域夹在其间。栅极绝缘膜与氧化物半导体膜形成并接触。在栅绝缘膜上形成具有侧壁绝缘膜的栅电极。源电极和漏电极形成为与氧化物半导体膜和绝缘膜接触。

4. 发明申请

US20130023087A1 METHOD FOR PROCESSING OXIDE SEMICONDUCTOR FILM AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：用于处理氧化物半导体膜的方法和制造半导体器件的方法
公开(公告)号：US20130023087A1
公开(公告)日：2013-01-24
申请号：US13547451
申请日：2012-07-12
申请人： Shunpei YAMAZAKI , Shinji OHNO , Yuichi SATO , Junichi KOEZUKA , Sachiaki TEZUKA
发明人： Shunpei YAMAZAKI , Shinji OHNO , Yuichi SATO , Junichi KOEZUKA , Sachiaki TEZUKA
IPC分类号： H01L21/385 , H01L21/36
CPC分类号： H01L29/7869 , H01L21/02554 , H01L21/02565 , H01L21/02664 , H01L27/1225
摘要： To provide an oxide semiconductor film including a low-resistance region, which can be applied to a transistor. To provide a transistor including the oxide semiconductor film, which can perform at high speed. To provide a high-performance semiconductor device including the transistor including the oxide semiconductor film, which can perform at high speed, with high yield. A film having a reducing property is formed over the oxide semiconductor film. Next, part of oxygen atoms are transferred from the oxide semiconductor film to the film having a reducing property. Next, an impurity is added to the oxide semiconductor film through the film having a reducing property and then, the film having a reducing property is removed, so that a low-resistance region is formed in the oxide semiconductor film.
摘要翻译：提供一种可以应用于晶体管的包含低电阻区域的氧化物半导体膜。提供可以高速执行的包括氧化物半导体膜的晶体管。提供一种高性能半导体器件，其包括能够以高产率高速执行的包括氧化物半导体膜的晶体管。在氧化物半导体膜上形成具有还原性的膜。接下来，氧原子的一部分从氧化物半导体膜转移到具有还原性的膜。接下来，通过具有还原性的膜向氧化物半导体膜添加杂质，然后去除具有还原性的膜，从而在氧化物半导体膜中形成低电阻区域。

5. 发明申请

US20120276694A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US20120276694A1
公开(公告)日：2012-11-01
申请号：US13453118
申请日：2012-04-23
申请人： Junichi KOEZUKA , Naoto YAMADE , Yuhei SATO , Yutaka OKAZAKI , Shunpei YAMAZAKI
发明人： Junichi KOEZUKA , Naoto YAMADE , Yuhei SATO , Yutaka OKAZAKI , Shunpei YAMAZAKI
IPC分类号： H01L21/336
CPC分类号： H01L27/1274 , H01L21/02565 , H01L21/02609 , H01L21/02667 , H01L21/383 , H01L21/44 , H01L21/477 , H01L27/1225 , H01L29/66742 , H01L29/66969 , H01L29/78606 , H01L29/7869 , H01L29/78696
摘要： A semiconductor device using an oxide semiconductor is provided with stable electric characteristics to improve the reliability. In a manufacturing process of a transistor including an oxide semiconductor film, an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a first crystalline oxide semiconductor film) is formed; oxygen is added to the oxide semiconductor film to amorphize at least part of the oxide semiconductor film, so that an amorphous oxide semiconductor film containing an excess of oxygen is formed; an aluminum oxide film is formed over the amorphous oxide semiconductor film; and heat treatment is performed thereon to crystallize at least part of the amorphous oxide semiconductor film, so that an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a second crystalline oxide semiconductor film) is formed.
摘要翻译：使用氧化物半导体的半导体器件具有稳定的电特性以提高可靠性。在包括氧化物半导体膜的晶体管的制造工艺中，形成含有基本上垂直于其顶表面的c轴的晶体（也称为第一晶体氧化物半导体膜）的氧化物半导体膜; 氧化物被添加到氧化物半导体膜中以使至少部分氧化物半导体膜非晶化，从而形成含有过量氧的非晶氧化物半导体膜; 在非晶氧化物半导体膜上形成氧化铝膜; 在其上进行热处理以使非晶氧化物半导体膜的至少一部分结晶，使得含有具有基本上垂直于其顶表面的c轴的晶体的氧化物半导体膜（也称为第二结晶氧化物半导体膜）形成了。

6. 发明申请

US20130020569A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20130020569A1
公开(公告)日：2013-01-24
申请号：US13547119
申请日：2012-07-12
申请人： Shunpei YAMAZAKI , Naoto YAMADE , Junichi KOEZUKA
发明人： Shunpei YAMAZAKI , Naoto YAMADE , Junichi KOEZUKA
IPC分类号： H01L29/12
CPC分类号： H01L27/1225
摘要： A semiconductor device which can operate at high speed and consumes a smaller amount of power is provided. In a semiconductor device including transistors each including an oxide semiconductor, the oxygen concentration of the oxide semiconductor film of the transistor having small current at negative gate voltage is different from that of the oxide semiconductor film of the transistor having high field-effect mobility and large on-state current. Typically, the oxygen concentration of the oxide semiconductor film of the transistor having high field-effect mobility and large on-state current is lower than that of the oxide semiconductor film of the transistor having small current at negative gate voltage.
摘要翻译：提供了可以高速运行并消耗更少功率的半导体器件。在包括各自包含氧化物半导体的晶体管的半导体器件中，在负栅极电压下具有小电流的晶体管的氧化物半导体膜的氧浓度与具有高场效应迁移率的晶体管的氧化物半导体膜的氧浓度不同通态电流。通常，具有高场电迁移率和大导通状态电流的晶体管的氧化物半导体膜的氧浓度低于在负栅极电压下具有小电流的晶体管的氧化物半导体膜的氧浓度。

7. 发明申请

US20120286270A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120286270A1
公开(公告)日：2012-11-15
申请号：US13463092
申请日：2012-05-03
申请人： Atsuo ISOBE , Toshinari SASAKI , Junichi KOEZUKA , Shunpei YAMAZAKI
发明人： Atsuo ISOBE , Toshinari SASAKI , Junichi KOEZUKA , Shunpei YAMAZAKI
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/4238 , H01L21/02565 , H01L21/265 , H01L21/425 , H01L21/84 , H01L27/1085 , H01L27/10876 , H01L27/1156 , H01L27/1203 , H01L27/1225 , H01L28/40 , H01L29/045 , H01L29/0847 , H01L29/66477 , H01L29/66742 , H01L29/66969 , H01L29/78603 , H01L29/7869 , H01L29/78693
摘要： It is an object to provide a semiconductor device in which a short-channel effect is suppressed and miniaturization is achieved, and a manufacturing method thereof. A trench is formed in an insulating layer and impurities are added to an oxide semiconductor film in contact with an upper end corner portion of the trench, whereby a source region and a drain region are formed. With the above structure, miniaturization can be achieved. Further, with the trench, a short-channel effect can be suppressed setting the depth of the trench as appropriate even when a distance between a source electrode layer and a drain electrode layer is shortened.
摘要翻译：本发明的目的是提供一种抑制短路效应并实现小型化的半导体器件及其制造方法。在绝缘层中形成沟槽，并且将杂质添加到与沟槽的上端角部接触的氧化物半导体膜，由此形成源极区域和漏极区域。利用上述结构，可以实现小型化。此外，利用沟槽，即使当源电极层和漏电极层之间的距离缩短时，也可以适当地抑制沟槽的深度适当地设定短沟道效应。

8. 发明申请

US20090321743A1 THIN FILM TRANSISTOR, SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE 有权
标题翻译：薄膜晶体管，半导体器件和电子器件
公开(公告)号：US20090321743A1
公开(公告)日：2009-12-31
申请号：US12490458
申请日：2009-06-24
申请人： Toshiyuki ISA , Yasuhiro JINBO , Sachiaki TEZUKA , Koji DAIRIKI , Hidekazu MIYAIRI , Shunpei YAMAZAKI
发明人： Toshiyuki ISA , Yasuhiro JINBO , Sachiaki TEZUKA , Koji DAIRIKI , Hidekazu MIYAIRI , Shunpei YAMAZAKI
IPC分类号： H01L29/786
CPC分类号： H01L27/1288 , H01L27/1214 , H01L29/04 , H01L29/66765 , H01L29/78696
摘要： A thin film transistor includes, as a buffer layer, an amorphous semiconductor layer having nitrogen or an NH group between a gate insulating layer and source and drain regions and at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.
摘要翻译：薄膜晶体管包括作为缓冲层的至少在源极和漏极区域上具有氮或NH基的非晶半导体层，栅极绝缘层与源极和漏极区之间。与在沟道形成区域中包含非晶半导体的薄膜晶体管相比，可以提高薄膜晶体管的导通电流。此外，与在沟道形成区域中包含微晶半导体的薄膜晶体管相比，可以减小薄膜晶体管的截止电流。

9. 发明申请

US20090321737A1 THIN FILM TRANSISTOR 有权
标题翻译：薄膜晶体管
公开(公告)号：US20090321737A1
公开(公告)日：2009-12-31
申请号：US12490447
申请日：2009-06-24
申请人： Toshiyuki ISA , Yasuhiro JINBO , Sachiaki TEZUKA , Koji DAIRIKI , Hidekazu MIYAIRI , Shunpei YAMAZAKI , Takuya HIROHASHI
发明人： Toshiyuki ISA , Yasuhiro JINBO , Sachiaki TEZUKA , Koji DAIRIKI , Hidekazu MIYAIRI , Shunpei YAMAZAKI , Takuya HIROHASHI
IPC分类号： H01L29/04
CPC分类号： H01L27/1288 , H01L27/1214 , H01L29/04 , H01L29/66765 , H01L29/78696
摘要： A thin film transistor includes, as a buffer layer, a semiconductor layer which contains nitrogen and includes crystal regions in an amorphous structure between a gate insulating layer and source and drain regions, at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.
摘要翻译：至少在源区和漏区侧，薄膜晶体管包括作为缓冲层的半导体层，该半导体层含有氮并且包括在栅极绝缘层和源极和漏极区之间的非晶结构中的晶体区域。与在沟道形成区域中包含非晶半导体的薄膜晶体管相比，可以提高薄膜晶体管的导通电流。此外，与在沟道形成区域中包含微晶半导体的薄膜晶体管相比，可以减小薄膜晶体管的截止电流。

10. 发明申请

US20100201655A1 DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：显示装置及其制造方法
公开(公告)号：US20100201655A1
公开(公告)日：2010-08-12
申请号：US12761611
申请日：2010-04-16
申请人： Shunpei YAMAZAKI , Osamu NAKAMURA , Aki YAMAMITI , Naoto YAMADE
发明人： Shunpei YAMAZAKI , Osamu NAKAMURA , Aki YAMAMITI , Naoto YAMADE
IPC分类号： G09G3/32 , H01J1/62 , G09G5/00
CPC分类号： H01L27/1259 , H01L27/1214 , H01L27/3244 , H01L27/3246 , H01L27/3258 , H01L27/3272 , H01L51/5206 , H01L51/524 , H01L51/5253 , H01L51/5284 , H01L2251/5323 , H01L2251/552
摘要： A display device with improved reliability and a manufacturing method of the same with improved yield. A display device according to the invention comprises a display area including a first electrode, an insulating layer covering an edge of the first electrode, a layer containing an organic compound, which is formed on the first electrode, and a second electrode. The first electrode and the insulating layer are doped with an impurity element of one conductivity.
摘要翻译：一种可靠性提高的显示装置及其制造方法，其产率提高。根据本发明的显示装置包括显示区域，包括第一电极，覆盖第一电极的边缘的绝缘层，形成在第一电极上的含有机化合物的层和第二电极。第一电极和绝缘层掺杂有一种导电性的杂质元素。

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