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    • 3. 发明授权
    • Semiconductor memory device
    • 半导体存储器件
    • US08223569B2
    • 2012-07-17
    • US12836851
    • 2010-07-15
    • Tomoyuki HamanoShigefumi IshiguroToshifumi WatanabeKazuto Uehara
    • Tomoyuki HamanoShigefumi IshiguroToshifumi WatanabeKazuto Uehara
    • G11C7/00
    • G11C8/04G11C11/41G11C2029/0411
    • According to one embodiment, a semiconductor memory device includes a memory array, an address counter, an address detecting circuit and a control circuit. The memory array has a plurality of memory cells arranged at crossing positions of word lines and bit lines. The address counter increments an address including a row address and a column address in synchronism with a clock to sequentially output the incremented addresses. The address detecting circuit detects an address previous to an address including a row address to which the row address is switched at the address output from the address counter to output a detection signal. The control circuit performs a precharging operation to the bit lines connected to the memory cells according to the detection signal output from the address detecting circuit.
    • 根据一个实施例,半导体存储器件包括存储器阵列,地址计数器,地址检测电路和控制电路。 存储器阵列具有布置在字线和位线的交叉位置处的多个存储单元。 地址计数器与时钟同步地增加包括行地址和列地址的地址,以顺序输出递增的地址。 地址检测电路在从地址计数器输出的地址处检测包括行地址切换到的行地址的地址,以输出检测信号。 控制电路根据从地址检测电路输出的检测信号对与存储单元连接的位线执行预充电操作。
    • 4. 发明授权
    • Optical module and manufacturing method therefor
    • 光模块及其制造方法
    • US07076135B2
    • 2006-07-11
    • US10666482
    • 2003-09-18
    • Koji YamadaTai TsuchizawaShingo UchiyamaTetsufumi ShojiJyun-ichi TakahashiToshifumi WatanabeEmi TamechikaHirofumi Morita
    • Koji YamadaTai TsuchizawaShingo UchiyamaTetsufumi ShojiJyun-ichi TakahashiToshifumi WatanabeEmi TamechikaHirofumi Morita
    • G02B6/26G02B6/42G02B6/10
    • G02B6/305G02B6/1228G02B2006/12176
    • An optical module includes an under cladding, a first core, a second core, and an over cladding. The under cladding has a flat shape as a whole. The first core has a quadrangular cross section and is placed on the under cladding. The second core is placed on a terminal end portion of the first core. The over cladding is placed in a region including the terminal end portion of the first core and the second core placed on the terminal end portion of the first core. The under cladding and the first core placed thereon constitute a first optical waveguide. The under cladding, the terminal end portion of the first core placed on the under cladding, the second core placed thereon, and the over cladding placed on and around the second core constitute a mode field size conversion portion. The under cladding, the second core placed on the under cladding, and the over cladding placed on and around the second core constitute a second optical waveguide. The first core is made of silicon. The first and second cores differ in cross-sectional shape. A manufacturing method for the optical module is also disclosed.
    • 光学模块包括下包层,第一芯,第二芯和外包层。 下包层整体呈扁平形状。 第一芯具有四边形横截面并且放置在下包层上。 第二芯放置在第一芯的末端部分上。 上包层放置在包括第一芯的末端部分和放置在第一芯的终端部分上的第二芯的区域中。 下敷层和放置在其上的第一芯构成第一光波导。 下包层,第一芯的终端部分放置在下包层上,第二芯放置在其上,并且放置在第二芯上和周围的上包层构成模场尺寸转换部分。 放置在下包层上的下包层,第二芯和放置在第二芯上并围绕第二芯的外包层构成第二光波导。 第一个核心由硅制成。 第一和第二芯的横截面形状不同。 还公开了一种用于光学模块的制造方法。
    • 7. 发明授权
    • Semiconductor memory device
    • 半导体存储器件
    • US08259523B2
    • 2012-09-04
    • US12836944
    • 2010-07-15
    • Toshifumi WatanabeTomoyuki HamanoShigefumi IshiguroKazuto Uehara
    • Toshifumi WatanabeTomoyuki HamanoShigefumi IshiguroKazuto Uehara
    • G11C7/00
    • G11C7/12G11C8/12G11C11/005
    • According to one embodiment, a semiconductor memory device includes a first memory, a second memory and a control circuit. The first memory includes a first bank number. The second memory includes a second bank number larger than the first bank number. The control circuit controls a precharge operation with respect to bit lines provided in the first and second memories. When performing, with respect to the first memory, a synchronous operation that is effected in synchronization with a clock, the control circuit changes over a second precharge operation to an operation time different from a first precharge operation during a period from the end of the initial first precharge operation to the start of the subsequent second precharge operation after receiving an address.
    • 根据一个实施例,半导体存储器件包括第一存储器,第二存储器和控制电路。 第一存储器包括第一个银行号码。 第二存储器包括大于第一存储体号的第二存储体号。 控制电路相对于设置在第一和第二存储器中的位线控制预充电操作。 当相对于第一存储器执行与时钟同步地进行的同步操作时,控制电路在初始化结束时间段内将第二预充电操作改变为与第一预充电操作不同的操作时间 在接收地址之后的第二预充电操作开始的第一预充电操作。
    • 9. 发明授权
    • Hydroxypyridine derivatives their production and use
    • 羟基吡啶衍生物的生产和使用
    • US5891895A
    • 1999-04-06
    • US834123
    • 1997-04-14
    • Mitsuru ShiraishiTsuyoshi MaekawaToshifumi Watanabe
    • Mitsuru ShiraishiTsuyoshi MaekawaToshifumi Watanabe
    • C07D213/65C07D213/89A61K31/44C07D213/53
    • C07D213/89C07D213/65
    • Hydroxypyridine derivatives of the formula ##STR1## wherein R.sup.1 is a branched C.sub.3-8 alkyl group or a C.sub.3-8 cycloalkyl group, each of which may be substituted;R.sup.2 is a halogen atom, a C.sub.1-4 alkyl group or a C.sub.1-4 alkoxy group;X is an oxygen atom or NR.sup.3 in which R.sup.3 is a hydrogen atom or a C.sub.1-4 alkyl group;R.sup.4, R.sup.5 and R.sup.6 are independently (1) a hydrogen atom, (2) a halogen atom, (3) a cyano group, (4) a nitro group, (5) a C.sub.1-4 acyl group, (6) a C.sub.1-4 alkoxy group which may be substituted with halogen, (7) a C.sub.1-4 alkyl group which may be substituted with halogen or (8) a mercapto group which may be substituted with a C.sub.1-4 alkyl group;m is 0 to 3; andn is 0 or 1;provided that all of R.sup.4, R.sup.5 and R.sup.6 are not hydrogen atom, or a salt thereof, which have potassium channel opening activity and are useful as therapeutic agents of cardiovascular diseases such as angina pectoris, hypertension, etc.
    • 其中R 1是支链C 3-8烷基或C 3-8环烷基,其中每一个可以被取代; R2是卤素原子,C1-4烷基或C1-4烷氧基; X是氧原子或NR 3,其中R 3是氢原子或C 1-4烷基; R4,R5和R6独立地为(1)氢原子,(2)卤素原子,(3)氰基,(4)硝基,(5)C1-4酰基,(6)C1 -4-烷氧基,(7)可被卤素取代的C 1-4烷基或(8)可被C 1-4烷基取代的巯基; m为0〜3; 并且n为0或1; 条件是所有R4,R5和R6不是氢原子,或其盐,其具有钾通道开放活性,并且可用作心血管疾病如心绞痛,高血压等的治疗剂。
    • 10. 发明授权
    • Device for measuring toner concentration in developer comprising toner
and carrier
    • 用于测量包含调色剂和载体的显影剂中的调色剂浓度的装置
    • US5860041A
    • 1999-01-12
    • US964891
    • 1997-11-05
    • Masaki TanakaKuniya MatsuuraToshifumi Watanabe
    • Masaki TanakaKuniya MatsuuraToshifumi Watanabe
    • G01N21/47G03G15/08
    • G03G15/0855G03G15/0893G03G2215/0894
    • A device for measuring toner concentration of developer housed in a developing system, which developer comprising toner and carrier. The device has a transparent detection window facing the interior of the developing system, which transparent detection window comprising a first transparent plate member and a second transparent plate member being in contact with the first transparent plate member. The first transparent plate member is made of a material which becomes charged, through its contact with the second transparent plate member, with the opposite polarity from the charge polarity of the toner and the second transparent plate member is made of a material which becomes charged, through its contact with the carrier, with the same polarity from the charge polarity of the toner, so that the second transparent plate member strongly repels the toner having the same polarity charge and adherence of the toner to the second transparent plate member is reliably prevented.
    • 用于测量容纳在显影系统中的显影剂的调色剂浓度的装置,该显影剂包括调色剂和载体。 该装置具有面向显影系统内部的透明检测窗口,该透明检测窗口包括与第一透明板构件接触的第一透明板构件和第二透明板构件。 第一透明板构件由与第二透明板构件的接触成为带电的材料制成,其极性与调色剂的充电极性相反,第二透明板构件由变成带电的材料制成, 通过其与载体的接触,与调色剂的电荷极性具有相同的极性,使得第二透明板构件强烈排斥具有相同极性电荷的调色剂并且可靠地防止调色剂对第二透明板构件的粘附。