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1. 发明授权

US07321713B2 Silicon based on-chip photonic band gap cladding waveguide 有权
标题翻译：硅基片上光子带隙包层波导
公开(公告)号：US07321713B2
公开(公告)日：2008-01-22
申请号：US11230024
申请日：2005-09-19
申请人： Shoji Akiyama , Xiaoman Duan , Lionel C. Kimerling , Yasha Yi
发明人： Shoji Akiyama , Xiaoman Duan , Lionel C. Kimerling , Yasha Yi
IPC分类号： G02B6/10
CPC分类号： B82Y20/00 , G02B6/122 , G02B6/1223 , G02B6/1225 , G02B6/132 , G02B2006/12061
摘要： A waveguide structure includes a core structure that has low index materials. A photonic crystal cladding structure utilized in guiding optical modes in the core. The photonic crystal cladding structure includes alternating layers of Si and Si3N4.
摘要翻译：波导结构包括具有低折射率材料的芯结构。一种用于引导光纤模式的光子晶体包层结构。光子晶体包层结构包括Si和Si 3 N 4 N 4的交替层。

2. 发明申请

US20060088265A1 Silicon based on-chip photonic band gap cladding waveguide 有权
标题翻译：硅基片上光子带隙包层波导
公开(公告)号：US20060088265A1
公开(公告)日：2006-04-27
申请号：US11230024
申请日：2005-09-19
申请人： Shoji Akiyama , Xiaoman Duan , Lionel Kimerling , Yasha Yi
发明人： Shoji Akiyama , Xiaoman Duan , Lionel Kimerling , Yasha Yi
IPC分类号： G02B6/10
CPC分类号： B82Y20/00 , G02B6/122 , G02B6/1223 , G02B6/1225 , G02B6/132 , G02B2006/12061
摘要： A waveguide structure includes a core structure that has low index materials. A photonic crystal cladding structure utilized in guiding optical modes in the core. The photonic crystal cladding structure includes alternating layers of Si and Si3N4.
摘要翻译：波导结构包括具有低折射率材料的芯结构。一种用于引导光纤模式的光子晶体包层结构。光子晶体包层结构包括Si和Si 3 N 4 N 4的交替层。

3. 发明授权

US07310454B2 Photonic bandgap modulator, amplifier, demux, and TDM devices 失效
标题翻译：光子带隙调制器，放大器，解复用器和TDM器件
公开(公告)号：US07310454B2
公开(公告)日：2007-12-18
申请号：US10852386
申请日：2004-05-24
申请人： Shoji Akiyama , Lionel C. Kimerling , Kazumi Wada
发明人： Shoji Akiyama , Lionel C. Kimerling , Kazumi Wada
IPC分类号： G02F1/295 , G02B6/26 , G02B6/42
CPC分类号： G02F1/21 , G02F1/3136 , G02F2001/213 , G02F2202/32
摘要： An optical device includes at least two photonic bandgap crystal (PBG) stacks that are each comprised of alternating layers of high and low index materials. A defect region is formed in a cavity region between the at least two photonic bandgap crystal stacks so as to provide the properties needed to reflect light received by the optical device.
摘要翻译：光学器件包括至少两个光子带隙晶体（PBG）堆叠，每个由高和低折射率材料的交替层组成。在所述至少两个光子带隙晶体堆叠之间的空腔区域中形成缺陷区域，以便提供反射由光学器件接收的光所需的特性。

4. 发明授权

US06944368B2 Waveguide-to-semiconductor device coupler 有权
标题翻译：波导到半导体器件耦合器
公开(公告)号：US06944368B2
公开(公告)日：2005-09-13
申请号：US10733977
申请日：2003-12-11
申请人： Lionel C. Kimerling , Kazumi Wada , Shoji Akiyama
发明人： Lionel C. Kimerling , Kazumi Wada , Shoji Akiyama
IPC分类号： G02B6/12 , G02B6/28 , G02B6/42 , G02B6/26
CPC分类号： G02B6/2813 , G02B6/12002 , G02B6/12004 , G02B6/42 , G02B2006/12159 , G02B2006/12195
摘要： A waveguide-semiconductor coupling device includes a waveguide structure that includes a multimode interferometer (MMI) structure so as to minimize the reflections of TE modes in the coupling device. A mesa structure is coupled to the waveguide structure so as to minimize the reflections of TM modes in the coupling device.
摘要翻译：波导 - 半导体耦合器件包括包括多模干涉仪（MMI）结构的波导结构，以便使耦合器件中TE模的反射最小化。台面结构耦合到波导结构，以便使耦合装置中TM模的反射最小化。

5. 发明授权

US06621972B2 Optical waveguides with trench structures 失效
公开(公告)号：US06621972B2
公开(公告)日：2003-09-16
申请号：US09977637
申请日：2001-10-15
申请人： Lionel C. Kimerling , Kazumi Wada , Hermann A. Haus , Milov Popovic , Shoji Akiyama
发明人： Lionel C. Kimerling , Kazumi Wada , Hermann A. Haus , Milov Popovic , Shoji Akiyama
IPC分类号： G02B610
CPC分类号： G02B6/136 , G02B6/12 , G02B6/125 , G02B6/13 , G02B2006/12097 , G02B2006/12119 , G02B2006/1215 , G02B2006/12195
摘要： Arrangements using air trench cladding enables minimization of the evanescent tail to suppress light coupling to radiation modes, resulting in low-loss bends and splitters. Structures including sharp bends and T-splitters without transmission loss, crossings without crosstalk, and couplers from/to fibers and with out-of-plane waveguides without substantial loss are provided with such air trench claddings. Air trench sidewall cladding of waveguides pushes evanescent tails toward top and bottom claddings to enhance coupling between vertically positioned waveguides. Fabrication processes using wafer bonding technology are also provided.

6. 发明授权

US09610750B2 Composite structure and manufacturing method therefor 有权
公开(公告)号：US09610750B2
公开(公告)日：2017-04-04
申请号：US14131730
申请日：2012-06-15
申请人： Tomomi Yukumoto , Takeshi Yamasaki , Shoji Akiyama , Yuji Akiyama
发明人： Tomomi Yukumoto , Takeshi Yamasaki , Shoji Akiyama , Yuji Akiyama
IPC分类号： B32B3/26 , B32B3/20 , B32B3/30 , B32B27/08 , B32B3/08 , B01L3/00 , G01N21/51
CPC分类号： B32B3/30 , B01L3/502707 , B01L3/502715 , B01L2200/0636 , B01L2200/0689 , B01L2200/12 , B01L2300/0645 , B01L2300/0654 , B01L2300/0816 , B01L2300/0838 , B01L2300/0877 , B01L2300/0887 , B32B3/08 , B32B3/266 , B32B27/08 , B32B2307/412 , G01N21/51 , G01N21/645 , G01N2021/513 , G01N2021/6482 , G01N2201/06113 , Y10T428/24612
摘要： There is provided a composite structure including: at least two substrates which are made of thermoplastic resin and which are bonded by thermocompression; and at least one member which is made of a material whose heat distortion temperature is higher than a heat distortion temperature of the thermoplastic resin and which is inserted into a space formed in at least one of the substrates. The member inserted in the space is fixed and held by wall surfaces which form the space of the substrates and which are thermally deformed by thermocompression.

7. 发明申请

US20140308800A1 METHOD FOR MANUFACTURING COMPOSITE WAFERS 有权
标题翻译：制造复合波导的方法
公开(公告)号：US20140308800A1
公开(公告)日：2014-10-16
申请号：US14343515
申请日：2012-09-14
申请人： Shoji Akiyama , Kazutoshi Nagata
发明人： Shoji Akiyama , Kazutoshi Nagata
IPC分类号： H01L21/762
CPC分类号： H01L21/76254 , H01L21/02002 , H01L21/2007 , H01L21/2011 , H01L21/76243 , H01L21/76251
摘要： This invention provides a method for manufacturing composite wafers in which at least two composite wafers can be obtained from one donor wafer, and in which the chamfering step can be omitted. Provided is a method for manufacturing composite wafers comprising: bonding surfaces of at least two handle wafers and a surface of a donor wafer which has a diameter greater than or equal to a sum of diameters of the at least two handle wafers and which has a hydrogen ion implantation layer formed inside thereof by implanting hydrogen ions from the surface of the donor wafer, to obtain a bonded wafer; heating the bonded wafer at 200° C. to 400° C.; and detaching a film from the donor wafer along the hydrogen ion implantation layer of the heated bonded wafer, to obtain the composite wafers having the film transferred onto the at least two handle wafers.
摘要翻译：本发明提供一种制造复合晶片的方法，其中可以从一个施主晶片获得至少两个复合晶片，并且其中可以省略倒角步骤。提供了一种用于制造复合晶片的方法，包括：将至少两个手柄晶片的接合表面和施主晶片的表面直接大于或等于至少两个手柄晶片的直径之和，并且具有氢通过从施主晶片的表面注入氢离子形成在其内部的离子注入层，以获得接合晶片; 将粘合晶片在200℃加热至400℃; 以及沿加热的接合晶片的氢离子注入层从施主晶片分离膜，以获得具有转移到至少两个处理晶片上的膜的复合晶片。

8. 外观设计

USD704580S1 Micro flow channel chip for flow cytometer 有权
标题翻译：用于流式细胞仪的微流通芯片
公开(公告)号：USD704580S1
公开(公告)日：2014-05-13
申请号：US29421304
申请日：2012-06-29
申请人： Yuji Akiyama , Shoji Akiyama , Takeshi Yamasaki
设计人： Yuji Akiyama , Shoji Akiyama , Takeshi Yamasaki

9. 发明申请

US20130003036A1 PHOTO MASK UNIT COMPRISING A PHOTOMASK AND A PELLICLE AND A METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：包含光电照相机和胶囊的照片遮罩单元及其制造方法
公开(公告)号：US20130003036A1
公开(公告)日：2013-01-03
申请号：US13608716
申请日：2012-09-10
申请人： Shoji Akiyama , Yoshihiro Kubota
发明人： Shoji Akiyama , Yoshihiro Kubota
IPC分类号： G03B27/58 , B23P11/00
CPC分类号： G03F1/24 , G03F1/62 , G03F1/64 , Y10T29/49826
摘要： It is an object of the present invention to provide a photomask unit suitable for forming a microscopic pattern of 32 nm or smaller on a photoresist film using the EUV exposure technique and being able to reliably prevent the flatness of a photomask from being lowered. The photomask unit 1 according to the present invention includes a pellicle membrane 6, a pellicle frame 7 onto one surface of which a region of the pellicle membrane 6 in the vicinity of side portions of the pellicle membrane 6 is fixed, a photomask 2 and a stage 3 onto one surface of which the photomask 2 and the pellicle frame 7 are fixed, and the pellicle frame 7 is fixed onto the stage 3 at a region outside of a region of the stage 3 onto which the photomask 2 is fixed.
摘要翻译：本发明的目的是提供一种适用于使用EUV曝光技术在光致抗蚀剂膜上形成32nm或更小的微观图案并能够可靠地防止光掩模的平坦度降低的光掩模单元。根据本发明的光掩模单元1包括防护薄膜6，防护薄膜框架7，其一个表面上防护薄膜6的侧部附近的防护薄膜6的区域被固定，光掩模2和阶段3在其一个表面上固定光掩模2和防护薄膜组件框架7，并且防护膜框架7在固定有光掩模2的载物台3的区域外部的区域固定到载物台3上。

10. 发明授权

US08268700B2 Method for manufacturing SOI wafer 有权
标题翻译：制造SOI晶圆的方法
公开(公告)号：US08268700B2
公开(公告)日：2012-09-18
申请号：US12153160
申请日：2008-05-14
申请人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Koichi Tanaka , Makoto Kawai , Yuuji Tobisaka
发明人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Koichi Tanaka , Makoto Kawai , Yuuji Tobisaka
IPC分类号： H01L21/30
CPC分类号： H01L21/76254
摘要： There is disclosed a method for manufacturing an SOI wafer comprising at least: implanting a hydrogen ion, a rare gas ion, or both the ions into a donor wafer formed of a silicon wafer or a silicon wafer having an oxide film formed on a surface thereof from a surface of the donor wafer, thereby forming an ion implanted layer; performing a plasma activation treatment with respect to at least one of an ion implanted surface of the donor wafer and a surface of a handle wafer, the surface of the handle wafer is to be bonded to the ion implanted surface; closely bonding these surfaces to each other; mechanically delaminating the donor wafer at the ion implanted layer as a boundary and thereby reducing a film thickness thereof to provide an SOI layer, and performing a heat treatment at 600 to 1000° C.; and polishing a surface of the SOI layer for 10 to 50 nm based on chemical mechanical polishing.A method for manufacturing with excellent productivity an SOI wafer having an SOI layer with a mirror-finished surface and high film thickness uniformity can be provided.
摘要翻译：公开了一种制造SOI晶片的方法，该方法至少包括：将氢离子，稀有气体离子或两者离子注入到由硅晶片或具有在其表面上形成的氧化膜的硅晶片形成的施主晶片中从施主晶片的表面，从而形成离子注入层; 对施主晶片的离子注入表面和处理晶片的表面中的至少一个进行等离子体激活处理，把手晶片的表面与离子注入表面结合; 将这些表面彼此紧密结合; 以离子注入层的施主晶片作为边界进行机械分层，由此降低其膜厚以提供SOI层，并在600〜1000℃下进行热处理。并且基于化学机械抛光将SOI层的表面抛光10至50nm。可以提供具有优异的生产率的具有SOI层的具有镜面精加工表面和高膜厚均匀性的SOI晶片的方法。

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