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1. 发明申请

US20100019337A1 PHOTOELECTRIC CONVERSION ELEMENT AND MANUFACTURING METHOD OF PHOTOELECTRIC CONVERSION ELEMENT 有权
公开(公告)号：US20100019337A1
公开(公告)日：2010-01-28
申请号：US12575910
申请日：2009-10-08
申请人： Shinya SASAGAWA , Shinya Hasegawa , Hidekazu Takahashi , Tatsuya Arao
发明人： Shinya SASAGAWA , Shinya Hasegawa , Hidekazu Takahashi , Tatsuya Arao
IPC分类号： H01L31/0232 , H01L31/0352
CPC分类号： H01L31/035281 , H01L21/32136 , H01L21/32137 , H01L27/14643 , Y02E10/50
摘要： An object is to provide a photoelectric conversion element having a side surface with different taper angles by conducting etching of a photoelectric conversion layer step-by-step. A pin photodiode has a high response speed compared with a pn photodiode but has a disadvantage of large dark current. One cause of the dark current is considered to be conduction through an etching residue which is generated in etching and deposited on a side surface of the photoelectric conversion layer. Leakage current of the photoelectric conversion element is reduced by forming a structure in which a side surface has two different tapered shapes, which conventionally has a uniform surface, so that the photoelectric conversion layer has a side surface of a p-layer and a side surface of an n-layer, which are not in the same plane.

2. 发明申请

US20070278606A1 PHOTOELECTRIC CONVERSION ELEMENT AND MANUFACTURING METHOD OF PHOTOELECTRIC CONVERSION ELEMENT 有权
标题翻译：光电转换元件和光电转换元件的制造方法
公开(公告)号：US20070278606A1
公开(公告)日：2007-12-06
申请号：US11737477
申请日：2007-04-19
申请人： Shinya SASAGAWA , Shinya HASEGAWA , Hidekazu TAKAHASHI , Tatsuya ARAO
发明人： Shinya SASAGAWA , Shinya HASEGAWA , Hidekazu TAKAHASHI , Tatsuya ARAO
IPC分类号： H01L31/075 , H01L31/18
CPC分类号： H01L31/035281 , H01L21/32136 , H01L21/32137 , H01L27/14643 , Y02E10/50
摘要： An object is to provide a photoelectric conversion element having a side surface with different taper angles by conducting etching of a photoelectric conversion layer step-by-step. A pin photodiode has a high response speed compared with a pn photodiode but has a disadvantage of large dark current. One cause of the dark current is considered to be conduction through an etching residue which is generated in etching and deposited on a side surface of the photoelectric conversion layer. Leakage current of the photoelectric conversion element is reduced by forming a structure in which a side surface has two different tapered shapes, which conventionally has a uniform surface, so that the photoelectric conversion layer has a side surface of a p-layer and a side surface of an n-layer, which are not in the same plane.
摘要翻译：本发明的目的是提供一种具有不同锥角的侧面的光电转换元件，该光电转换元件逐步进行光电转换层的蚀刻。与pn光电二极管相比，pin光电二极管具有高响应速度，但是具有大的暗电流的缺点。认为暗电流的一个原因是通过在蚀刻中产生并沉积在光电转换层的侧表面上的蚀刻残余物导电。光电转换元件的泄漏电流通过形成侧表面具有两个不同的锥形形状的结构而降低，通常具有均匀的表面，使得光电转换层具有p层的侧表面和侧表面的n层，它们不在同一平面。

3. 发明申请

US20100276773A1 PHOTOELECTRIC CONVERSION ELEMENT AND MANUFACTURING METHOD OF PHOTOELECTRIC CONVERSION ELEMENT 有权
标题翻译：光电转换元件和光电转换元件的制造方法
公开(公告)号：US20100276773A1
公开(公告)日：2010-11-04
申请号：US12834040
申请日：2010-07-12
申请人： Shinya SASAGAWA , Shinya HASEGAWA , Hidekazu Takahashi , Tatsuya Arao
发明人： Shinya SASAGAWA , Shinya HASEGAWA , Hidekazu Takahashi , Tatsuya Arao
IPC分类号： H01L31/0216 , H01L31/0232 , H01L31/0352 , H01L31/105
CPC分类号： H01L31/035281 , H01L21/32136 , H01L21/32137 , H01L27/14643 , Y02E10/50
摘要： An object is to provide a photoelectric conversion element having a side surface with different taper angles by conducting etching of a photoelectric conversion layer step-by-step. A pin photodiode has a high response speed compared with a pn photodiode but has a disadvantage of large dark current. One cause of the dark current is considered to be conduction through an etching residue which is generated in etching and deposited on a side surface of the photoelectric conversion layer. Leakage current of the photoelectric conversion element is reduced by forming a structure in which a side surface has two different tapered shapes, which conventionally has a uniform surface, so that the photoelectric conversion layer has a side surface of a p-layer and a side surface of an n-layer, which are not in the same plane.
摘要翻译：本发明的目的是提供一种具有不同锥角的侧面的光电转换元件，该光电转换元件逐步进行光电转换层的蚀刻。与pn光电二极管相比，pin光电二极管具有高响应速度，但是具有大的暗电流的缺点。认为暗电流的一个原因是通过在蚀刻中产生并沉积在光电转换层的侧表面上的蚀刻残渣导电。光电转换元件的泄漏电流通过形成侧表面具有两个不同的锥形形状的结构而降低，通常具有均匀的表面，使得光电转换层具有p层的侧表面和侧表面的n层，它们不在同一平面。

4. 发明申请

US20120235140A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件的制造方法
公开(公告)号：US20120235140A1
公开(公告)日：2012-09-20
申请号：US13483423
申请日：2012-05-30
申请人： Hideomi SUZAWA , Shinya SASAGAWA
发明人： Hideomi SUZAWA , Shinya SASAGAWA
IPC分类号： H01L29/786 , H01L29/12
CPC分类号： H01L29/78636 , G11C16/0433 , H01L27/0688 , H01L27/11521 , H01L27/11551 , H01L27/1156 , H01L27/1214 , H01L27/1225 , H01L27/1288 , H01L29/66969 , H01L29/7869
摘要： In an embodiment, an insulating film is formed over a flat surface; a mask is formed over the insulating film; a slimming process is performed on the mask; an etching process is performed on the insulating film using the mask; a conductive film covering the insulating film is formed; a polishing process is performed on the conductive film and the insulating film, so that the conductive film and the insulating film have equal thicknesses; the conductive film is etched, so that a source electrode and a drain electrode which are thinner than the conductive film are formed; an oxide semiconductor film is formed in contact with the insulating film, the source electrode, and the drain electrode; a gate insulating film covering the oxide semiconductor film is formed; and a gate electrode is formed in a region which is over the gate insulating film and overlaps with the insulating film.
摘要翻译：在一个实施例中，在平坦表面上形成绝缘膜; 在绝缘膜上形成掩模; 在面罩上进行减肥过程; 使用掩模对绝缘膜进行蚀刻处理; 形成覆盖绝缘膜的导电膜; 对导电膜和绝缘膜进行抛光处理，使得导电膜和绝缘膜具有相等的厚度; 蚀刻导电膜，形成比导电膜薄的源电极和漏电极; 形成与绝缘膜，源电极和漏电极接触的氧化物半导体膜; 形成覆盖氧化物半导体膜的栅极绝缘膜; 并且栅电极形成在栅极绝缘膜上并与绝缘膜重叠的区域中。

5. 发明申请

US20110287605A1 METHOD FOR MANUFACTURING SOI SUBSTRATE 有权
标题翻译：制造SOI衬底的方法
公开(公告)号：US20110287605A1
公开(公告)日：2011-11-24
申请号：US13198171
申请日：2011-08-04
申请人： Hideomi SUZAWA , Shinya SASAGAWA , Akihisa SHIMOMURA , Junpei MOMO , Motomu KURATA , Taiga MURAOKA , Kosei NEI
发明人： Hideomi SUZAWA , Shinya SASAGAWA , Akihisa SHIMOMURA , Junpei MOMO , Motomu KURATA , Taiga MURAOKA , Kosei NEI
IPC分类号： H01L21/762
CPC分类号： H01L21/76254
摘要： Forming an insulating film on a surface of the single crystal semiconductor substrate, forming a fragile region in the single crystal semiconductor substrate by irradiating the single crystal semiconductor substrate with an ion beam through the insulating film, forming a bonding layer over the insulating film, bonding a supporting substrate to the single crystal semiconductor substrate by interposing the bonding layer between the supporting substrate and the single crystal semiconductor substrate, dividing the single crystal semiconductor substrate at the fragile region to separate the single crystal semiconductor substrate into a single crystal semiconductor layer attached to the supporting substrate, performing first dry etching treatment on a part of the fragile region remaining on the single crystal semiconductor layer, performing second dry etching treatment on a surface of the single crystal semiconductor layer subjected to the first etching treatment, and irradiating the single crystal semiconductor layer with laser light.
摘要翻译：在单晶半导体基板的表面上形成绝缘膜，在单晶半导体基板中通过用离子束照射单晶半导体基板通过绝缘膜形成脆性区域，在绝缘膜上形成接合层，通过将支撑基板和单晶半导体基板之间的接合层插入到单晶半导体基板的支撑基板上，将单晶半导体基板分割为脆性区域，将单晶半导体基板分离成单晶半导体层，所述支撑基板对残留在所述单晶半导体层上的所述脆性区域的一部分进行第一干蚀刻处理，对经过所述第一蚀刻处理的所述单晶半导体层的表面进行第二干蚀刻处理，具有激光的晶体半导体层。

6. 发明申请

US20110287580A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20110287580A1
公开(公告)日：2011-11-24
申请号：US13107054
申请日：2011-05-13
申请人： Shunpei YAMAZAKI , Hideomi SUZAWA , Shinya SASAGAWA
发明人： Shunpei YAMAZAKI , Hideomi SUZAWA , Shinya SASAGAWA
IPC分类号： H01L21/336
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/66969
摘要： An object of an embodiment of the present invention is to provide a semiconductor device including a normally-off oxide semiconductor element whose characteristic variation is small in the long term. A cation containing one or more elements selected from oxygen and halogen is added to an oxide semiconductor layer, thereby suppressing elimination of oxygen, reducing hydrogen, or suppressing movement of hydrogen. Accordingly, carriers in the oxide semiconductor can be reduced and the number of the carriers can be kept constant in the long term. As a result, the semiconductor device including the normally-off oxide semiconductor element whose characteristic variation is small in the long term can be provided.
摘要翻译：本发明的一个实施例的目的是提供一种包括其长期特性变化小的常关氧化物半导体元件的半导体器件。将含有选自氧和卤素的一种或多种元素的阳离子加入到氧化物半导体层中，从而抑制氧的消除，还原氢或抑制氢的移动。因此，可以减少氧化物半导体中的载流子，并且可以长期保持载流子的数量恒定。结果，可以提供包括其长期特性变化小的常关氧化物半导体元件的半导体器件。

7. 发明申请

US20110193080A1 Semiconductor device and electronic appliance 有权
标题翻译：半导体器件和电子设备
公开(公告)号：US20110193080A1
公开(公告)日：2011-08-11
申请号：US13014081
申请日：2011-01-26
申请人： Shunpei YAMAZAKI , Hiromichi GODO , Hideomi SUZAWA , Shinya SASAGAWA , Motomu KURATA , Mayumi MIKAMI
发明人： Shunpei YAMAZAKI , Hiromichi GODO , Hideomi SUZAWA , Shinya SASAGAWA , Motomu KURATA , Mayumi MIKAMI
IPC分类号： H01L29/78
CPC分类号： H01L29/7869 , H01L29/41733 , H01L29/45 , H01L29/66969 , Y10T428/24421
摘要： One object is to provide a semiconductor device that includes an oxide semiconductor and is reduced in size with favorable characteristics maintained. The semiconductor device includes an oxide semiconductor layer, a source electrode and a drain electrode in contact with the oxide semiconductor layer, a gate electrode overlapping with the oxide semiconductor layer; and a gate insulating layer between the oxide semiconductor layer and the gate electrode. The source electrode or the drain electrode includes a first conductive layer and a second conductive layer having a region extended in a channel length direction from an end face of the first conductive layer. The sidewall insulating layer has a length of a bottom surface in the channel length direction smaller than a length in the channel length direction of the extended region of the second conductive layer and is provided over the extended region.
摘要翻译：一个目的是提供一种包括氧化物半导体的半导体器件，并且尺寸减小，并保持良好的特性。半导体器件包括与氧化物半导体层接触的氧化物半导体层，源电极和漏电极，与氧化物半导体层重叠的栅电极; 以及在氧化物半导体层和栅电极之间的栅极绝缘层。源电极或漏极包括第一导电层和具有从第一导电层的端面在沟道长度方向上延伸的区域的第二导电层。侧壁绝缘层的沟道长度方向的底面的长度小于第二导电层的延伸区域的沟道长度方向的长度，并且设置在延伸区域上。

8. 发明申请

US20100176461A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100176461A1
公开(公告)日：2010-07-15
申请号：US12731824
申请日：2010-03-25
申请人： Shinya SASAGAWA
发明人： Shinya SASAGAWA
IPC分类号： H01L29/49
CPC分类号： H01L21/76804 , H01L23/485 , H01L27/124 , H01L29/41733 , H01L2924/0002 , H01L2924/00
摘要： A method for easily manufacturing a semiconductor device in which variation in thickness or disconnection of a source electrode or a drain electrode is prevented is proposed. A semiconductor device includes a semiconductor layer formed over an insulating substrate; a first insulating layer formed over the semiconductor layer; a gate electrode formed over the first insulating layer; a second insulating layer formed over the gate electrode; an opening which reaches the semiconductor layer and is formed at least in the first insulating layer and the second insulating layer; and a step portion formed at a side surface of the second insulating layer in the opening.
摘要翻译：提出一种容易制造半导体器件的方法，其中防止了源电极或漏电极的厚度变化或断开。半导体器件包括形成在绝缘基板上的半导体层; 形成在所述半导体层上的第一绝缘层; 形成在所述第一绝缘层上的栅电极; 形成在所述栅电极上的第二绝缘层; 至少形成在所述第一绝缘层和所述第二绝缘层中的至少形成在所述半导体层上的开口部; 以及形成在所述开口中的所述第二绝缘层的侧表面处的台阶部。

9. 发明申请

US20080237876A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080237876A1
公开(公告)日：2008-10-02
申请号：US12046881
申请日：2008-03-12
申请人： Shinya SASAGAWA
发明人： Shinya SASAGAWA
IPC分类号： H01L23/52 , H01L21/28
CPC分类号： H01L21/76804 , H01L23/485 , H01L27/124 , H01L29/41733 , H01L2924/0002 , H01L2924/00
摘要： A method for easily manufacturing a semiconductor device in which variation in thickness or disconnection of a source electrode or a drain electrode is prevented is proposed A semiconductor device includes a semiconductor layer formed over an insulating substrate; a first insulating layer formed over the semiconductor layer; a gate electrode formed over the first insulating layer; a second insulating layer formed over the gate electrode; an opening which reaches the semiconductor layer and is formed at least in the first insulating layer and the second insulating layer; and a step portion formed at a side surface of the second insulating layer in the opening.
摘要翻译：提出一种容易制造其中防止源电极或漏电极的厚度变化或断开的半导体器件的方法。一种半导体器件包括形成在绝缘基板上的半导体层; 形成在所述半导体层上的第一绝缘层; 形成在所述第一绝缘层上的栅电极; 形成在所述栅电极上的第二绝缘层; 至少形成在所述第一绝缘层和所述第二绝缘层中的至少形成在所述半导体层上的开口部; 以及形成在所述开口中的所述第二绝缘层的侧表面处的台阶部。

10. 发明申请

US20130020575A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
公开(公告)号：US20130020575A1
公开(公告)日：2013-01-24
申请号：US13545791
申请日：2012-07-10
申请人： Akihiro ISHIZUKA , Shinya SASAGAWA
发明人： Akihiro ISHIZUKA , Shinya SASAGAWA
IPC分类号： H01L21/336 , H01L29/786
CPC分类号： H01L21/47573 , H01L21/02554 , H01L21/02587 , H01L21/02639 , H01L27/1225 , H01L29/42384 , H01L29/66969 , H01L29/7869 , H01L29/78696
摘要： To provide a miniaturized semiconductor device with stable electric characteristics in which a short-channel effect is suppressed. Further, to provide a manufacturing method of the semiconductor device. The semiconductor device (transistor) including a trench formed in an oxide insulating layer, an oxide semiconductor film formed along the trench, a source electrode and a drain electrode which are in contact with the oxide semiconductor film, a gate insulating layer over the oxide semiconductor film, a gate electrode over the gate insulating layer is provided. The lower corner portions of the trench are curved, and the side portions of the trench have side surfaces substantially perpendicular to the top surface of the oxide insulating layer. Further, the width between the upper ends of the trench is greater than or equal to 1 time and less than or equal to 1.5 times the width between the side surfaces of the trench.

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