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1. 发明申请

US20110268198A1 DRIVER CIRCUIT, RECEIVER CIRCUIT, AND METHOD OF CONTROLLING A COMMUNICATIONS SYSTEM INCLUDING THE CIRCUITS 有权
标题翻译：驱动电路，接收电路和控制包括电路的通信系统的方法
公开(公告)号：US20110268198A1
公开(公告)日：2011-11-03
申请号：US13143233
申请日：2010-11-01
申请人： Shinichiro Nishioka , Yoshihide Komatsu , Hiroshi Suenaga , Kohei Masuda
发明人： Shinichiro Nishioka , Yoshihide Komatsu , Hiroshi Suenaga , Kohei Masuda
IPC分类号： H04L25/00
CPC分类号： H04B1/1615 , H04L25/0272
摘要： In a communications system for differential signals, a driver circuit is connected to a receiver circuit by a pair of differential signal lines. When data is not being transmitted, the differential signal lines are maintained at a predetermined electric potential, and when data is to be transferred, a differential signal is output at predetermined electric potentials. The receiver circuit switches between a power-down state and a normal state when detecting states of the electric potentials of the differential signal lines.
摘要翻译：在用于差分信号的通信系统中，驱动电路通过一对差分信号线连接到接收器电路。当不发送数据时，差分信号线保持在预定电位，并且当数据要被传送时，以预定电位输出差分信号。当检测到差分信号线的电位的状态时，接收器电路在掉电状态和正常状态之间切换。

2. 发明申请

US20110241432A1 INTERFACE CIRCUIT AND INTERFACE SYSTEM 有权
标题翻译：接口电路和接口系统
公开(公告)号：US20110241432A1
公开(公告)日：2011-10-06
申请号：US13139397
申请日：2010-11-01
申请人： Shinichiro Nishioka , Yoshihide Komatsu , Hiroshi Suenaga , Kohei Masuda
发明人： Shinichiro Nishioka , Yoshihide Komatsu , Hiroshi Suenaga , Kohei Masuda
IPC分类号： H02J4/00
CPC分类号： G06F13/42 , H04L25/0272 , Y10T307/696
摘要： To aim to provide an interface circuit that supports both a single-ended method and a differential method as a transmission method, and one of pairs of input terminals for a differential signal is shared to input/output a single-ended signal.A differential signal receiving circuit that receives a differential signal input through the pair of shared terminals is activated when a differential signal is input to a pair of dedicated input terminals for a differential signal, which is different from the pair of shared terminals. After the differential signal receiving circuit is activated, the active state is maintained by a built-in controller.Accordingly, the activation of the differential signal receiving circuit that receives a differential signal input through the shared terminals is controlled by controlling the differential signal input through the pair of dedicated input terminals, and furthermore, the possibility that the differential signal receiving circuit becomes inactive at an unexpected timing is reduced to a low level.
摘要翻译：为了提供支持单端方法和差分方法两者的接口电路作为传输方法，并且用于差分信号的一对输入端子被共享以输入/输出单端信号。当将差分信号输入到与一对共享终端不同的差分信号的一对专用输入端子时，接收通过一对共享端子输入的差分信号的差分信号接收电路被激活。在差分信号接收电路被激活之后，由内置控制器维持有效状态。因此，通过控制通过一对专用输入端子输入的差分信号来控制接收通过共享端子输入的差分信号的差分信号接收电路的激活，此外，差分信号接收电路在意想不到的时间降到了低水平。

3. 发明授权

US08713231B2 Interface circuit and interface system 有权
标题翻译：接口电路和接口系统
公开(公告)号：US08713231B2
公开(公告)日：2014-04-29
申请号：US13139397
申请日：2010-11-01
申请人： Shinichiro Nishioka , Yoshihide Komatsu , Hiroshi Suenaga , Kohei Masuda
发明人： Shinichiro Nishioka , Yoshihide Komatsu , Hiroshi Suenaga , Kohei Masuda
IPC分类号： G06F13/42
CPC分类号： G06F13/42 , H04L25/0272 , Y10T307/696
摘要： To aim to provide an interface circuit that supports both a single-ended method and a differential method as a transmission method, and one of pairs of input terminals for a differential signal is shared to input/output a single-ended signal.A differential signal receiving circuit that receives a differential signal input through the pair of shared terminals is activated when a differential signal is input to a pair of dedicated input terminals for a differential signal, which is different from the pair of shared terminals. After the differential signal receiving circuit is activated, the active state is maintained by a built-in controller.Accordingly, the activation of the differential signal receiving circuit that receives a differential signal input through the shared terminals is controlled by controlling the differential signal input through the pair of dedicated input terminals, and furthermore, the possibility that the differential signal receiving circuit becomes inactive at an unexpected timing is reduced to a low level.
摘要翻译：为了提供支持单端方法和差分方法两者的接口电路作为传输方法，并且用于差分信号的一对输入端子被共享以输入/输出单端信号。当将差分信号输入到与一对共享终端不同的差分信号的一对专用输入端子时，接收通过一对共享端子输入的差分信号的差分信号接收电路被激活。在差分信号接收电路被激活之后，由内置控制器维持有效状态。因此，通过控制通过一对专用输入端子输入的差分信号来控制接收通过共享端子输入的差分信号的差分信号接收电路的激活，此外，差分信号接收电路在意想不到的时间降到了低水平。

4. 发明授权

US08548070B2 Driver circuit, receiver circuit, and method of controlling a communications system including the circuits 有权
标题翻译：驱动器电路，接收器电路和控制包括电路的通信系统的方法
公开(公告)号：US08548070B2
公开(公告)日：2013-10-01
申请号：US13143233
申请日：2010-11-01
申请人： Shinichiro Nishioka , Yoshihide Komatsu , Hiroshi Suenaga , Kohei Masuda
发明人： Shinichiro Nishioka , Yoshihide Komatsu , Hiroshi Suenaga , Kohei Masuda
IPC分类号： H04B3/00
CPC分类号： H04B1/1615 , H04L25/0272
摘要： In a communications system for differential signals, a driver circuit is connected to a receiver circuit by a pair of differential signal lines. When data is not being transmitted, the differential signal lines are maintained at a predetermined electric potential, and when data is to be transferred, a differential signal is output at predetermined electric potentials. The receiver circuit switches between a power-down state and a normal state when detecting states of the electric potentials of the differential signal lines.
摘要翻译：在用于差分信号的通信系统中，驱动电路通过一对差分信号线连接到接收器电路。当不发送数据时，差分信号线保持在预定电位，并且当数据要被传送时，以预定电位输出差分信号。当检测到差分信号线的电位的状态时，接收器电路在掉电状态和正常状态之间切换。

5. 发明授权

US08520563B2 Interface device, communications system, non-volatile storage device, communication mode switching method and integrated circuit 有权
标题翻译：接口设备，通信系统，非易失性存储设备，通信模式切换方法和集成电路
公开(公告)号：US08520563B2
公开(公告)日：2013-08-27
申请号：US12995558
申请日：2009-05-29
申请人： Tadashi Ono , Isao Kato , Hideyuki Yamada , Shinichiro Nishioka , Hiroshi Suenaga , Tsutomu Sekibe
发明人： Tadashi Ono , Isao Kato , Hideyuki Yamada , Shinichiro Nishioka , Hiroshi Suenaga , Tsutomu Sekibe
IPC分类号： H04B1/44
CPC分类号： H04L5/16 , H04L5/18 , H04L25/14
摘要： A host device and a slave device are set to a full-duplex mode by temporarily switching the communication direction of a first transmission channel or a second transmission channel after completing transmission and reception of a predetermined number of data packets in the half-duplex mode. The host device or the slave device can thus transmit an interrupt request, such as a request associated with a wait status or a busy status, to its communication target using the temporary full-duplex mode. This enables the host device or the slave device to process such an interrupt request during high-speed data transfer performed in the half-duplex mode.
摘要翻译：在半双工模式下完成预定数量的数据分组的发送和接收之后，通过临时切换第一传输信道或第二传输信道的通信方向，将主机设备和从设备设置为全双工模式。因此主机设备或从设备可以使用临时全双工模式向其通信目标传送诸如与等待状态或忙状态相关联的请求的中断请求。这使得主机设备或从设备在半双工模式下执行的高速数据传输期间处理这样的中断请求。

6. 发明申请

US20110103224A1 DATA COMMUNICATION SYSTEM, COMMUNICATION DEVICE, AND COMMUNICATION METHOD 有权
标题翻译：数据通信系统，通信设备和通信方法
公开(公告)号：US20110103224A1
公开(公告)日：2011-05-05
申请号：US12674045
申请日：2009-06-11
申请人： Shinichiro Nishioka , Hiroshi Suenaga , Tsutomu Sekibe , Isao Kato , Tadashi Ono , Hideyuki Yamada
发明人： Shinichiro Nishioka , Hiroshi Suenaga , Tsutomu Sekibe , Isao Kato , Tadashi Ono , Hideyuki Yamada
IPC分类号： H04L5/14 , H04L12/26
CPC分类号： H04L25/0272 , H04L5/14 , H04L5/1438 , H04L5/16
摘要： A data communication system for starting transmission and reception of target data for processing upon recognition that switching between communication modes is completed. The data communication system includes a master communication device and a slave communication device that continuously perform, at a time of switching from half-duplex communication to full-duplex communication, (i) a handshake using a directional control code indicating the switching and a preamble code indicating completion of the switching and (ii) a handshake using the preamble code and an acknowledge code indicating receipt of the preamble code, whereby each of the devices recognizes that the switching between communication modes by the opposite device is completed and starts transmission and reception of the target data.
摘要翻译：一种数据通信系统，用于在识别出完成通信模式之间的切换的情况下开始用于处理的目标数据的发送和接收。数据通信系统包括在从半双工通信切换到全双工通信时连续执行主通信设备和从通信设备，（i）使用指示切换的方向控制代码的握手和前导码指示切换完成的代码和（ii）使用前导码的握手和指示接收前导码的确认代码，由此每个设备识别出相对设备的通信模式之间的切换完成并开始发送和接收的目标数据。

7. 发明授权

US08351356B2 Data communication system, communication device, and communication method 有权
标题翻译：数据通信系统，通信设备和通信方式
公开(公告)号：US08351356B2
公开(公告)日：2013-01-08
申请号：US12674045
申请日：2009-06-11
申请人： Shinichiro Nishioka , Hiroshi Suenaga , Tsutomu Sekibe , Isao Kato , Tadashi Ono , Hideyuki Yamada
发明人： Shinichiro Nishioka , Hiroshi Suenaga , Tsutomu Sekibe , Isao Kato , Tadashi Ono , Hideyuki Yamada
IPC分类号： H04L5/16 , H04L5/14 , G06F13/12
CPC分类号： H04L25/0272 , H04L5/14 , H04L5/1438 , H04L5/16
摘要： A data communication system for starting transmission and reception of target data for processing upon recognition that switching between communication modes is completed. The data communication system includes a master communication device and a slave communication device that continuously perform, at a time of switching from half-duplex communication to full-duplex communication, (i) a handshake using a directional control code indicating the switching and a preamble code indicating completion of the switching and (ii) a handshake using the preamble code and an acknowledge code indicating receipt of the preamble code, whereby each of the devices recognizes that the switching between communication modes by the opposite device is completed and starts transmission and reception of the target data.
摘要翻译：一种数据通信系统，用于在识别出完成通信模式之间的切换的情况下开始用于处理的目标数据的发送和接收。数据通信系统包括在从半双工通信切换到全双工通信时连续执行主通信设备和从通信设备，（i）使用指示切换的方向控制代码的握手和前导码指示切换完成的代码和（ii）使用前导码的握手和指示接收前导码的确认代码，由此每个设备识别出相对设备的通信模式之间的切换完成并开始发送和接收的目标数据。

8. 发明申请

US20110182216A1 INTERFACE DEVICE, COMMUNICATIONS SYSTEM, NON-VOLATILE STORAGE DEVICE, COMMUNICATION MODE SWITCHING METHOD AND INTEGRATED CIRCUIT 有权
标题翻译：接口设备，通信系统，非易失性存储设备，通信模式切换方法和集成电路
公开(公告)号：US20110182216A1
公开(公告)日：2011-07-28
申请号：US12995558
申请日：2009-05-29
申请人： Tadashi Ono , Isao Kato , Hideyuki Yamada , Shinichiro Nishioka , Hiroshi Suenaga , Tsutomu Sekibe
发明人： Tadashi Ono , Isao Kato , Hideyuki Yamada , Shinichiro Nishioka , Hiroshi Suenaga , Tsutomu Sekibe
IPC分类号： H04B1/44
CPC分类号： H04L5/16 , H04L5/18 , H04L25/14
摘要： An interrupt request cannot be transmitted while a data read command or a data write command transmitted from a host device to a slave device is being processed in a half-duplex mode. Disclosed are a host device and a slave device that are set to a full-duplex mode by temporarily switching the communication direction of a first transmission channel or a second transmission channel after completing transmission and reception of a predetermined number of data packets in the half-duplex mode. The host device or the slave device can thus transmit an interrupt request, such as a request associated with a wait status or a busy status, to its communication target using the temporary full-duplex mode. This enables the host device or the slave device to process such an interrupt request during high-speed data transfer performed in the half-duplex mode.
摘要翻译：当从主机设备发送到从设备的数据读取命令或数据写入命令正在以半双工模式进行处理时，不能发送中断请求。公开了一种主机设备和从设备，其通过在完成在半双工模式下的预定数量的数据分组的传输和接收之后临时切换第一传输信道或第二传输信道的通信方向而被设置为全双工模式，双工模式。因此主机设备或从设备可以使用临时全双工模式向其通信目标传送诸如与等待状态或忙状态相关联的请求的中断请求。这使得主机设备或从设备在半双工模式下执行的高速数据传输期间处理这样的中断请求。

9. 发明授权

US09319275B2 Communication device, communication method, and communication program 有权
标题翻译：通信设备，通信方式和通信程序
公开(公告)号：US09319275B2
公开(公告)日：2016-04-19
申请号：US14122507
申请日：2012-04-27
申请人： Satoshi Senga , Yuusaku Ohta , Shinichiro Nishioka
发明人： Satoshi Senga , Yuusaku Ohta , Shinichiro Nishioka
IPC分类号： G06F15/177 , H04L12/24 , H04L29/08 , H04W84/20 , H04W12/08 , H04W4/00
CPC分类号： H04L41/0866 , H04L67/141 , H04W4/80 , H04W12/08 , H04W84/20
摘要： An objective of the present invention is to determine a function of each communication apparatus with few steps. A first communication apparatus (100) is capable of carrying out at least one of a function of an apparatus which receives an access thereto from a second communication apparatus (200), and a function of a host which accesses the second communication apparatus (200). The first communication apparatus (100) comprises: an access request issuing unit (140) which issues a request which denotes the function thereof to the second communication apparatus (200); and a conflict assessment unit (150) which, either when the request and a request which the second communication apparatus (200) has issued conflict or when the request is rejected, makes the access request issuing unit (140) reissue a request to the second communication apparatus (200) which denotes another function.
摘要翻译：本发明的目的是以几步来确定每个通信装置的功能。第一通信装置（100）能够执行从第二通信装置（200）接收对其的装置的功能和访问第二通信装置（200）的主机的功能中的至少一个，。第一通信装置（100）包括：向第二通信装置（200）发出表示其功能的请求的接入请求发布单元（140）; 以及冲突评估单元（150），当所述请求和所述第二通信装置（200）发出冲突的请求或所述请求被拒绝时，使所述访问请求发布单元（140）向所述第二通信装置重新发出请求通信装置（200），其表示另一功能。

10. 发明申请

US20100148820A1 PROGRAMMABLE DEVICE, CONTROL METHOD OF DEVICE AND INFORMATION PROCESSING SYSTEM 有权
标题翻译：可编程器件，器件控制方法和信息处理系统
公开(公告)号：US20100148820A1
公开(公告)日：2010-06-17
申请号：US12598099
申请日：2008-09-18
申请人： Shinichiro Nishioka
发明人： Shinichiro Nishioka
IPC分类号： H03K19/177
CPC分类号： H03K19/17772 , H03K19/17784
摘要： A programmable device can operate at high speed while reducing power consumption. The programmable device (2) includes a plurality of processing tiles (11) each including a configuration memory (21) and a core logic (22), a configuration control unit (13) for programming them, and a power control unit (12) for cutting off a power supply depending on the operating state thereof. Power supply of the core logic (22) is cut off after saving the internal state of the core logic (22) to the configuration memory (21), and power is supplied again to the core logic (22) before the internal state is restored from the configuration memory (21) to the core logic (22), thus saving power while maintaining the internal state.
摘要翻译：可编程器件可以高速运行，同时降低功耗。可编程装置（2）包括多个处理瓦片（11），每个处理瓦片包括配置存储器（21）和核心逻辑（22），用于对它们进行编程的配置控制单元（13）以及功率控制单元（12）用于根据其工作状态切断电源。在将内核逻辑（22）的内部状态保存到配置存储器（21）之后，核心逻辑（22）的电源被切断，并且在内部状态恢复之前再次向核心逻辑（22）供电。从配置存储器（21）到核心逻辑（22），从而在保持内部状态的同时节省功率。

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