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1. 发明申请

US20110103224A1 DATA COMMUNICATION SYSTEM, COMMUNICATION DEVICE, AND COMMUNICATION METHOD 有权
标题翻译：数据通信系统，通信设备和通信方法
公开(公告)号：US20110103224A1
公开(公告)日：2011-05-05
申请号：US12674045
申请日：2009-06-11
申请人： Shinichiro Nishioka , Hiroshi Suenaga , Tsutomu Sekibe , Isao Kato , Tadashi Ono , Hideyuki Yamada
发明人： Shinichiro Nishioka , Hiroshi Suenaga , Tsutomu Sekibe , Isao Kato , Tadashi Ono , Hideyuki Yamada
IPC分类号： H04L5/14 , H04L12/26
CPC分类号： H04L25/0272 , H04L5/14 , H04L5/1438 , H04L5/16
摘要： A data communication system for starting transmission and reception of target data for processing upon recognition that switching between communication modes is completed. The data communication system includes a master communication device and a slave communication device that continuously perform, at a time of switching from half-duplex communication to full-duplex communication, (i) a handshake using a directional control code indicating the switching and a preamble code indicating completion of the switching and (ii) a handshake using the preamble code and an acknowledge code indicating receipt of the preamble code, whereby each of the devices recognizes that the switching between communication modes by the opposite device is completed and starts transmission and reception of the target data.
摘要翻译：一种数据通信系统，用于在识别出完成通信模式之间的切换的情况下开始用于处理的目标数据的发送和接收。数据通信系统包括在从半双工通信切换到全双工通信时连续执行主通信设备和从通信设备，（i）使用指示切换的方向控制代码的握手和前导码指示切换完成的代码和（ii）使用前导码的握手和指示接收前导码的确认代码，由此每个设备识别出相对设备的通信模式之间的切换完成并开始发送和接收的目标数据。

2. 发明授权

US08351356B2 Data communication system, communication device, and communication method 有权
标题翻译：数据通信系统，通信设备和通信方式
公开(公告)号：US08351356B2
公开(公告)日：2013-01-08
申请号：US12674045
申请日：2009-06-11
申请人： Shinichiro Nishioka , Hiroshi Suenaga , Tsutomu Sekibe , Isao Kato , Tadashi Ono , Hideyuki Yamada
发明人： Shinichiro Nishioka , Hiroshi Suenaga , Tsutomu Sekibe , Isao Kato , Tadashi Ono , Hideyuki Yamada
IPC分类号： H04L5/16 , H04L5/14 , G06F13/12
CPC分类号： H04L25/0272 , H04L5/14 , H04L5/1438 , H04L5/16
摘要： A data communication system for starting transmission and reception of target data for processing upon recognition that switching between communication modes is completed. The data communication system includes a master communication device and a slave communication device that continuously perform, at a time of switching from half-duplex communication to full-duplex communication, (i) a handshake using a directional control code indicating the switching and a preamble code indicating completion of the switching and (ii) a handshake using the preamble code and an acknowledge code indicating receipt of the preamble code, whereby each of the devices recognizes that the switching between communication modes by the opposite device is completed and starts transmission and reception of the target data.
摘要翻译：一种数据通信系统，用于在识别出完成通信模式之间的切换的情况下开始用于处理的目标数据的发送和接收。数据通信系统包括在从半双工通信切换到全双工通信时连续执行主通信设备和从通信设备，（i）使用指示切换的方向控制代码的握手和前导码指示切换完成的代码和（ii）使用前导码的握手和指示接收前导码的确认代码，由此每个设备识别出相对设备的通信模式之间的切换完成并开始发送和接收的目标数据。

3. 发明申请

US20110182216A1 INTERFACE DEVICE, COMMUNICATIONS SYSTEM, NON-VOLATILE STORAGE DEVICE, COMMUNICATION MODE SWITCHING METHOD AND INTEGRATED CIRCUIT 有权
标题翻译：接口设备，通信系统，非易失性存储设备，通信模式切换方法和集成电路
公开(公告)号：US20110182216A1
公开(公告)日：2011-07-28
申请号：US12995558
申请日：2009-05-29
申请人： Tadashi Ono , Isao Kato , Hideyuki Yamada , Shinichiro Nishioka , Hiroshi Suenaga , Tsutomu Sekibe
发明人： Tadashi Ono , Isao Kato , Hideyuki Yamada , Shinichiro Nishioka , Hiroshi Suenaga , Tsutomu Sekibe
IPC分类号： H04B1/44
CPC分类号： H04L5/16 , H04L5/18 , H04L25/14
摘要： An interrupt request cannot be transmitted while a data read command or a data write command transmitted from a host device to a slave device is being processed in a half-duplex mode. Disclosed are a host device and a slave device that are set to a full-duplex mode by temporarily switching the communication direction of a first transmission channel or a second transmission channel after completing transmission and reception of a predetermined number of data packets in the half-duplex mode. The host device or the slave device can thus transmit an interrupt request, such as a request associated with a wait status or a busy status, to its communication target using the temporary full-duplex mode. This enables the host device or the slave device to process such an interrupt request during high-speed data transfer performed in the half-duplex mode.
摘要翻译：当从主机设备发送到从设备的数据读取命令或数据写入命令正在以半双工模式进行处理时，不能发送中断请求。公开了一种主机设备和从设备，其通过在完成在半双工模式下的预定数量的数据分组的传输和接收之后临时切换第一传输信道或第二传输信道的通信方向而被设置为全双工模式，双工模式。因此主机设备或从设备可以使用临时全双工模式向其通信目标传送诸如与等待状态或忙状态相关联的请求的中断请求。这使得主机设备或从设备在半双工模式下执行的高速数据传输期间处理这样的中断请求。

4. 发明授权

US08520563B2 Interface device, communications system, non-volatile storage device, communication mode switching method and integrated circuit 有权
标题翻译：接口设备，通信系统，非易失性存储设备，通信模式切换方法和集成电路
公开(公告)号：US08520563B2
公开(公告)日：2013-08-27
申请号：US12995558
申请日：2009-05-29
申请人： Tadashi Ono , Isao Kato , Hideyuki Yamada , Shinichiro Nishioka , Hiroshi Suenaga , Tsutomu Sekibe
发明人： Tadashi Ono , Isao Kato , Hideyuki Yamada , Shinichiro Nishioka , Hiroshi Suenaga , Tsutomu Sekibe
IPC分类号： H04B1/44
CPC分类号： H04L5/16 , H04L5/18 , H04L25/14
摘要： A host device and a slave device are set to a full-duplex mode by temporarily switching the communication direction of a first transmission channel or a second transmission channel after completing transmission and reception of a predetermined number of data packets in the half-duplex mode. The host device or the slave device can thus transmit an interrupt request, such as a request associated with a wait status or a busy status, to its communication target using the temporary full-duplex mode. This enables the host device or the slave device to process such an interrupt request during high-speed data transfer performed in the half-duplex mode.
摘要翻译：在半双工模式下完成预定数量的数据分组的发送和接收之后，通过临时切换第一传输信道或第二传输信道的通信方向，将主机设备和从设备设置为全双工模式。因此主机设备或从设备可以使用临时全双工模式向其通信目标传送诸如与等待状态或忙状态相关联的请求的中断请求。这使得主机设备或从设备在半双工模式下执行的高速数据传输期间处理这样的中断请求。

5. 发明申请

US20100005226A1 NONVOLATILE MEMORY DEVICE, ACCESS DEVICE, AND NONVOLATILE MEMORY SYSTEM 有权
标题翻译：非易失性存储器件，访问器件和非易失性存储器系统
公开(公告)号：US20100005226A1
公开(公告)日：2010-01-07
申请号：US12374672
申请日：2007-07-26
申请人： Takuji Maeda , Toshiyuki Honda , Masahiro Nakanishi , Tadashi Ono , Tatsuya Adachi , Isao Kato
发明人： Takuji Maeda , Toshiyuki Honda , Masahiro Nakanishi , Tadashi Ono , Tatsuya Adachi , Isao Kato
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F3/0664 , G06F3/0605 , G06F3/061 , G06F3/0679 , G06F12/0246
摘要： An access device 100 includes an access speed information part 112 for informing an access speed required for data recording by the access device 100 to a nonvolatile memory device 200. The nonvolatile memory device includes an access condition determination part 212 for determining an access condition required for meeting the informed access speed and an access area determination unit 213 for determining an access area according to the determined access condition. The access device 100 informs the required access speed to the nonvolatile memory device 200 in advance so that the access condition determination part 212 and the access area determination part 213 in the nonvolatile memory device 200 realize data recording which meets the access speed informed in advance upon the data recording. Thus, it is possible to access all the nonvolatile memory devices at a desired speed regardless of difference in characteristics of the recording speed of each of the nonvolatile memory devices.
摘要翻译：访问装置100包括访问速度信息部分112，用于将访问装置100的数据记录所需的访问速度通知给非易失性存储装置200.非易失性存储装置包括访问条件确定部分212，用于确定访问条件满足通知访问速度的访问区域确定单元213，用于根据确定的访问条件确定访问区域。访问装置100预先向非易失性存储装置200通知所需的访问速度，使得非易失性存储装置200中的访问条件确定部212和访问区域确定部213实现满足预先通知的访问速度的数据记录数据记录。因此，无论每个非易失性存储器件的记录速度的特性差如何，都可以以所需的速度访问所有非易失性存储器件。

6. 发明授权

US08650430B2 Enabling a peripheral device to transmit a request for interrupt processing to a host when no clock signal is output from the host device 有权
标题翻译：当主机设备没有输出时钟信号时，允许外围设备向主机发送中断处理请求
公开(公告)号：US08650430B2
公开(公告)日：2014-02-11
申请号：US13180708
申请日：2011-07-12
申请人： Masahiro Nakamura , Tadashi Ono , Isao Kato
发明人： Masahiro Nakamura , Tadashi Ono , Isao Kato
IPC分类号： G06F1/00 , G06F13/24
CPC分类号： G06F13/24 , G06F1/3237 , G06F1/325 , Y02D10/128
摘要： In a communication system in which data is transmitted and received in synchronization with a clock signal, a peripheral device cannot transfer data to a host device when the host device stops outputting the clock signal and thus the peripheral device cannot promptly transmit an interrupt request to the host device. A peripheral device transmits an interrupt request to a host device using a signal line for a clock signal when the clock signal output has been stopped. The host device receives the interrupt request, and resumes outputting a clock signal to enable data transmission and reception to and from the peripheral device. This enables the peripheral device to transmit an interrupt request to the host device promptly when the output of the clock signal from the host device has been stopped.
摘要翻译：在与时钟信号同步地发送和接收数据的通信系统中，当主机设备停止输出时钟信号时，外围设备不能将数据传送到主机设备，因此外围设备不能及时将中断请求发送给主机设备。当时钟信号输出停止时，外围设备使用时钟信号的信号线向主机设备发送中断请求。主机设备接收中断请求，并恢复输出时钟信号，以实现与外围设备的数据传输和接收。这使得当来自主机设备的时钟信号的输出已停止时，外围设备能够迅速向主机发送中断请求。

7. 发明申请

US20100017560A1 MEMORY CONTROLLER, NONVOLATILE MEMORY DEVICE, ACCESS DEVICE, AND NONVOLATILE MEMORY SYSTEM 审中-公开
标题翻译：存储器控制器，非易失性存储器件，访问器件和非易失性存储器系统
公开(公告)号：US20100017560A1
公开(公告)日：2010-01-21
申请号：US12440988
申请日：2007-09-11
申请人： Tadashi Ono , Masahiro Nakanishi , Isao Kato
发明人： Tadashi Ono , Masahiro Nakanishi , Isao Kato
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F3/0653 , G06F3/0605 , G06F3/0632 , G06F3/0679 , G06F12/0246
摘要： It has been difficult for an access device to obtain a remaining capacity of a memory from a nonvolatile memory device having a plurality of interfaces. A capacity parameter generation part 127 and a capacitor parameter notification part 128 are provided in a memory controller 120. When data is written or deleted, the capacity parameter generation part 127 generates a capacity parameter based on a physical region management table 125. The capacity parameter notification part 128 sends the generated capacity parameter to an access device 200. The access device 200 obtains a remaining capacity of the nonvolatile memory device 100 from the received capacity parameter.
摘要翻译：访问设备难以从具有多个接口的非易失性存储设备获得存储器的剩余容量。容量参数生成部127和电容参数通知部128被提供在存储器控制器120中。当写入或删除数据时，容量参数生成部127基于物理区域管理表125生成容量参数。容量参数通知部分128将生成的容量参数发送到访问装置200.访问装置200从接收的容量参数获得非易失性存储装置100的剩余容量。

8. 发明授权

US08661186B2 Nonvolatile memory device, access device, and nonvolatile memory system 有权
标题翻译：非易失性存储器件，存取器件和非易失性存储器系统
公开(公告)号：US08661186B2
公开(公告)日：2014-02-25
申请号：US12374672
申请日：2007-07-26
申请人： Takuji Maeda , Toshiyuki Honda , Masahiro Nakanishi , Tadashi Ono , Tatsuya Adachi , Isao Kato
发明人： Takuji Maeda , Toshiyuki Honda , Masahiro Nakanishi , Tadashi Ono , Tatsuya Adachi , Isao Kato
IPC分类号： G11C16/10 , G06F12/02 , G06F3/06
CPC分类号： G06F3/0664 , G06F3/0605 , G06F3/061 , G06F3/0679 , G06F12/0246
摘要： An access device 100 includes an access speed information part 112 for informing an access speed required for data recording by the access device 100 to a nonvolatile memory device 200. The nonvolatile memory device includes an access condition determination part 212 for determining an access condition required for meeting the informed access speed and an access area determination unit 213 for determining an access area according to the determined access condition. The access device 100 informs the required access speed to the nonvolatile memory device 200 in advance so that the access condition determination part 212 and the access area determination part 213 in the nonvolatile memory device 200 realize data recording which meets the access speed informed in advance upon the data recording. Thus, it is possible to access all the nonvolatile memory devices at a desired speed regardless of difference in characteristics of the recording speed of each of the nonvolatile memory devices.
摘要翻译：访问装置100包括访问速度信息部分112，用于将访问装置100的数据记录所需的访问速度通知给非易失性存储装置200.非易失性存储装置包括访问条件确定部分212，用于确定访问条件满足通知访问速度的访问区域确定单元213，用于根据确定的访问条件确定访问区域。访问装置100预先向非易失性存储装置200通知所需的访问速度，使得非易失性存储装置200中的访问条件确定部212和访问区域确定部213实现满足预先通知的访问速度的数据记录数据记录。因此，无论每个非易失性存储器件的记录速度的特性差如何，都可以以所需的速度访问所有非易失性存储器件。

9. 发明授权

US09579804B2 Transfer robot 有权
标题翻译：传送机器人
公开(公告)号：US09579804B2
公开(公告)日：2017-02-28
申请号：US13822848
申请日：2011-11-30
申请人： Isao Kato , Shigeki Ono
发明人： Isao Kato , Shigeki Ono
IPC分类号： B25J18/04 , B25J9/04 , B65G49/06 , H01L21/677
CPC分类号： B25J18/04 , B25J9/042 , B25J9/044 , B65G49/067 , B65G2249/02 , H01L21/67742 , H01L21/67766
摘要： Described herein is a conveyance robot. In certain aspects, a conveyance robot can include a first link member configured to be rotatable about a first axis, a second link member configured to be rotatable about a second axis positioned at a predetermined distance relative to the first axis, a holding member configured to be capable of holding an article and rotating about a third axis positioned at a predetermined distance relative to the second axis, an ascending and descending drive unit for driving at least the holding member to ascend and descend. In certain aspects, an arm link mechanism can be included. The arm link mechanism can be constituted by connecting the first link member, the second link member, and the holding member in this order, and the ascending and descending drive unit is placed between the first link member and the holding member so as to form a part of the arm link mechanism.
摘要翻译：这里描述的是输送机器人。在某些方面，输送机器人可以包括构造成围绕第一轴可旋转的第一连杆构件，被构造成围绕相对于第一轴线以预定距离定位的第二轴可旋转的第二连杆构件，构造成能够保持物品并围绕位于相对于第二轴线预定距离的第三轴旋转;上升和下降的驱动单元，用于至少驱动保持构件上升和下降。在某些方面，可以包括臂连杆机构。臂连杆机构可以通过依次连接第一连杆构件，第二连杆构件和保持构件而构成，并且上升和下降驱动单元被放置在第一连杆构件和保持构件之间以形成臂连杆机构的一部分。

10. 发明授权

US07701053B2 Electronic component and method for producing the same 有权
标题翻译：电子元件及其制造方法
公开(公告)号：US07701053B2
公开(公告)日：2010-04-20
申请号：US11113090
申请日：2005-04-22
申请人： Yoshihiko Nishizawa , Norio Sakai , Isao Kato
发明人： Yoshihiko Nishizawa , Norio Sakai , Isao Kato
IPC分类号： H01L23/12
CPC分类号： H01L21/56 , H01L23/04 , H01L24/97 , H01L2924/14 , H05K3/284 , H05K2203/1311 , H01L2924/00
摘要： An electronic component has a portion adjacent to a surface of a base to which elements are mounted is immersed into a liquid resin or semi-solid resin such that an element surface of the base to which the elements are mounted is not immersed and in which the resin is then hardened. This causes a gap to be disposed between the hardened resin and the element surface of the base, such that a cover supported by some of the elements is formed.
摘要翻译：电子部件具有与安装有元件的基部的表面相邻的部分浸渍在液体树脂或半固体树脂中，使得安装元件的基部的元件表面不被浸没，其中然后将树脂硬化。这导致在硬化树脂和基体的元件表面之间设置间隙，从而形成由一些元件支撑的盖。

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