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1. 发明授权

US06462366B1 Ferroelectric nonvolatile transistor 失效
标题翻译：铁电非易失性晶体管
公开(公告)号：US06462366B1
公开(公告)日：2002-10-08
申请号：US09481674
申请日：2000-01-12
申请人： Sheng Teng Hsu , Jer-shen Maa , Fengyan Zhang , Tingkai Li
发明人： Sheng Teng Hsu , Jer-shen Maa , Fengyan Zhang , Tingkai Li
IPC分类号： H01L2976
CPC分类号： H01L29/6684 , H01L29/78391
摘要： A method of fabricating a ferroelectric memory transistor using a lithographic process having an alignment tolerance of &dgr;, includes preparing a silicon substrate for construction of a ferroelectric gate unit; implanting boron ions to form a p-well in the substrate; isolating plural device areas on the substrate; forming a FE gate stack surround structure; etching the FE gate stack surround structure to form an opening having a width of L1 to expose the substrate in a gate region; depositing oxide to a thickness of between about 10 nm to 40 nm over the exposed substrate; forming a FE gate stack over the gate region, wherein the FE gate stack has a width of L2, wherein L2≧L1+2&dgr;; depositing a first insulating layer over the structure; implanting arsenic or phosphorous ions to form a source region and a drain region; annealing the structure; depositing a second insulating layer; and metallizing the structure. A ferroelectric memory transistor includes a silicon substrate having a p-well formed therein; a gate region, a source region and a drain region disposed along the upper surface of said substrate; a FE gate stack surround structure having an opening having a width of L1 located about said gate region; a FE gate stack formed in said FE gate stack surround structure, wherein said FE gate stack has a width of L2, wherein L2≧L1+2&dgr;, wherein &dgr; is the alignment tolerance of the lithographic process.
摘要翻译：使用具有三角形对准公差的光刻工艺制造铁电存储晶体管的方法包括制备用于构造铁电栅极单元的硅衬底; 注入硼离子以在衬底中形成p阱; 隔离基板上的多个器件区域; 形成一个FE门堆栈环绕结构; 蚀刻FE栅堆叠环绕结构以形成宽度为L1的开口，以在栅极区域中露出基板; 在暴露的衬底上沉积氧化物至约10nm至40nm的厚度; 在所述栅极区域上形成FE栅极堆叠，其中所述FE栅极堆叠具有L2的宽度，其中L2> = L1 + 2delta; 在所述结构上沉积第一绝缘层; 注入砷或磷离子以形成源区和漏区; 退火结构; 沉积第二绝缘层; 并且对所述结构进行金属化。铁电存储晶体管包括其中形成有p阱的硅衬底; 栅极区域，源极区域和漏极区域，沿着所述衬底的上表面设置; 具有开口的FE栅叠层环绕结构，所述开口具有围绕所述栅区的L1的宽度; 形成在所述FE栅极堆叠环绕结构中的FE栅极堆叠，其中所述FE栅极堆叠具有L2的宽度，其中L2> = L1 + 2delta，其中Δ是光刻工艺的对准公差。

2. 发明授权

US06720258B2 Method of fabricating a nickel silicide on a substrate 有权
标题翻译：在衬底上制造硅化镍的方法
公开(公告)号：US06720258B2
公开(公告)日：2004-04-13
申请号：US10319313
申请日：2002-12-12
申请人： Jer-shen Maa , Douglas J. Tweet , Yoshi Ono , Fengyan Zhang , Sheng Teng Hsu
发明人： Jer-shen Maa , Douglas J. Tweet , Yoshi Ono , Fengyan Zhang , Sheng Teng Hsu
IPC分类号： H01L2144
CPC分类号： H01L21/28518 , H01L29/456
摘要： An integrated circuit device, and a method of manufacturing the same, comprises an epitaxial nickel silicide on (100) Si, or a stable nickel silicide on amorphous Si, fabricated with a cobalt interlayer. In one embodiment the method comprises depositing a cobalt (Co) interface layer between the Ni and Si layers prior to the silicidation reaction. The cobalt interlayer regulates the flux of the Ni atoms through the cobalt/nickel/silicon alloy layer formed from the reaction of the cobalt interlayer with the nickel and the silicon so that the Ni atoms reach the Si interface at a similar rate, i.e., without any orientation preference, so as to form a uniform layer of nickel silicide. The nickel silicide may be annealed to form a uniform crystalline nickel disilicide. Accordingly, a single crystal nickel silicide on (100) Si or on amorphous Si is achieved wherein the nickel silicide has improved stability and may be utilized in ultra-shallow junction devices.
摘要翻译：集成电路器件及其制造方法包括在（100）Si上的外延硅化镍，或者由钴中间层制造的在非晶Si上的稳定的硅化镍。在一个实施方案中，该方法包括在硅化反应之前在Ni和Si层之间沉积钴（Co）界面层。钴中间层通过由钴中间层与镍和硅的反应形成的钴/镍/硅合金层调节Ni原子的通量，使得Ni原子以相似的速率到达Si界面，即没有任何取向偏好，从而形成均匀的硅化镍层。可以将镍硅化物退火以形成均匀的结晶二硅化镍。因此，实现了（100）Si或非晶Si上的单晶硅化镍，其中硅化镍具有改进的稳定性并可用于超浅结结器件中。

3. 发明授权

US06682995B2 Iridium conductive electrode/barrier structure and method for same 失效
标题翻译：铱导电电极/屏障结构及方法相同
公开(公告)号：US06682995B2
公开(公告)日：2004-01-27
申请号：US10317742
申请日：2002-12-11
申请人： Fengyan Zhang , Jer-shen Maa , Sheng Teng Hsu
发明人： Fengyan Zhang , Jer-shen Maa , Sheng Teng Hsu
IPC分类号： H01L213205
CPC分类号： H01L29/456 , H01L21/28291 , H01L28/55 , H01L28/65
摘要： A conductive barrier, useful as a ferroelectric capacitor electrode, having high temperature stability has been provided. This conductive barrier permits the use of iridium (Ir) metal in IC processes involving annealing. Separating silicon substrate from Ir film with an intervening, adjacent, tantalum (Ta) film has been found to very effective in suppressing diffusion between layers. The Ir prevents the interdiffusion of oxygen into the silicon during annealing. A Ta or TaN layer prevents the diffusion of Ir into the silicon. This Ir/TaN structure protects the silicon interface so that adhesion, conductance, hillock, and peeling problems are minimized. The use of Ti overlying the Ir/TaN structure also helps prevent hillock formation during annealing. A method of forming a multilayer Ir conductive structure and Ir ferroelectric electrode are also provided.
摘要翻译：已经提供了具有高温稳定性的导电阻挡层，其可用作铁电电容器电极。该导电屏障允许在涉及退火的IC工艺中使用铱（Ir）金属。已经发现，分离硅衬底与Ir膜与中间相邻的钽（Ta）膜非常有效地抑制层之间的扩散。 Ir防止退火过程中氧进入硅的相互扩散。 Ta或TaN层防止Ir扩散到硅中。这种Ir / TaN结构保护了硅界面，从而使粘附，电导，小丘和剥离问题最小化。使用覆盖Ir / TaN结构的Ti也有助于防止退火过程中的小丘形成。还提供了形成多层Ir导电结构和Ir铁电电极的方法。

4. 发明授权

US06190963B1 Composite iridium-metal-oxygen barrier structure with refractory metal companion barrier and method for same 有权
$Composite iridium-metal-oxygen barrier structure with refractory metal companion barrier and method for same$
标题翻译：复合铱金属 - 氧阻隔结构与难熔金属伴侣屏障及其方法相同
公开(公告)号：US06190963B1
公开(公告)日：2001-02-20
申请号：US09316661
申请日：1999-05-21
申请人： Fengyan Zhang , Sheng Teng Hsu , Jer-shen Maa , Wei-Wei Zhuang
发明人： Fengyan Zhang , Sheng Teng Hsu , Jer-shen Maa , Wei-Wei Zhuang
IPC分类号： H01L218242
CPC分类号： H01L28/75 , H01L21/28568 , H01L28/55
摘要： An Ir—M—O composite film has been provided that is useful in forming an electrode of a ferroelectric capacitor, where M includes a variety of refractory metals. The Ir combination film is resistant to high temperature annealing in oxygen environments. When used with an underlying barrier layer made from the same variety of M transition metals, the resulting conductive barrier also suppresses to diffusion of Ir into any underlying Si substrates. As a result, Ir silicide products are not formed, which degrade the electrode interface characteristics. That is, the Ir combination film remains conductive, not peeling or forming hillocks, during high temperature annealing processes, even in oxygen. The Ir—M—O conductive electrode/barrier structures are useful in nonvolatile FeRAM devices, DRAMs, capacitors, pyroelectric infrared sensors, optical displays, optical switches, piezoelectric transducers, and surface acoustic wave devices. A method for forming an Ir—M—O composite film barrier layer and an Ir—M—O composite film ferroelectric electrode are also provided.
摘要翻译：已经提供了可用于形成铁电电容器的电极的Ir-M-O复合膜，其中M包括各种难熔金属。 Ir组合膜在氧气环境中耐高温退火。当与由相同种类的M过渡金属制成的底层阻挡层一起使用时，所得到的导电屏障还抑制Ir扩散到任何下面的Si衬底中。结果，不形成铱硅化物产物，这降低了电极界面的特性。也就是说，即使在氧气中，Ir组合膜在高温退火过程中仍保持导电性，不会剥离或形成小丘。 Ir-M-O导电电极/屏障结构可用于非易失性FeRAM器件，DRAM，电容器，热释电红外传感器，光学显示器，光开关，压电换能器和表面声波器件。还提供了形成Ir-M-O复合膜阻挡层和Ir-M-O复合膜铁电电极的方法。

5. 发明授权

US06537361B2 Method of the synthesis and control of PGO spin-coating precursor solutions 失效
公开(公告)号：US06537361B2
公开(公告)日：2003-03-25
申请号：US09822637
申请日：2001-03-30
申请人： Wei-Wei Zhuang , Fengyan Zhang , Jer-Shen Maa , Sheng Teng Hsu
发明人： Wei-Wei Zhuang , Fengyan Zhang , Jer-Shen Maa , Sheng Teng Hsu
IPC分类号： H01L2122
CPC分类号： H01L21/02197 , C01G21/00 , C01P2002/86 , H01L21/02112 , H01L21/02175 , H01L21/02282 , H01L21/31604 , H01L21/31691
摘要： A method of synthesizing a PGO spin-coating precursor solution includes utilizing the starting materials of lead acetate trihydrate (Pb(OAc)2•3H2O) and germanium alkoxide (Ge(OR)4(R=C2H5 and CH(CH3)2)). The organic solvent is di(ethylene glycol) ethyl ether. The mixed solution of lead and di(ethylene glycol) ethyl ether is heated in an atmosphere of air at a temperature no greater than 185° C., and preferably no greater than 190° C. for a time period in a range of thirty minutes to four hours. During the heating step the color of the solution is monitored to determine when the reaction is complete and when decomposition of the desired product begins to take place. The solution is then added to germanium di(ethylene glycol) ethyl ether to make the PGO spin-coating solution. This second step also entails heating the solution to a temperature no greater than 190° C. for a time period in a range of 0.5 to 2.0 hours. The process results in a PGO precursor solution suitable for use in spin-coating.

6. 发明授权

US06555456B2 Method of forming iridium conductive electrode/barrier structure 失效
公开(公告)号：US06555456B2
公开(公告)日：2003-04-29
申请号：US10037192
申请日：2001-11-09
申请人： Fengyan Zhang , Jer-shen Maa , Sheng Teng Hsu
发明人： Fengyan Zhang , Jer-shen Maa , Sheng Teng Hsu
IPC分类号： H01L213205
CPC分类号： H01L29/456 , H01L21/28291 , H01L28/55 , H01L28/65
摘要： A conductive barrier, useful as a ferroelectric capacitor electrode, having high temperature stability has been provided. This conductive barrier permits the use of iridium (Ir) metal in IC processes involving annealing. Separating silicon substrate from Ir film with an intervening, adjacent, tantalum (Ta) film has been found to very effective in suppressing diffusion between layers. The Ir prevents the interdiffusion of oxygen into the silicon during annealing. A Ta or TaN layer prevents the diffusion of Ir into the silicon. This Ir/TaN structure protects the silicon interface so that adhesion, conductance, hillock, and peeling problems are minimized. The use of Ti overlying the Ir/TaN structure also helps prevent hillock formation during annealing. A method of forming a multilayer Ir conductive structure and Ir ferroelectric electrode are also provided.

7. 发明授权

US06541385B2 Method for plasma etching of Ir-Ta-O electrode and for post-etch cleaning 失效
公开(公告)号：US06541385B2
公开(公告)日：2003-04-01
申请号：US09855393
申请日：2001-05-14
申请人： Hong Ying , Fengyan Zhang , Jer-Shen Maa , Sheng Teng Hsu
发明人： Hong Ying , Fengyan Zhang , Jer-Shen Maa , Sheng Teng Hsu
IPC分类号： H01L21302
CPC分类号： H01L21/02071 , C04B41/009 , C04B41/5346 , C04B41/91 , C04B2111/00844 , H01L21/32136 , H01L28/60 , C04B35/495
摘要： A method of forming an electrode in an integrated circuit includes preparing a silicon-base substrate, including forming semiconductor structures on the substrate to form an integrated substrate structure; depositing a layer of electrode material on a substrate structure; patterning the layer of electrode material to form electrode elements, wherein said patterning includes plasma etching the layer of electrode material in a plasma reactor in an etching gas atmosphere having a fluorine component therein; and cleaning the substrate structure and electrode elements in a distilled water bath.

8. 发明授权

US06441417B1 Single c-axis PGO thin film on ZrO2 for non-volatile memory applications and methods of making the same 失效
标题翻译：用于非易失性存储器应用的ZrO 2上的单个c轴PGO薄膜及其制造方法
公开(公告)号：US06441417B1
公开(公告)日：2002-08-27
申请号：US09820022
申请日：2001-03-28
申请人： Fengyan Zhang , Yanjun Ma , Jer-Shen Maa , Wei-Wei Zhuang , Sheng Teng Hsu
发明人： Fengyan Zhang , Yanjun Ma , Jer-Shen Maa , Wei-Wei Zhuang , Sheng Teng Hsu
IPC分类号： H01L2972
CPC分类号： H01L21/28291 , H01L21/31604 , H01L21/31691 , H01L28/56 , H01L29/516
摘要： A thin film structure includes a substantially single-phase, c-axis PGO film on an insulator for use in metal ferroelectric insulator semiconductor single transistor non-volatile memory applications. The PGO on insulator structure can also be used in capacitors, pyroelectric infrared sensors, optical displays, optical switches, piezoelectric transducers, and surface acoustic wave devices. In a preferred embodiment, the PGO film is deposited on a Zirconium Oxide insulator layer.
摘要翻译：薄膜结构包括用于金属铁电绝缘体半导体单晶体管非易失性存储器应用的绝缘体上的基本单相c轴PGO膜。 PGO绝缘体结构也可用于电容器，热释电红外传感器，光学显示器，光开关，压电换能器和表面声波器件中。在优选实施例中，PGO膜沉积在氧化锆绝缘体层上。

9. 发明授权

US06585821B1 Method of monitoring PGO spin-coating precursor solution synthesis using UV spectroscopy 失效
标题翻译：使用紫外光谱法监测PGO旋涂前体溶液合成的方法
公开(公告)号：US06585821B1
公开(公告)日：2003-07-01
申请号：US10345636
申请日：2003-01-15
申请人： Wei-Wei Zhuang , Fengyan Zhang , Jer-shen Maa , Sheng Teng Hsu
发明人： Wei-Wei Zhuang , Fengyan Zhang , Jer-shen Maa , Sheng Teng Hsu
IPC分类号： C23C1616
CPC分类号： H01L21/02197 , C01G21/00 , C01P2002/86 , H01L21/02112 , H01L21/02175 , H01L21/02282 , H01L21/31604 , H01L21/31691
摘要： A method of monitoring the synthesis of a PGO spin-coating precursor solution includes monitoring heating of the solution with a UV spectrometer and terminating the heating step when a solution property reaches a predetermined value. The method utilizes the starting materials of lead acetate trihydrate (Pb(OAc)2.3H2O) and germanium alkoxide (Ge(OR)4 (R=C2H5 and CH(CH3)2)). The organic solvent is di(ethylene glycol)ethyl ether. The mixed solution of lead and di(ethylene glycol)ethyl ether is heated in an atmosphere of air at a temperature no greater than 190° C., and preferably no greater than 185° C. for a time period in a range of approximately eighty-five minutes. During the heating step the solution properties are monitored to determine when the reaction is complete and when decomposition of the desired product begins to take place. The solution is then added to germanium di(ethylene glycol)ethyl ether to make the PGO spin-coating solution. This second step also entails heating the solution to a temperature no greater than 190° C. for a time period in a range of 0.5 to 2.0 hours. This heating step is also monitored with a UV spectrometer to determine when the heating step should be terminated. The process results in a PGO precursor solution suitable for use in spin-coating.
摘要翻译：监测PGO旋涂前体溶液合成的方法包括用UV光谱仪监测溶液的加热，并且当溶液性能达到预定值时终止加热步骤。该方法采用醋酸铅三水合物（Pb（OAc）2.3H2O）和烷氧基锗（Ge（OR）4（R = C2H5和CH（CH3）2））的原料。有机溶剂是二（乙二醇）乙醚。将铅和二（乙二醇）乙醚的混合溶液在不大于190℃，优选不大于185℃的空气气氛中加热约80℃的时间 -5分钟。在加热步骤期间，监测溶液性质以确定反应何时完成，并且当所需产物的分解开始发生时。然后将该溶液加入到二（乙二醇）二乙醚中以制备PGO旋涂溶液。该第二步骤还需要将溶液加热至不高于190℃的温度，持续0.5至2.0小时的时间。该加热步骤也用UV光谱仪监测，以确定加热步骤何时终止。该方法产生适合用于旋涂的PGO前体溶液。

10. 发明授权

US06479304B1 Iridium composite barrier structure and method for same 有权
标题翻译：铱复合阻挡结构及方法相同
公开(公告)号：US06479304B1
公开(公告)日：2002-11-12
申请号：US09717993
申请日：2000-11-21
申请人： Fengyan Zhang , Jer-shen Maa , Sheng Teng Hsu
发明人： Fengyan Zhang , Jer-shen Maa , Sheng Teng Hsu
IPC分类号： H01L2100
CPC分类号： H01L28/75 , H01L21/28291 , H01L28/55 , H01L29/516
摘要： An Ir combination film has been provided that is useful in forming an electrode of a ferroelectric capacitor. The combination film includes tantalum and oxygen, as well as iridium. The Ir combination film effectively prevents oxygen diffusion, and is resistant to high temperature annealing in oxygen environments. When used with an underlying Ta or TaN layer, the resulting conductive barrier also suppresses to diffusion of Ir into any underlying Si substrates. As a result, Ir silicide products are not formed, which degrade the electrode interface characteristics. That is, the Ir combination film remains conductive, not peeling or forming hillocks, during high temperature annealing processes, even in oxygen. A method for forming an Ir composite film barrier layer and Ir composite film ferroelectric electrode are also provided.
摘要翻译：已经提供了可用于形成铁电电容器的电极的Ir组合膜。组合膜包括钽和氧，以及铱。 Ir组合膜有效防止氧气扩散，并且在氧气环境中耐高温退火。当与下面的Ta或TaN层一起使用时，所得到的导电屏障还抑制Ir扩散到任何下面的Si衬底中。结果，不形成铱硅化物产物，这降低了电极界面的特性。也就是说，即使在氧气中，Ir组合膜在高温退火过程中仍保持导电性，不会剥离或形成小丘。还提供了形成Ir复合膜阻挡层和Ir复合膜铁电电极的方法。

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