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    • 4. 发明申请
    • Magnetic recording head with ESD shunt trace
    • 具有ESD分路迹线的磁记录头
    • US20070076328A1
    • 2007-04-05
    • US11240542
    • 2005-09-30
    • Wipul JayasekaraHoward Zolla
    • Wipul JayasekaraHoward Zolla
    • G11B5/127G11B5/33
    • G11B5/40G11B5/11G11B5/3133
    • Recording heads having an ESD shunt trace and methods of fabricating the same are disclosed. A recording head of the invention includes a first shield, a second shield, an MR read element between the first shield and the second shield, and an ESD shunt trace. The ESD shunt trace is formed from MR layers and is connected to the MR read element and one or both of the first shield and the second shield. One or more of the MR layers forming the ESD shunt trace are processed to reduce the MR properties of the ESD shunt trace. Examples of processing the ESD shunt trace are ion milling, ion implantation, oxidizing, reactive ion etching, sputter etching, wet chemical etching, etc.
    • 公开了具有ESD分流迹线的记录头及其制造方法。 本发明的记录头包括第一屏蔽,第二屏蔽,第一屏蔽和第二屏蔽之间的MR读取元件以及ESD分流迹线。 ESD分路迹线由MR层形成,并连接到MR读取元件以及第一屏蔽和第二屏蔽中的一个或两个。 处理形成ESD分流迹线的一个或多个MR层以降低ESD分流迹线的MR特性。 处理ESD分流迹线的示例是离子铣削,离子注入,氧化,反应离子蚀刻,溅射蚀刻,湿化学蚀刻等。
    • 5. 发明申请
    • Method for using CVD process to encapsulate coil in a magnetic write head
    • 使用CVD工艺将线圈封装在磁写头中的方法
    • US20060215313A1
    • 2006-09-28
    • US11090457
    • 2005-03-25
    • Richard HsiaoWipul JayasekaraHoward Zolla
    • Richard HsiaoWipul JayasekaraHoward Zolla
    • G11B5/127
    • G11B5/3133G11B5/17G11B5/3136G11B5/3163Y10T29/49041Y10T29/4906Y10T29/49064
    • Applicant discloses a method for fabricating a magnetic write head with a coil with a high aspect ratio using a Chemical Vapor Deposition process such as Atomic Layer Deposition (ALD), High Speed ALD, Plasma Enhanced ALD (PEALD), Plasma Enhanced Chemical Vapor Deposition (PECVD) or Low Pressure Chemical Vapor Deposition (LPCVD) to form encapsulating films over the coils without voids. Materials which can be used for encapsulation include Al2O3, SiO2, AlN, Ta2O5, HfO2, ZrO2, and YtO3. The use of an ultra-conformal deposition process allows the pitch of the coils to be smaller than it is possible in the prior art. The method according to the invention also allows materials with a smaller coefficient of thermal expansion than hardbake photoresist to be used with resulting improvements in thermal protrusion characteristics.
    • 申请人公开了使用诸如原子层沉积(ALD),高速ALD,等离子体增强型ALD(PEALD),等离子体增强化学气相沉积(Plasma Enhanced Chemical Vapor Deposition,等离子体增强化学气相沉积法)等化学气相沉积工艺制造具有高纵横比的线圈的磁写头的方法 PECVD)或低压化学气相沉积(LPCVD),在无空隙的线圈上形成封装膜。 可用于封装的材料包括Al 2 O 3,SiO 2,AlN,Ta 2 O, 5,HfO 2,ZrO 2和YtO 3。 使用超适形沉积工艺允许线圈的间距小于现有技术中可能的间距。 根据本发明的方法还允许使用具有比硬质光刻胶更小的热膨胀系数的材料,从而提高热突起特性。
    • 6. 发明申请
    • Method to reduce corner shunting during fabrication of CPP read heads
    • 在CPP读取头制造过程中减少拐角分流的方法
    • US20080020240A1
    • 2008-01-24
    • US11890868
    • 2007-08-07
    • Robert FontanaYing HongWipul JayasekaraHoward Zolla
    • Robert FontanaYing HongWipul JayasekaraHoward Zolla
    • G11B5/33B05D5/12C23F1/04
    • B82Y10/00B82Y25/00G11B5/3163G11B5/3932G11B2005/3996Y10T428/1171
    • A method is presented for fabricating a CPP read head having a CPP read head sensor and a hard bias layer which includes forming a strip of sensor material in a sensor material region, and depositing strips of fast-milling dielectric material in first and second fast-milling dielectric material regions adjacent to the sensor material region. A protective layer and a layer of masking material are deposited on the strip of sensor material and the strips of fast-milling dielectric material to provide masked areas and exposed areas. A shaping source, such as an ion milling source, is provided which shapes the exposed areas. Hard bias material is then deposited on the regions of sensor material and fast-milling dielectric material to form caps on each of these regions. The caps of hard bias material and the masking material are then removed from each of these regions.
    • 提出了一种用于制造具有CPP读取头传感器和硬偏置层的CPP读取头的方法,该CPP读取头包括在传感器材料区域中形成传感器材料条,以及将快速研磨电介质材料的条带放置在第一和第二快速接头中, 研磨与传感器材料区域相邻的介电材料区域。 保护层和掩蔽材料层沉积在传感器材料条和快速研磨电介质材料条上,以提供掩蔽区域和暴露区域。 提供成形源,例如离子铣削源,其形成暴露的区域。 然后将硬偏置材料沉积在传感器材料和快速研磨电介质材料的区域上,以在这些区域中的每一个上形成盖。 然后从这些区域中的每一个去除硬偏置材料的盖子和掩模材料。