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1. 发明授权

US06173490B1 Method for forming a panel of packaged integrated circuits 失效
标题翻译：用于形成封装集成电路板的方法
公开(公告)号：US06173490B1
公开(公告)日：2001-01-16
申请号：US08915352
申请日：1997-08-20
申请人： Shaw Wei Lee , Hem P. Takiar , Fred Drummond
发明人： Shaw Wei Lee , Hem P. Takiar , Fred Drummond
IPC分类号： H05K330
CPC分类号： H01L21/561 , B29C39/10 , B29C39/24 , H01L21/565 , H01L23/544 , H01L24/16 , H01L24/48 , H01L24/97 , H01L2223/54406 , H01L2223/54433 , H01L2223/54453 , H01L2223/54486 , H01L2224/16 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/97 , H01L2924/00014 , H01L2924/01033 , H01L2924/01082 , H01L2924/10253 , H01L2924/14 , H01L2924/1517 , H01L2924/181 , H01L2924/1815 , H01L2924/3511 , Y10T29/49146 , Y10T29/49158 , H01L2224/81 , H01L2224/85 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599 , H01L2224/85399
摘要： A method and an apparatus for forming a panel of packaged integrated circuits is disclosed. A substrate panel having an array of integrated circuits mounted thereon is placed in a mold having a molding chamber. The molding chamber has a multiplicity of adjacent package recesses flowably interconnected by way of a plurality of molding compound flowgates. Each package recess is suitable for receiving at least one associated integrated circuits. A molding compound is passed into the molding chamber by way of a mold gate such that at least some of the molding compound passes through a plurality of different package recesses by way of their associated flowgates. In one embodiment, the mold includes a mold body having a molding chamber with a plurality of ridges that define the multiplicity of package recesses within the molding chamber. The multiplicity of package recesses are flowably interconnected through flowgates formed by the ridges.
摘要翻译：公开了一种用于形成封装集成电路板的方法和装置。将具有安装在其上的集成电路阵列的基板面板放置在具有模制室的模具中。模制室具有多个相邻的包装凹部，其可通过多个模塑复合流动臂可流动地相互连接。每个封装凹槽适于接收至少一个相关联的集成电路。模塑料通过模具浇口进入模制室，使得至少一些模塑料通过其相关的流动浇口穿过多个不同的包装凹槽。在一个实施例中，模具包括具有模制室的模具主体，模制室具有限定模制室内的多个封装凹槽的多个脊。包装凹槽的多个可通过由脊形成的流动闸流动地相互连接。

2. 发明授权

US06362530B1 Manufacturing methods and construction for integrated circuit packages 失效
标题翻译：集成电路封装的制造方法和结构
公开(公告)号：US06362530B1
公开(公告)日：2002-03-26
申请号：US09056074
申请日：1998-04-06
申请人： Shaw Wei Lee , Hem P. Takiar
发明人： Shaw Wei Lee , Hem P. Takiar
IPC分类号： H01L2348
CPC分类号： H01L23/49816 , H01L23/057 , H01L23/3675 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2924/00014 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/16152 , H01L2924/16195 , H01L2924/16251 , H01L2924/3025 , H01L2924/00 , H01L2224/0401
摘要： A method of forming an integrated circuit package includes providing a flip chip integrating circuit die having a first plurality of contacts for electrically connecting the die to other elements. A second plurality of contacts for electrically connecting the integrated circuit package to external elements is also provided. A substrate for supporting the flip chip die and the second plurality of contacts is initially prepared. The substrate includes a connecting arrangement for electrically connecting the first plurality of contacts on the die to the second plurality of contacts. The method includes the step positioning the flip chip integrated circuit die and the second plurality of contacts on the substrate. With the flip chip die and the second plurality of contacts in position, both the first plurality of contacts on the flip chip die and the second plurality of contacts are simultaneously attached to the substrate thereby electrically connecting the die and the second plurality of contacts to the substrate. In one embodiment, a metal cap is attached to the integrated circuit package to cover and protect the die. In this embodiment, the metal cap may be used to provide a direct thermal path from the die to the external element to which the integrated circuit package is to the connected. An additional heat sink may also be attached to the package.
摘要翻译：形成集成电路封装的方法包括提供具有第一多个触点的倒装芯片集成电路管芯，用于将管芯电连接到其它元件。还提供了用于将集成电路封装电连接到外部元件的第二多个触点。最初准备了用于支撑倒装芯片模具和第二多个触点的基板。基板包括用于将模具上的第一多个触点电连接到第二多个触点的连接装置。该方法包括将倒装芯片集成电路管芯和第二多个触点定位在衬底上的步骤。通过倒装晶片管芯和第二组触头就位，倒装晶片管芯上的第一个多个触点和第二个多个触头都同时附着在基板上，从而将管芯和第二个多个触头电连接到基质。在一个实施例中，金属盖连接到集成电路封装以覆盖和保护管芯。在该实施例中，金属盖可用于提供从模具到集成电路封装件所连接的外部元件的直接热路径。附加的散热器也可以附接到包装上。

3. 发明授权

US6054338A Low cost ball grid array device and method of manufacture thereof 失效
标题翻译：低成本球栅阵列装置及其制造方法
公开(公告)号：US6054338A
公开(公告)日：2000-04-25
申请号：US26781
申请日：1998-02-20
申请人： Shaw Wei Lee , Hem P. Takiar , Ranjan J. Mathew , Hee Jhin Kim
发明人： Shaw Wei Lee , Hem P. Takiar , Ranjan J. Mathew , Hee Jhin Kim
IPC分类号： H01L21/48 , H01L21/60 , H01L21/673 , H01L21/68 , H01L23/13 , H01L23/498 , H01L21/44 , H01L21/50
CPC分类号： H01L23/49816 , H01L21/4853 , H01L21/6835 , H01L23/13 , H01L24/32 , H01L24/86 , H01L2221/68313 , H01L2224/48091 , H01L2224/48227 , H01L24/48 , H01L2924/00014 , H01L2924/01005 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01076 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/1532 , H01L2924/181
摘要： A panel of, for example, bismaleimide triazine (BT) or ceramic (Al.sub.2 O.sub.3) is chosen in size to be substantially filled with and taken up by end-result ball grid array (BGA) devices. The end-result devices are positioned closely together and take up substantially the entire area of the initial panel. Structural weakening is provided at appropriate places in the panel to allow the devices to be readily singulated.
摘要翻译：选择例如双马来酰亚胺三嗪（BT）或陶瓷（Al 2 O 3）的面板大体上被最终结果的球栅阵列（BGA）装置充满和吸收。最终结果设备紧密地放置在一起并占据初始面板的整个区域。在面板中的适当位置提供结构弱化，以允许装置容易地分割。

4. 发明授权

US5783866A Low cost ball grid array device and method of manufacture thereof 失效
公开(公告)号：US5783866A
公开(公告)日：1998-07-21
申请号：US649395
申请日：1996-05-17
申请人： Shaw Wei Lee , Hem P. Takiar , Ranjan J. Mathew , Hee Jhin Kim
发明人： Shaw Wei Lee , Hem P. Takiar , Ranjan J. Mathew , Hee Jhin Kim
IPC分类号： H01L21/48 , H01L21/60 , H01L21/673 , H01L21/68 , H01L23/13 , H01L23/498 , H01L23/48 , H01L23/04 , H01L23/52 , H01L29/40
CPC分类号： H01L23/49816 , H01L21/4853 , H01L21/6835 , H01L23/13 , H01L24/32 , H01L24/86 , H01L2221/68313 , H01L2224/48091 , H01L2224/48227 , H01L24/48 , H01L2924/00014 , H01L2924/01005 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01076 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/1532 , H01L2924/181
摘要： A panel of, for example, bismaleimide triazine (BT) or ceramic (Al.sub.2 O.sub.3) is chosen in size to be substantially filled with and taken up by end-result ball grid array (BGA) devices. The end-result devices are positioned closely together and take up substantially the entire area of the initial panel. Structural weakening is provided at appropriate places in the panel to allow the devices to be readily singulated.

5. 发明授权

US06284566B1 Chip scale package and method for manufacture thereof 有权
标题翻译：芯片级封装及其制造方法
公开(公告)号：US06284566B1
公开(公告)日：2001-09-04
申请号：US09387170
申请日：1999-08-31
申请人： Shaw Wei Lee , Hem P. Takiar , Ranjan J. Mathew
发明人： Shaw Wei Lee , Hem P. Takiar , Ranjan J. Mathew
IPC分类号： H01L2144
CPC分类号： H01L21/4853 , H01L21/6835 , H01L23/13 , H01L23/49816 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/86 , H01L2221/68313 , H01L2224/05553 , H01L2224/05554 , H01L2224/05599 , H01L2224/0603 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/85399 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01076 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/10161 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/1532 , H01L2924/181 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2924/00012 , H01L2224/45099
摘要： An assembly process provides a chip scale package (CSP) which characteristically includes (i) a perforated substrate in which vias can be embedded, (ii) a solder mask on which the integrated circuit die can be attached, and (iii) efficient use of the surface area for electrically routing signals from the integrated circuit die to the external terminals attached to the perforated substrate. The resulting package is highly compact and therefore has a foot print minimally larger than the surface area of the integrated circuit chip. Consequently, the costs of substrate and capsulation materials are minimized. The assembly process allows very high volume production because a large number of integrated circuits can be made on a single unit of the substrate, and singulation is performed in the assembly process at a stage much later than the corresponding stage in a conventional process.
摘要翻译：组装过程提供了一种芯片级封装（CSP），其特征在于包括（i）穿孔基板，其中可以嵌入通孔，（ii）可以连接集成电路管芯的焊接掩模，以及（iii）有效利用用于将来自集成电路管芯的信号电气路由到连接到穿孔基板的外部端子的表面积。所得到的封装非常紧凑，因此具有比集成电路芯片的表面积更小的脚印。因此，基板和封装材料的成本最小化。组装过程允许非常高的批量生产，因为可以在衬底的单个单元上制造大量的集成电路，并且在组装过程中在比常规工艺中的相应阶段晚得多的阶段执行单个化。

6. 发明授权

US6140708A Chip scale package and method for manufacture thereof 失效
标题翻译：芯片级封装及其制造方法
公开(公告)号：US6140708A
公开(公告)日：2000-10-31
申请号：US889834
申请日：1997-07-08
申请人： Shaw Wei Lee , Hem P. Takiar , Ranjan J. Mathew
发明人： Shaw Wei Lee , Hem P. Takiar , Ranjan J. Mathew
IPC分类号： H01L21/48 , H01L21/60 , H01L21/673 , H01L21/68 , H01L23/13 , H01L23/498 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/86 , H01L21/4853 , H01L21/6835 , H01L23/13 , H01L23/49816 , H01L24/32 , H01L2221/68313 , H01L2224/05553 , H01L2224/05554 , H01L2224/0603 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L24/48 , H01L24/49 , H01L2924/00014 , H01L2924/01005 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01076 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/1532 , H01L2924/15787 , H01L2924/181 , H01L2924/19042 , Y02P80/30
摘要： An assembly process provides a chip scale package (CSP) which characteristically includes (i) a perforated substrate in which vias can be embedded, (ii) a solder mask on which the integrated circuit die can be attached, and (iii) efficient use of the surface area for electrically routing signals from the integrated circuit die to the external terminals attached to the perforated substrate. The resulting package is highly compact and therefore has a foot print minimally larger than the surface area of the integrated circuit chip. Consequently, the costs of substrate and capsulation materials are minimized. The assembly process allows very high volume production because a large number of integrated circuits can be made on a single unit of the substrate, and singulation is performed in the assembly process at a stage much later than the corresponding stage in a conventional process.
摘要翻译：组装过程提供了一种芯片级封装（CSP），其特征在于包括（i）穿孔基板，其中可以嵌入通孔，（ii）可以连接集成电路管芯的焊接掩模，以及（iii）有效利用用于将来自集成电路管芯的信号电气路由到连接到穿孔基板的外部端子的表面积。所得到的封装非常紧凑，因此具有比集成电路芯片的表面积更小的脚印。因此，基板和封装材料的成本最小化。组装过程允许非常高的批量生产，因为可以在衬底的单个单元上制造大量集成电路，并且在组装过程中在比常规工艺中的相应阶段晚得多的阶段执行单个化。

7. 发明申请

US20090134228A1 MEMORY CARDS HAVING TWO STANDARD SETS OF CONTACTS AND A HINGED CONTACT COVERING MECHANISM 有权
标题翻译：具有两个标准联系人和铰链接触覆盖机构的记忆卡
公开(公告)号：US20090134228A1
公开(公告)日：2009-05-28
申请号：US12361165
申请日：2009-01-28
申请人： Robert C. Miller , Hem P. Takiar , Joel Jacobs , Robert Howard , Motohide Hatanaka , Robert F. Wallace , Edwin J. Cuellar , Eliyahou Harari
发明人： Robert C. Miller , Hem P. Takiar , Joel Jacobs , Robert Howard , Motohide Hatanaka , Robert F. Wallace , Edwin J. Cuellar , Eliyahou Harari
IPC分类号： G06K19/067 , G06F3/00
CPC分类号： G06K19/077 , G06K19/07732 , G06K19/07733 , G06K19/07741 , G06K19/07743 , H01R13/447 , H01R27/00
摘要： Enclosed re-programmable non-volatile memory cards include at least two sets of electrical contacts to which the internal memory is connected. The two sets of contacts have different patterns, preferably in accordance with two different contact standards such as a memory card standard and that of the Universal Serial Bus (USB). One memory card standard that can be followed is that of the Secure Digital (SD) card. The cards can thus be used with different hosts that are compatible with one set of contacts but not the other. A cover that is hinged to the card to normally cover one set of contacts can be manually rotated out of the way when that set of contacts is being used.
摘要翻译：封闭的可重新编程的非易失性存储卡包括至少两组电触点，内部存储器与之连接。两组触点具有不同的图案，优选地根据两种不同的接触标准，例如存储卡标准和通用串行总线（USB）的标准。可以遵循的一种存储卡标准是安全数字（SD）卡的标准。因此，这些卡可以与与一组联系而不是另一组相容的不同主机使用。当使用该组触点时，铰接到卡上的盖通常覆盖一组触点可以手动旋转。

8. 发明授权

US07416132B2 Memory card with and without enclosure 有权
标题翻译：带和不带外壳的存储卡
公开(公告)号：US07416132B2
公开(公告)日：2008-08-26
申请号：US10851466
申请日：2004-05-20
申请人： Hem P. Takiar , Robert Miller
发明人： Hem P. Takiar , Robert Miller
IPC分类号： G06K19/06
CPC分类号： G06K19/07732 , G06K13/0825 , G06K19/077 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2924/01004 , H01L2924/1815 , H01L2924/19041 , H05K1/02 , H05K1/0268 , H05K1/117 , H05K3/284 , H05K2201/09045 , H05K2201/09154 , H05K2203/0271 , Y10T29/4913 , H01L2924/00014
摘要： The present invention, roughly described, pertains to a small memory card that includes features which allow the memory card to be more easily handled by a user. In various embodiments, the memory card can include a chamfer and/or a raised portion that allows the memory card to be more easily grabbed by a human hand (or mechanical device) and also provides additional room to store passive devices such as capacitors and/or resistors. Because different electronic devices use different types of memory cards, an adaptor is provided that allows the memory cards disclosed herein to be used in ports or connectors on electronic devices that are meant for other types of memory cards.
摘要翻译：大致描述的本发明涉及一种小型存储卡，其包括允许存储卡更容易由用户处理的特征。在各种实施例中，存储卡可以包括倒角和/或凸起部分，其允许存储卡被人的手（或机械装置）更容易地抓住，并且还提供额外的空间以存储诸如电容器和/ 或电阻。因为不同的电子设备使用不同类型的存储卡，所以提供了一种适配器，其允许本文所公开的存储卡被用在用于其他类型的存储卡的电子设备上的端口或连接器中。

9. 发明授权

US07340540B2 Memory card with contacts, device connector, and a connector covering mechanism 有权
标题翻译：带触点，设备连接器和连接器覆盖机构的存储卡
公开(公告)号：US07340540B2
公开(公告)日：2008-03-04
申请号：US11419172
申请日：2006-05-18
申请人： Robert C. Miller , Hem P. Takiar , Joel Jacobs , Robert Howard , Motohide Hatanaka , Robert F. Wallace , Edwin J. Cuellar , Eliyahou Harari , Matt Peterson
发明人： Robert C. Miller , Hem P. Takiar , Joel Jacobs , Robert Howard , Motohide Hatanaka , Robert F. Wallace , Edwin J. Cuellar , Eliyahou Harari , Matt Peterson
IPC分类号： G06F3/00
CPC分类号： G06K19/077 , G06K19/07732 , G06K19/07733 , G06K19/07741 , G06K19/07743 , H01R13/447 , H01R27/00
摘要： Enclosed re-programmable non-volatile memory cards include at least two sets of electrical contacts to which the internal memory is connected. The two sets of contacts have different patterns, preferably in accordance with two different contact standards such as a memory card standard and that of the Universal Serial Bus (USB). One memory card standard that can be followed is that of the Secure Digital (SD) card. The cards can thus be used with different hosts that are compatible with one set of contacts but not the other. A cover that is hinged to the card to normally cover one set of contacts can be rotated out of the way by hand when that set of contacts is being used.
摘要翻译：封闭的可重新编程的非易失性存储卡包括至少两组电触点，内部存储器与之连接。两组触点具有不同的图案，优选地根据两种不同的接触标准，例如存储卡标准和通用串行总线（USB）的标准。可以遵循的一种存储卡标准是安全数字（SD）卡的标准。因此，这些卡可以与与一组联系而不是另一组相容的不同主机使用。当使用该组触点时，铰接到卡上的盖通常覆盖一组触点可以手动旋转。

10. 发明授权

US07094633B2 Method for efficiently producing removable peripheral cards 有权
公开(公告)号：US07094633B2
公开(公告)日：2006-08-22
申请号：US10602373
申请日：2003-06-23
申请人： Hem P. Takiar
发明人： Hem P. Takiar
IPC分类号： H01L21/48
CPC分类号： H01L21/6835 , G06K19/077 , G06K19/07718 , G06K19/07732 , H01L21/561 , H01L21/565 , H01L23/3107 , H01L23/544 , H01L24/48 , H01L24/73 , H01L24/97 , H01L2221/68331 , H01L2223/54473 , H01L2223/54486 , H01L2224/05599 , H01L2224/32145 , H01L2224/32225 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/85399 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/0102 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/12042 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2224/85 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： Improved techniques to produce integrated circuit products are disclosed. The improved techniques permit smaller and less costly production of integrated circuit products. One aspect of the invention is that the integrated circuit products are produced a batch at a time, and that singulation of the batch into individualized integrated circuit products uses a non-linear (e.g., non-rectangular or curvilinear) sawing or cutting action so that the resulting individualized integrated circuit packages no longer need to be completely rectangular. Another aspect of the invention is that the integrated circuit products can be produced with semiconductor assembly processing such that the need to provide an external package or container becomes optional.

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