会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 8. 发明授权
    • Interface circuitry for a test apparatus
    • 用于测试设备的接口电路
    • US08872546B2
    • 2014-10-28
    • US13613810
    • 2012-09-13
    • Peng ZouFenardi ThenusDavid J. Harriman
    • Peng ZouFenardi ThenusDavid J. Harriman
    • H03K19/0175
    • G01R31/31924
    • In one embodiment, a test apparatus includes a field programmable gate array (FPGA) including a first transmitter to communicate first signals according to current mode logic (CML) signaling and a first receiver to receive second signals according to the CML signaling, and an interface circuit to couple the FPGA to a device that is to communicate according to voltage mode signaling. The interface circuit may adapt the first signals communicated by the first transmitter according to the CML signaling to voltage mode signaling signals for receipt by the device. Other embodiments are described and claimed.
    • 在一个实施例中,测试装置包括现场可编程门阵列(FPGA),其包括根据当前模式逻辑(CML)信令来传送第一信号的第一发射机和根据CML信令接收第二信号的第一接收机,以及接口 电路将FPGA耦合到根据电压模式信号进行通信的设备。 接口电路可以将根据CML信令的由第一发射机传送的第一信号适配成电压模式信令信号,以供设备接收。 描述和要求保护其他实施例。