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1. 发明申请

US20070143520A1 Bridge, computer system and method for initialization 审中-公开
标题翻译：桥梁，计算机系统和初始化方法
公开(公告)号：US20070143520A1
公开(公告)日：2007-06-21
申请号：US11378386
申请日：2006-03-20
申请人： Shan-Kai Yang , Lei Ding , Li-Jian Zhao
发明人： Shan-Kai Yang , Lei Ding , Li-Jian Zhao
IPC分类号： G06F13/36
CPC分类号： G06F13/4068 , G06F13/4027
摘要： An indicator pin of an input/output controller is used to identifying whether a processor or a bridge is configured in a processor. When a predetermined voltage level of the indicator pin is confirmed, a base input/output system of the computer system renews a coherent/non-coherent HyperTransport link table. Then an initialization procedure is performed in accordance with the renewed coherent/non-coherent HyperTransport link table.
摘要翻译：输入/输出控制器的指示针用于识别处理器中是否配置了处理器或桥。当确认指示针的预定电压电平时，计算机系统的基本输入/输出系统更新一个相干/非相干的超传输链路表。然后根据更新的相干/非一致性超传输链路表执行初始化过程。

2. 发明申请

US20070106831A1 Computer system and bridge module thereof 审中-公开
标题翻译：计算机系统及其桥接模块
公开(公告)号：US20070106831A1
公开(公告)日：2007-05-10
申请号：US11378389
申请日：2006-03-20
申请人： Shan-Kai Yang , Lei Ding
发明人： Shan-Kai Yang , Lei Ding
IPC分类号： G06F13/36
CPC分类号： H05K3/222 , H05K1/141 , H05K2201/10325 , H05K2201/10704 , H05K2201/10719
摘要： A computer system includes a bridge module plugged in a processor socket of a motherboard with multiple processors. The bridge module electrically connects two buses which have the same transmission protocol and connect to the socket. Thus, two processors or a processor and a chip set would communicate each other by the bridge module and the two buses without installing any processors or additional buses.
摘要翻译：计算机系统包括插入具有多个处理器的主板的处理器插座中的桥模块。桥模块电连接两个具有相同传输协议并连接到插座的总线。因此，两个处理器或处理器和芯片组将通过桥模块和两个总线彼此通信，而不安装任何处理器或附加总线。

3. 发明申请

US20070079041A1 Multiprocessor system 审中-公开
标题翻译：多处理器系统
公开(公告)号：US20070079041A1
公开(公告)日：2007-04-05
申请号：US11346247
申请日：2006-02-03
申请人： Shan-Kai Yang , Shi-Jun Ni , Jian Shen , Lei Ding , Hai-Ming Ding
发明人： Shan-Kai Yang , Shi-Jun Ni , Jian Shen , Lei Ding , Hai-Ming Ding
IPC分类号： H05K7/10 , G06F13/00
CPC分类号： H05K7/1431 , G06F1/185 , H05K1/141 , H05K1/145 , H05K3/366 , H05K3/368 , H05K2201/10189
摘要： A multiprocessor system according to this invention comprises a main board, an expansion board, and at least a connection card. The main board comprises a plurality of first processors, such as four (4) CPUs, and at least a first socket. The expansion board comprises a plurality of second processors, such as four (4) CPUs, and at least a second socket. The plurality of first processors selectively communicates with each other by way of a plurality of first processor buses, which may be dual unidirectional point-to-point buses such as HT buses. The plurality of second processors selectively communicates with each other by way of a plurality of second processor buses, which may be dual unidirectional point-to-point buses such as HT bus. The connection card(s) electronically connect(s) to the first socket(s) and the second socket(s) for providing connection between at least one of the first processor of the main board and at least one of the second processor of the expansion board.
摘要翻译：根据本发明的多处理器系统包括主板，扩展板和至少一个连接卡。主板包括多个第一处理器，例如四（4）个CPU以及至少一个第一插座。扩展板包括多个第二处理器，例如四（4）个CPU，以及至少第二插座。多个第一处理器通过多个第一处理器总线选择性地彼此通信，其可以是诸如HT总线的双重单向点对点总线。多个第二处理器通过多个第二处理器总线选择性地进行通信，第二处理器总线可以是诸如HT总线的双重单向点到点总线。连接卡电连接到第一插座和第二插座，用于提供主板的第一处理器和至少一个第一处理器之间的连接，扩展板

4. 发明申请

US20070079046A1 Multiprocessor system 审中-公开
标题翻译：多处理器系统
公开(公告)号：US20070079046A1
公开(公告)日：2007-04-05
申请号：US11346312
申请日：2006-02-03
申请人： Shan-Kai Yang , Shi-Jun Ni , Jian Shen , Lei Ding , Hai-Ming Ding , Fang Yuan
发明人： Shan-Kai Yang , Shi-Jun Ni , Jian Shen , Lei Ding , Hai-Ming Ding , Fang Yuan
IPC分类号： G06F13/00
CPC分类号： G06F15/17337
摘要： A multiprocessor system is disclosed, which comprises a plurality of processor unit, such as eight processor units, and a plurality of interconnection bus that may be a dual unidirectional point-to-point bus. Every interconnection bus connects predetermined two of the processor units. Particularly, at least two of the interconnection buses are crossed to each other.
摘要翻译：公开了一种多处理器系统，其包括多个处理器单元，例如八个处理器单元，以及可以是双向单向点对点总线的多个互连总线。每个互连总线连接预定的两个处理器单元。特别地，至少两个互连总线彼此交叉。

5. 发明公开

US20230394240A1 METHOD AND APPARATUS FOR NAMED ENTITY RECOGNITION, AND NON-TRANSITORY COMPUTER-READABLE RECORDING MEDIUM 审中-公开
公开(公告)号：US20230394240A1
公开(公告)日：2023-12-07
申请号：US18326292
申请日：2023-05-31
申请人： Yongwei ZHANG , Bin Dong , Shanshan Jiang , Lei Ding , Jiashi Zhang
发明人： Yongwei ZHANG , Bin Dong , Shanshan Jiang , Lei Ding , Jiashi Zhang
IPC分类号： G06F40/295 , G06F40/40
CPC分类号： G06F40/295 , G06F40/40
摘要： A method and an apparatus for named entity recognition, and a non-transitory computer-readable recording medium are provided. In the method, text elements are traversed according to a text span to obtain candidate entity words. Then, a class to which the candidate entity word belongs is recognized. The recognizing of the class includes generating a prompt template corresponding to the candidate entity word, and concatenating the text to be recognized and the prompt template to obtain a concatenated text; generating vector representations of the text elements in the concatenated text; generating the vector representation of the candidate entity word according to the vector representations of the text elements of each candidate entity word in the concatenated text, and the vector representation of the text element of the mask word; and classifying the vector representation of the candidate entity word to obtain the class of the candidate entity word.

6. 发明授权

US11507854B2 Method and apparatus for recognizing intention, and non-transitory computer-readable recording medium 有权
公开(公告)号：US11507854B2
公开(公告)日：2022-11-22
申请号：US16739311
申请日：2020-01-10
申请人： Liang Liang , Lei Ding , Bin Dong , Shanshan Jiang , Yixuan Tong
发明人： Liang Liang , Lei Ding , Bin Dong , Shanshan Jiang , Yixuan Tong
IPC分类号： G06N5/02 , G06K9/62 , G06F16/9032 , G06N20/10
摘要： A method and an apparatus for recognizing an intention, and a non-transitory computer-readable recording medium are provided. The method includes learning vectors of knowledge base elements in corpus samples, and converting the corpus samples into row vectors composed of the vectors of the knowledge base elements in a knowledge base; extracting feature vectors from respective pooling windows in the corpus samples by hierarchical pooling, determining weights positively correlated with similarities between texts within the respective pooling windows and the respective corpus samples, performing weighting on the extracted feature vectors to obtain feature vectors of the respective pooling windows, and obtaining feature vectors of the respective corpus samples composed of the feature vectors of the pooling windows; training a vector-based intention recognition classifier, based on the feature vectors of the corpus samples; and recognizing an intention in querying a corpus, using the trained intention recognition classifier.

7. 发明授权

US08469729B2 Rotary wireless network card with double rotating shafts 有权
标题翻译：带旋转轴的旋转无线网卡
公开(公告)号：US08469729B2
公开(公告)日：2013-06-25
申请号：US13257861
申请日：2009-12-14
申请人： Lei Ding
发明人： Lei Ding
IPC分类号： H01R13/44
CPC分类号： H01R35/02 , H01R13/72
摘要： The present disclosure provides a rotary wireless network card with double rotating shafts, which comprises a wireless network card body, an ultra-thin USB interface and a first rotating shaft, wherein at the top of the wireless network card body a opening is provided to accommodate the ultra-thin USB interface as withdrawn; the ultra-thin USB interface extends out of or returns back to the opening by rotating around the first rotating shaft; inside the wireless network card body a rotating shaft support is provided; a second rotating shaft in the opening is rotatably connected to the rotating shaft support; the second rotating shaft is accommodated outside the ultra-thin USB interface and connected to the ultra-thin USB interface; and when the second rotating shaft rotates in the opening, the ultra-thin USB interface and the first rotating shaft rotate in the opening along with the second rotating shaft. By designing a rotary head, the present disclosure frees a USB from the external connection with a cap or other objects that are easily lost or broken, and as the rotary shaft of the ultra-thin USB interface is smaller than common rotary shafts, the whole wireless network card is much shorter and narrower, causing no interference on the use of a neighboring interface.
摘要翻译：本公开提供一种具有双旋转轴的旋转无线网卡，其包括无线网卡主体，超薄USB接口和第一旋转轴，其中在无线网卡主体的顶部提供开口以容纳超薄USB接口退出; 超薄USB接口通过围绕第一旋转轴旋转而延伸出或返回到开口; 在无线网卡内部提供旋转轴支撑; 开口中的第二旋转轴可旋转地连接到旋转轴支撑件; 第二旋转轴容纳在超薄USB接口外部，并连接到超薄USB接口; 并且当第二旋转轴在开口中旋转时，超薄USB接口和第一旋转轴与第二旋转轴一起在开口中旋转。通过设计旋转磁头，本公开通过一个容易丢失或断开的盖或其它物体从外部连接中释放USB，并且当超薄USB接口的旋转轴小于普通旋转轴时，整个无线网卡的时间要短得多，不会对相邻接口的使用造成干扰。

8. 发明申请

US20120286868A1 CLASS D POWER AMPLIFIER 有权
标题翻译： CLASS D功率放大器
公开(公告)号：US20120286868A1
公开(公告)日：2012-11-15
申请号：US13106611
申请日：2011-05-12
申请人： Baher Haroun , Joonhoi Hur , Lei Ding , Rahmi Hezar
发明人： Baher Haroun , Joonhoi Hur , Lei Ding , Rahmi Hezar
IPC分类号： H03F3/217
CPC分类号： H03F3/2173 , H03F1/26 , H03F2200/267 , H03F2200/297
摘要： A class D power amplifier (PA) is provided. The PA generally comprises a driver, output capacitor, a matching network, and a cancellation circuit. The driver has an input, an output, and a parasitic capacitance, and the input of the driver is configured to receive complementary first and second radio frequency (RF) signals, where there is a free-fly interval between consecutive pulses from the first and second RF signals. The output capacitor and cancellation circuit are each coupled to the output of the driver such that the cancellation circuit provides harmonic restoration at least during the free-fly interval, and the matching network is coupled to the output capacitor.
摘要翻译：提供D类功率放大器（PA）。 PA通常包括驱动器，输出电容器，匹配网络和消除电路。驱动器具有输入，输出和寄生电容，并且驱动器的输入被配置为接收互补的第一和第二射频（RF）信号，其中在来自第一和第二射频的连续脉冲之间存在自由间隔第二RF信号。输出电容器和消除电路各自耦合到驱动器的输出，使得消除电路至少在空闲间隔期间提供谐波恢复，并且匹配网络耦合到输出电容器。

9. 发明授权

US08084621B2 3-Pyrrolo[b]cyclohexylene-2-dihydroindolinone derivatives and uses thereof 有权
标题翻译： 3-吡咯并[b]环己基-2-二氢吲哚啉酮衍生物及其用途
公开(公告)号：US08084621B2
公开(公告)日：2011-12-27
申请号：US12517351
申请日：2007-12-03
申请人： Feng Tang , Han Shen , Qiu Jin , Lei Ding , Jie Yang , Xiaojin Yin , Shiyue Lu
发明人： Feng Tang , Han Shen , Qiu Jin , Lei Ding , Jie Yang , Xiaojin Yin , Shiyue Lu
IPC分类号： C07D209/02 , A61K31/40
CPC分类号： C07D209/42 , C07D401/14 , C07D403/14
摘要： 3-pyrrolo[b]cyclohexylene-2-dihydro-indolinone derivatives of formula (I) or their pharmaceutically acceptable salts and uses thereof. The intermediates of formula (II) for preparing the above compounds. The bioassay shows that the above compounds and their pharmaceutically acceptable salts can modulate the activity of protein kinases (PKs), inhibit the activity of tyrosine kinases (PTKs) and inhibit many kinds of tumor cells as well as.
摘要翻译：式（I）的3-吡咯并[b]亚环己基-2-二氢 - 二氢吲哚酮衍生物或其药学上可接受的盐和用途。用于制备上述化合物的式（II）的中间体。生物测定显示，上述化合物及其药学上可接受的盐可调节蛋白激酶（PK）的活性，抑制酪氨酸激酶（PTK）的活性并抑制多种肿瘤细胞。

10. 发明申请

US20090322300A1 HYSTERETIC BUCK CONVERTER HAVING DYNAMIC THRESHOLDS 有权
标题翻译：具有动态阈值的HYSTERETIC BUCK转换器
公开(公告)号：US20090322300A1
公开(公告)日：2009-12-31
申请号：US12145807
申请日：2008-06-25
申请人： John L. Melanson , Lei Ding
发明人： John L. Melanson , Lei Ding
IPC分类号： G05F1/10
CPC分类号： H02M3/1563 , H02M2001/0019 , H02M2001/0032 , Y02B70/16
摘要： A hysteretic buck converter provides improved regulation control, in particular for buck converter standby operation. A comparison circuit compares the output voltage of the buck converter to a waveform that is generated from an indication of the output current of the converter, so that the turn-on time of the converter is advanced as the output current demand increases. The resulting action anticipates a reduction in output voltage due to the increased current, preventing an excursion of the output voltage below the ripple voltage minimum. The turn-off time of the converter is controlled by an upper threshold that limits the ripple voltage maximum. The output current indication may be a measurement of output current, or may be a dynamic value calculated from the input voltage and the output voltage waveform.
摘要翻译：迟滞降压转换器提供改进的调节控制，特别是对于降压转换器待机操作。比较电路将降压转换器的输出电压与从转换器的输出电流的指示产生的波形进行比较，使得转换器的导通时间随着输出电流需求的增加而提前。所产生的动作预期由于增加的电流而导致的输出电压降低，防止输出电压偏离低于纹波电压的最小值。转换器的关断时间由限制纹波电压最大值的上限阈值控制。输出电流指示可以是输出电流的测量值，或者可以是从输入电压和输出电压波形计算出的动态值。

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