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1. 发明授权

US08495476B2 System and method for coding and interleaving for short frame support in visible light communication 有权
标题翻译：用于可见光通信中的短帧支持的编码和交织的系统和方法
公开(公告)号：US08495476B2
公开(公告)日：2013-07-23
申请号：US12962324
申请日：2010-12-07
申请人： Shadi Abu-Surra , Sridhar Rajagopal , Eran Pisek
发明人： Shadi Abu-Surra , Sridhar Rajagopal , Eran Pisek
IPC分类号： G06F11/00
CPC分类号： H03M13/2936 , H03M5/145 , H03M13/1515 , H03M13/2707 , H03M13/6356 , H03M13/6362 , H04B10/116 , H04L1/0042 , H04L1/0047 , H04L1/0057 , H04L1/0059 , H04L1/0065 , H04L1/0068 , H04L1/0071
摘要： A transmitter is capable of performing both Galois Field (GF) (16) and GF (256) encoding in a visual light communication system. The transmitter includes a GF (256) encoder. The transmitter also includes a first bit mapper configured to map a first number of bits to a second number of bits. The Galois Field (256) encoder is configured to receive and encode the second number of bits. The transmitter also includes a second bit mapper configured to map the second number of bits to the first number of bits. The transmitter also includes an interleaver unit that can pad bits based on a frame size and puncture the bits after interleaving and prior to transmission.
摘要翻译：发射机能够在视觉光通信系统中执行Galois Field（GF）（16）和GF（256）编码。发射机包括一个GF（256）编码器。发射机还包括配置成将第一比特数映射到第二比特数的第一比特映射器。伽罗瓦域（256）编码器被配置为接收和编码第二位数。发射机还包括配置成将第二位数映射到第一位数的第二位映射器。发射机还包括交织器单元，其可以基于帧大小来填充比特，并且在交织之后和发送之前对比特进行穿孔。

2. 发明申请

US20110154155A1 SYSTEM AND METHOD FOR CODING AND INTERLEAVING FOR SHORT FRAME SUPPORT IN VISIBLE LIGHT COMMUNICATION 有权
标题翻译：用于在可见光通信中进行短帧支持的编码和交互的系统和方法
公开(公告)号：US20110154155A1
公开(公告)日：2011-06-23
申请号：US12962324
申请日：2010-12-07
申请人： Shadi Abu-Surra , Sridhar Rajagopal , Eran Pisek
发明人： Shadi Abu-Surra , Sridhar Rajagopal , Eran Pisek
IPC分类号： H03M13/29 , H03M13/07 , G06F11/10
CPC分类号： H03M13/2936 , H03M5/145 , H03M13/1515 , H03M13/2707 , H03M13/6356 , H03M13/6362 , H04B10/116 , H04L1/0042 , H04L1/0047 , H04L1/0057 , H04L1/0059 , H04L1/0065 , H04L1/0068 , H04L1/0071
摘要： A transmitter is capable of performing both Galois Field (GF) (16) and GF (256) encoding in a visual light communication system. The transmitter includes a GF (256) encoder. The transmitter also includes a first bit mapper configured to map a first number of bits to a second number of bits. The Galois Field (256) encoder is configured to receive and encode the second number of bits. The transmitter also includes a second bit mapper configured to map the second number of bits to the first number of bits. The transmitter also includes an interleaver unit that can pad bits based on a frame size and puncture the bits after interleaving and prior to transmission.
摘要翻译：发射机能够在视觉光通信系统中执行Galois Field（GF）（16）和GF（256）编码。发射机包括一个GF（256）编码器。发射机还包括配置成将第一比特数映射到第二比特数的第一比特映射器。伽罗瓦域（256）编码器被配置为接收和编码第二位数。发射机还包括配置成将第二位数映射到第一位数的第二位映射器。发射机还包括交织器单元，其可以基于帧大小来填充比特并且在交织之后和发送之前对比特进行穿孔。

3. 发明授权

US09264073B2 Freezing-based LDPC decoder and method 有权
标题翻译：基于冻结的LDPC解码器和方法
公开(公告)号：US09264073B2
公开(公告)日：2016-02-16
申请号：US13595846
申请日：2012-08-27
申请人： Mehrzad Malmirchegini , Shadi Abu-surra , Thomas M. Henige , Eran Pisek
发明人： Mehrzad Malmirchegini , Shadi Abu-surra , Thomas M. Henige , Eran Pisek
IPC分类号： H03M13/05 , G06F11/10 , H03M13/11 , H03M13/00 , H03M13/31
CPC分类号： H03M13/116 , G06F11/1008 , H03M13/1117 , H03M13/112 , H03M13/1137 , H03M13/114 , H03M13/1165 , H03M13/118 , H03M13/31 , H03M13/6544 , H03M13/6577 , H03M13/658 , H03M13/6591
摘要： A low-density parity check (LDPC) decoder includes a memory configured to store multiple variable node LLR values in a LLR memory and multiple check nodes messages in a CN memory. The LDPC decoder also includes a saturation indicator configured to determine whether each check node of the H-matrix becomes saturated, and a multiplexer. The multiplexer is configured store an extrinsic check node value in the CN memory and updated LLR value in the LLR memory when the variable node is not saturated; and store a freeze input value in the CN memory and a freeze value in the LLR memory when the variable node is saturated.
摘要翻译：低密度奇偶校验（LDPC）解码器包括被配置为在LLR存储器中存储多个可变节点LLR值的存储器和CN存储器中的多个校验节点消息。 LDPC解码器还包括饱和指示符，其被配置为确定H矩阵的每个校验节点是否饱和，以及多路复用器。当变量节点不饱和时，多路复用器被配置为在CN存储器中存储外部校验节点值并在LLR存储器中存储更新的LLR值; 并且当可变节点饱和时，将冻结输入值存储在CN存储器中并在LLR存储器中存储冻结值。

4. 发明申请

US20130061114A1 FREEZING-BASED LDPC DECODER AND METHOD 有权
标题翻译：基于冷冻的LDPC解码器和方法
公开(公告)号：US20130061114A1
公开(公告)日：2013-03-07
申请号：US13595846
申请日：2012-08-27
申请人： Mehrzad Malmirchegini , Shadi Abu-Surra , Thomas M. Henige , Eran Pisek
发明人： Mehrzad Malmirchegini , Shadi Abu-Surra , Thomas M. Henige , Eran Pisek
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： H03M13/116 , G06F11/1008 , H03M13/1117 , H03M13/112 , H03M13/1137 , H03M13/114 , H03M13/1165 , H03M13/118 , H03M13/31 , H03M13/6544 , H03M13/6577 , H03M13/658 , H03M13/6591
摘要： A low-density parity check (LDPC) decoder includes a memory configured to store multiple variable node LLR values in a LLR memory and multiple check nodes messages in a CN memory. The LDPC decoder also includes a saturation indicator configured to determine whether each check node of the H-matrix becomes saturated, and a multiplexer. The multiplexer is configured store an extrinsic check node value in the CN memory and updated LLR value in the LLR memory when the variable node is not saturated; and store a freeze input value in the CN memory and a freeze value in the LLR memory when the variable node is saturated.
摘要翻译：低密度奇偶校验（LDPC）解码器包括被配置为在LLR存储器中存储多个可变节点LLR值的存储器和CN存储器中的多个校验节点消息。 LDPC解码器还包括饱和指示符，其被配置为确定H矩阵的每个校验节点是否饱和，以及多路复用器。当变量节点不饱和时，多路复用器被配置为在CN存储器中存储外部校验节点值并在LLR存储器中存储更新的LLR值; 并且当可变节点饱和时，将冻结输入值存储在CN存储器中并在LLR存储器中存储冻结值。

5. 发明授权

US08560911B2 System and method for structured LDPC code family 失效
标题翻译：用于结构化LDPC码族的系统和方法
公开(公告)号：US08560911B2
公开(公告)日：2013-10-15
申请号：US12876903
申请日：2010-09-07
申请人： Shadi Abu-Surra , Eran Pisek , Zhouyue Pi
发明人： Shadi Abu-Surra , Eran Pisek , Zhouyue Pi
IPC分类号： H03M13/00 , H03M13/35
CPC分类号： H03M13/116 , H03M13/03 , H03M13/033 , H03M13/1165 , H03M13/118 , H03M13/635 , H03M13/6516 , H03M13/6525 , H03M13/6544 , H04L1/0057
摘要： A low density parity check (LDPC) family of codes is constructed by: determining a protograph for a mother code for the LDPC family of codes. The protograph is lifted by a lifting factor to design code specific protograph for a code. The method also includes constructing a base matrix for the code. The base matrix is constructed by replacing each zero in the code specific protograph with a ‘−1’; and replacing each one in the code specific protograph with a corresponding value from the mother matrix. The LDPC code includes a codeword size of at least 1344, a plurality of information bits, and a plurality of parity bits. The LDPC code is based on a mother code of code length 672.
摘要翻译：通过以下方式构建低密度奇偶校验（LDPC）系列：为LDPC码系列确定母码的原图。原型机由提升因素提升，为代码设计代码特定原型。该方法还包括为代码构建基本矩阵。通过用代码特定原型的每个零代替“-1”来构造基本矩阵; 并用代码特定原型中的每一个替换来自母体矩阵的相应值。 LDPC码包括至少1344的码字大小，多个信息比特和多个奇偶校验位。 LDPC码基于代码长度为672的母码。

6. 发明申请

US20110307760A1 METHOD AND APPARATUS FOR PARALLEL PROCESSING IN A GIGABIT LDPC DECODER 有权
标题翻译：在并行处理LDPC码解码器中的方法和装置
公开(公告)号：US20110307760A1
公开(公告)日：2011-12-15
申请号：US13159091
申请日：2011-06-13
申请人： Eran Pisek , Shadi Abu-Surra
发明人： Eran Pisek , Shadi Abu-Surra
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： H03M13/116 , H03M13/1111 , H03M13/114 , H04L1/0045 , H04L1/0057
摘要： A receiver for use in a wireless communications network capable of decoding encoded transmissions. The receiver comprises receive path circuitry for receiving and downconverting an incoming radio frequency (RF) signal to produce an encoded received signal; and a low-density parity check (LDPC) decoder associated with the receive path circuitry for decoding the encoded received signal. The LDPC decoder further comprises a memory for storing a parity check H matrix comprising R rows and C columns, where each element of the parity check H matrix comprises one of a shift value or a −1 value; and a plurality of processing elements for performing LDPC layered decoding, wherein at least one processing element is operable to process in the same cycle a first row and a second row of the parity check H matrix.
摘要翻译：一种用于能够解码编码的传输的无线通信网络中的接收机。接收机包括用于接收和下变频输入射频（RF）信号以产生编码的接收信号的接收路径电路; 以及与接收路径电路相关联的用于解码编码的接收信号的低密度奇偶校验（LDPC）解码器。 LDPC解码器还包括用于存储包括R行和C列的奇偶校验H矩阵的存储器，其中奇偶校验H矩阵的每个元素包括移位值或-1值之一; 以及用于执行LDPC分层解码的多个处理元件，其中至少一个处理元件可操作以在同一周期中处理奇偶校验H矩阵的第一行和第二行。

7. 发明授权

US08495450B2 System and method for structured LDPC code family with fixed code length and no puncturing 失效
标题翻译：具有固定码长和无穿孔的结构化LDPC码系列的系统和方法
公开(公告)号：US08495450B2
公开(公告)日：2013-07-23
申请号：US12855442
申请日：2010-08-12
申请人： Shadi Abu-Surra , Eran Pisek , Zhouyue Pi
发明人： Shadi Abu-Surra , Eran Pisek , Zhouyue Pi
IPC分类号： H03M13/00
CPC分类号： H04L1/0057 , H03M13/033 , H03M13/036 , H03M13/1137 , H03M13/116 , H03M13/1165 , H03M13/118 , H03M13/6362 , H03M13/6516 , H03M13/6525 , H03M13/6544 , H04L1/005
摘要： A family of low density parity check (LDPC) codes is generated based on a mother code having a highest code rate. The low density parity check (LDPC) codes include a codeword size of at least 1344. The LDPC codes also include a plurality of parity bits in a lower triangular form. The mother code is constructed by: selecting m number of rows and n number of columns; setting maximum column weights and row weights; designing a protograph matrix based on the set column weights and row weights and selected m and n; and selecting circulant blocks based on the protograph matrix.
摘要翻译：基于具有最高码率的母码生成低密度奇偶校验（LDPC）码族。低密度奇偶校验（LDPC）码包括至少1344的码字大小。LDPC码还包括下三角形形式的多个奇偶校验位。母码由以下构成：选择m行和n列; 设置最大列权重和行权重; 基于设置的列权重和行权重设计原型矩阵，并选择m和n; 并根据原型矩阵选择循环块。

8. 发明授权

US09634693B2 Apparatus and method for decoding LDPC codes in a communications system 有权
公开(公告)号：US09634693B2
公开(公告)日：2017-04-25
申请号：US13248900
申请日：2011-09-29
申请人： Eran Pisek , Shadi Abu-Surra , Thomas M. Henige
发明人： Eran Pisek , Shadi Abu-Surra , Thomas M. Henige
IPC分类号： H03M13/00 , H03M13/31 , H03M13/03 , H03M13/11
CPC分类号： H03M13/31 , H03M13/033 , H03M13/1137 , H03M13/114 , H03M13/116 , H03M13/118
摘要： An apparatus and method decode LDPC code. The apparatus includes a memory and a number of LDPC processing elements. The memory is configured to receive a LDPC codeword having a length equal to a lifting factor times a base LDPC code length, wherein the lifting factor is greater than one. The number of LDPC processing elements configured to decode the LDPC codeword, wherein each of the number of LDPC processing elements decode separate portions of the LDPC codeword.

9. 发明授权

US08627166B2 LDPC code family for millimeter-wave band communications in a wireless network 有权
标题翻译：用于无线网络中毫米波段通信的LDPC码系列
公开(公告)号：US08627166B2
公开(公告)日：2014-01-07
申请号：US13306747
申请日：2011-11-29
申请人： Shadi Abu-Surra , Thomas M. Henige , Eran Pisek , Zhouyue Pi
发明人： Shadi Abu-Surra , Thomas M. Henige , Eran Pisek , Zhouyue Pi
IPC分类号： H03M13/00
CPC分类号： H03M13/618 , H03M13/033 , H03M13/036 , H03M13/1137 , H03M13/116 , H03M13/6516
摘要： A method constructs a family of low-density-parity-check (LDPC) codes. The method includes identifying a code rate for an LDPC code in the family, identifying a protograph for the LDPC code, and constructing a base matrix for the LDPC code. The base matrix is constructed by replacing each zero in the protograph with a ‘−1’, selecting a corresponding value for an absolute shift for each one in the protograph based on constraining a number of relative shifts per column of the LDPC code to one and increasing a size of a smallest cycle in a graph of the LDPC code, and replacing each one in the protograph with the corresponding value.
摘要翻译：一种方法构建了一系列低密度奇偶校验（LDPC）码。该方法包括识别该系列中的LDPC码的码率，识别LDPC码的原型图，以及构造LDPC码的基本矩阵。基本矩阵是通过用“-1”代替原型图中的每个零来构造的，基于将每个LDPC码的相对位移数量约束为1，为了对原型图中的每一个选择相应的绝对位移值，增加LDPC码的图形中的最小周期的大小，并将原型图中的每一个替换为相应的值。

10. 发明申请

US20120240001A1 LDPC CODE FAMILY FOR MILLIMETER-WAVE BAND COMMUNICATIONS IN A WIRELESS NETWORK 有权
标题翻译：用于无线网络中的毫米波段通信的LDPC码系列
公开(公告)号：US20120240001A1
公开(公告)日：2012-09-20
申请号：US13306747
申请日：2011-11-29
申请人： Shadi Abu-Surra , Thomas M. Henige , Eran Pisek , Zhouyue Pi
发明人： Shadi Abu-Surra , Thomas M. Henige , Eran Pisek , Zhouyue Pi
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： H03M13/618 , H03M13/033 , H03M13/036 , H03M13/1137 , H03M13/116 , H03M13/6516
摘要： A method constructs a family of low-density-parity-check (LDPC) codes. The method includes identifying a code rate for an LDPC code in the family, identifying a protograph for the LDPC code, and constructing a base matrix for the LDPC code. The base matrix is constructed by replacing each zero in the protograph with a ‘−1’, selecting a corresponding value for an absolute shift for each one in the protograph based on constraining a number of relative shifts per column of the LDPC code to one and increasing a size of a smallest cycle in a graph of the LDPC code, and replacing each one in the protograph with the corresponding value.
摘要翻译：一种方法构建了一系列低密度奇偶校验（LDPC）码。该方法包括识别该系列中的LDPC码的码率，识别LDPC码的原型图，以及构造LDPC码的基本矩阵。基本矩阵是通过用“-1”代替原型图中的每个零来构造的，基于将每个LDPC码的相对位移数量约束为1，为了对原型图中的每一个选择相应的绝对位移值，增加LDPC码的图形中的最小周期的大小，并将原型图中的每一个替换为相应的值。

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