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    • 8. 发明申请
    • METHOD AND APPARATUS FOR PARALLEL PROCESSING IN A GIGABIT LDPC DECODER
    • 在并行处理LDPC码解码器中的方法和装置
    • US20110307760A1
    • 2011-12-15
    • US13159091
    • 2011-06-13
    • Eran PisekShadi Abu-Surra
    • Eran PisekShadi Abu-Surra
    • H03M13/05G06F11/10
    • H03M13/116H03M13/1111H03M13/114H04L1/0045H04L1/0057
    • A receiver for use in a wireless communications network capable of decoding encoded transmissions. The receiver comprises receive path circuitry for receiving and downconverting an incoming radio frequency (RF) signal to produce an encoded received signal; and a low-density parity check (LDPC) decoder associated with the receive path circuitry for decoding the encoded received signal. The LDPC decoder further comprises a memory for storing a parity check H matrix comprising R rows and C columns, where each element of the parity check H matrix comprises one of a shift value or a −1 value; and a plurality of processing elements for performing LDPC layered decoding, wherein at least one processing element is operable to process in the same cycle a first row and a second row of the parity check H matrix.
    • 一种用于能够解码编码的传输的无线通信网络中的接收机。 接收机包括用于接收和下变频输入射频(RF)信号以产生编码的接收信号的接收路径电路; 以及与接收路径电路相关联的用于解码编码的接收信号的低密度奇偶校验(LDPC)解码器。 LDPC解码器还包括用于存储包括R行和C列的奇偶校验H矩阵的存储器,其中奇偶校验H矩阵的每个元素包括移位值或-1值之一; 以及用于执行LDPC分层解码的多个处理元件,其中至少一个处理元件可操作以在同一周期中处理奇偶校验H矩阵的第一行和第二行。