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1. 发明授权

US08853699B2 Thin film transistor and method of forming the same 有权
标题翻译：薄膜晶体管及其形成方法
公开(公告)号：US08853699B2
公开(公告)日：2014-10-07
申请号：US12902786
申请日：2010-10-12
申请人： Seung-Ha Choi , Kyoung-Jae Chung , Young-Wook Lee
发明人： Seung-Ha Choi , Kyoung-Jae Chung , Young-Wook Lee
IPC分类号： H01L29/10 , H01L29/423 , H01L29/786 , H01L27/12 , H01L29/66
CPC分类号： H01L29/7869 , H01L27/1214 , H01L27/1225 , H01L29/42384 , H01L29/66742 , H01L29/66969
摘要： Disclosed are a thin film transistor and a method of forming the thin film transistor, wherein the thin film transistor includes a gate electrode, an oxide semiconductor pattern, a first gate insulating layer pattern interposed between the gate electrode and the oxide semiconductor pattern, wherein the first gate insulating layer pattern has an island shape or has two portions of different thicknesses from each other, a source electrode and a drain electrode electrically connected to the oxide semiconductor pattern, wherein the source electrode and the drain electrode are separated from each other, and a first insulating layer pattern placed between the source electrode and drain electrode and the oxide semiconductor pattern, wherein the first insulating layer pattern partially contacts the source electrode and drain electrode and the first gate insulating layer pattern, and wherein the first insulating layer is enclosed by an outer portion.
摘要翻译：公开了一种薄膜晶体管和形成薄膜晶体管的方法，其中薄膜晶体管包括栅电极，氧化物半导体图案，插入在栅电极和氧化物半导体图案之间的第一栅绝缘层图案，其中第一栅极绝缘层图案具有岛状或具有彼此不同厚度的两个部分，与氧化物半导体图案电连接的源电极和漏电极，其中源电极和漏电极彼此分离，以及位于源电极和漏极之间的第一绝缘层图案和氧化物半导体图案，其中第一绝缘层图案部分地接触源电极和漏电极以及第一栅极绝缘层图案，并且其中第一绝缘层被外部。

2. 发明申请

US20110198603A1 THIN FILM TRANSISTOR AND METHOD OF FORMING THE SAME 有权
标题翻译：薄膜晶体管及其形成方法
公开(公告)号：US20110198603A1
公开(公告)日：2011-08-18
申请号：US12902786
申请日：2010-10-12
申请人： SEUNG-HA CHOI , Kyoung-Jae Chung , Young-Wook Lee
发明人： SEUNG-HA CHOI , Kyoung-Jae Chung , Young-Wook Lee
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/7869 , H01L27/1214 , H01L27/1225 , H01L29/42384 , H01L29/66742 , H01L29/66969
摘要： Disclosed are a thin film transistor and a method of forming the thin film transistor.The thin film transistor includes a gate electrode, an oxide semiconductor pattern, a first gate insulating layer pattern interposed between the gate electrode and the oxide semiconductor pattern, wherein the first gate insulating layer pattern has an island shape or has two portions of different thicknesses from each other, a source electrode and a drain electrode electrically connected to the oxide semiconductor pattern, wherein the source electrode and the drain electrode are separated from each other, and a first insulating layer pattern placed between the source electrode and drain electrode and the oxide semiconductor pattern, wherein the first insulating layer pattern partially contacts the source electrode and drain electrode and the first gate insulating layer pattern, and wherein the first insulating layer is enclosed by an outer portion.
摘要翻译：公开了薄膜晶体管和形成薄膜晶体管的方法。薄膜晶体管包括栅电极，氧化物半导体图案，插入在栅极电极和氧化物半导体图案之间的第一栅极绝缘层图案，其中第一栅极绝缘层图案具有岛状或具有两个不同厚度的部分电连接到所述氧化物半导体图案的源电极和漏电极，其中所述源电极和所述漏电极彼此分离;以及第一绝缘层图案，位于所述源电极和漏极之间以及所述氧化物半导体图案，其中所述第一绝缘层图案部分地接触所述源电极和漏电极以及所述第一栅绝缘层图案，并且其中所述第一绝缘层被外部包围。

3. 发明授权

US08723179B2 Thin film transistor panel having an etch stopper on semiconductor 有权
标题翻译：薄膜晶体管板在半导体上具有蚀刻停止层
公开(公告)号：US08723179B2
公开(公告)日：2014-05-13
申请号：US12957743
申请日：2010-12-01
申请人： Pil-Sang Yun , Ki-Won Kim , Hye-Young Ryu , Woo-Geun Lee , Seung-Ha Choi , Jae-Hyoung Youn , Kyoung-Jae Chung , Young-Wook Lee , Je-Hun Lee , Kap-Soo Yoon , Do-Hyun Kim , Dong-Ju Yang , Young-Joo Choi
发明人： Pil-Sang Yun , Ki-Won Kim , Hye-Young Ryu , Woo-Geun Lee , Seung-Ha Choi , Jae-Hyoung Youn , Kyoung-Jae Chung , Young-Wook Lee , Je-Hun Lee , Kap-Soo Yoon , Do-Hyun Kim , Dong-Ju Yang , Young-Joo Choi
IPC分类号： H01L29/04 , H01L31/036 , H01L31/0376 , H01L31/20
CPC分类号： H01L29/41733 , H01L21/44 , H01L21/441 , H01L21/465 , H01L21/475 , H01L21/47573 , H01L21/47635 , H01L27/1214 , H01L27/1225 , H01L27/127 , H01L27/1288 , H01L29/66969 , H01L29/78606 , H01L29/7869 , H01L29/78696
摘要： A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.
摘要翻译：薄膜晶体管面板包括绝缘基板，设置在绝缘基板上的栅极绝缘层，设置在栅极绝缘层上的氧化物半导体层，设置在氧化物半导体层上的蚀刻停止器，以及设置在源极电极和漏极上的在蚀刻停止器上。

4. 发明授权

US08530893B2 Display substrate and method of manufacturing the same 有权
标题翻译：显示基板及其制造方法
公开(公告)号：US08530893B2
公开(公告)日：2013-09-10
申请号：US13205132
申请日：2011-08-08
申请人： Ki-Won Kim , Kyoung-Jae Chung , Hye-Young Ryu , Young-Joo Choi , Seung-Ha Choi , Kap-Soo Yoon
发明人： Ki-Won Kim , Kyoung-Jae Chung , Hye-Young Ryu , Young-Joo Choi , Seung-Ha Choi , Kap-Soo Yoon
IPC分类号： H01L29/786 , H01L29/10 , H01L21/34
CPC分类号： H01L27/1225 , H01L29/66969 , H01L29/7869
摘要： A display substrate includes a gate wire formed on an insulating substrate, a semiconductor pattern formed on the gate wire and containing a metal oxynitride compound, and a data wire formed on the semiconductor pattern to cross the gate wire. The semiconductor pattern has a carrier number density ranging from 1016/cm3 to 1019/cm3.
摘要翻译：显示基板包括形成在绝缘基板上的栅极线，形成在栅极线上并含有金属氮氧化合物的半导体图案，以及形成在半导体图案上的数据线，以跨越栅极线。半导体图案的载体数密度范围为1016 / cm3至1019 / cm3。

5. 发明申请

US20110297930A1 THIN FILM TRANSISTOR DISPLAY PANEL AND MANUFACTURING METHOD OF THE SAME 有权
标题翻译：薄膜晶体管显示面板及其制造方法
公开(公告)号：US20110297930A1
公开(公告)日：2011-12-08
申请号：US13151102
申请日：2011-06-01
申请人： Seung-Ha CHOI , Kyoung-Jae Chung , Woo-Geun Lee
发明人： Seung-Ha CHOI , Kyoung-Jae Chung , Woo-Geun Lee
IPC分类号： H01L29/786 , H01L21/44
CPC分类号： H01L21/76804 , G02F1/133345 , G02F1/136227 , G02F1/136286 , H01L21/76816 , H01L27/1225 , H01L27/1244 , H01L27/1248 , H01L29/4908 , H01L29/66969 , H01L29/78606 , H01L29/7869
摘要： A TFT display panel having a high charge mobility and making it possible to obtain uniform electric characteristics with respect to a large-area display is provided as well as a manufacturing method thereof. A TFT display panel includes a gate electrode formed on an insulation substrate, a first gate insulting layer formed of SiNx on the gate electrode, a second gate insulting layer formed of SiOx on the first gate insulting layer, an oxide semiconductor layer formed to overlap the gate electrode and having a channel part, and a passivation layer formed of SiOx on the oxide semiconductor layer and the gate electrode, and the passivation layer includes a contact hole exposing the drain electrode. The contact hole has a shape in which the passivation layer of a portion directly exposed together with a metal occupies an area smaller than the upper passivation layer.
摘要翻译：提供具有高电荷迁移率并且可以获得相对于大面积显示器的均匀电特性的TFT显示面板及其制造方法。 TFT显示面板包括形成在绝缘基板上的栅极电极，栅极上由SiNx形成的第一栅极绝缘层，在第一栅极绝缘层上由SiOx形成的第二栅极绝缘层，形成为与栅极电极重叠的氧化物半导体层栅电极，并具有通道部分，以及由氧化物半导体层和栅电极上的SiO x形成的钝化层，并且钝化层包括暴露漏电极的接触孔。接触孔具有直接与金属一起暴露的部分的钝化层占据比上钝化层小的形状。

6. 发明授权

US08470623B2 Thin film display panel and method of manufacturing the same 有权
标题翻译：薄膜显示面板及其制造方法
公开(公告)号：US08470623B2
公开(公告)日：2013-06-25
申请号：US12818047
申请日：2010-06-17
申请人： Do-Hyun Kim , Kyoung-Jae Chung , Seung-Ha Choi , Dong-Hoon Lee , Chang-Oh Jeong , Suk-Won Jung
发明人： Do-Hyun Kim , Kyoung-Jae Chung , Seung-Ha Choi , Dong-Hoon Lee , Chang-Oh Jeong , Suk-Won Jung
IPC分类号： H01L21/00
CPC分类号： H01L27/1225 , H01L21/02554 , H01L21/02565 , H01L21/02664 , H01L27/1214 , H01L27/124 , H01L27/1288 , H01L27/3262
摘要： A thin film transistor array panel includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a gate insulating layer disposed on the gate line; an semiconductive oxide layer disposed on the gate insulating layer; a data line disposed on the semiconductive oxide layer and including a source electrode; a drain electrode facing the source electrode on the semiconductive oxide layer; and a passivation layer disposed on the data line. The semiconductive oxide layer is patterned with chlorine (Cl) containing gas which alters relative atomic concentrations of primary semiconductive characteristic-providing elements of the semiconductive oxide layer at least at a portion where a transistor channel region is defined.
摘要翻译：薄膜晶体管阵列面板包括：基板; 栅极线，设置在所述基板上并且包括栅电极; 设置在栅极线上的栅极绝缘层; 设置在所述栅极绝缘层上的半导体氧化物层; 数据线，设置在所述半导体氧化物层上并包括源电极; 在半导体氧化物层上面对源电极的漏电极; 以及设置在数据线上的钝化层。至少在限定了晶体管沟道区域的部分，半导体氧化物层用含氯（Cl）的气体构图，该气体改变半导体氧化物层的初级半导体特性提供元件的相对原子浓度。

7. 发明授权

US09184090B2 Thin film transistor display panel and manufacturing method of the same 有权
标题翻译：薄膜晶体管显示面板及其制造方法相同
公开(公告)号：US09184090B2
公开(公告)日：2015-11-10
申请号：US13151102
申请日：2011-06-01
申请人： Seung-Ha Choi , Kyoung-Jae Chung , Woo-Geun Lee
发明人： Seung-Ha Choi , Kyoung-Jae Chung , Woo-Geun Lee
IPC分类号： H01L21/00 , H01L21/768 , G02F1/1333 , G02F1/1362 , H01L27/12 , H01L29/49 , H01L29/786 , H01L29/66
CPC分类号： H01L21/76804 , G02F1/133345 , G02F1/136227 , G02F1/136286 , H01L21/76816 , H01L27/1225 , H01L27/1244 , H01L27/1248 , H01L29/4908 , H01L29/66969 , H01L29/78606 , H01L29/7869
摘要： A TFT display panel having a high charge mobility and making it possible to obtain uniform electric characteristics with respect to a large-area display is provided as well as a manufacturing method thereof. A TFT display panel includes a gate electrode formed on an insulation substrate, a first gate insulting layer formed of SiNx on the gate electrode, a second gate insulting layer formed of SiOx on the first gate insulting layer, an oxide semiconductor layer formed to overlap the gate electrode and having a channel part, and a passivation layer formed of SiOx on the oxide semiconductor layer and the gate electrode, and the passivation layer includes a contact hole exposing the drain electrode. The contact hole has a shape in which the passivation layer of a portion directly exposed together with a metal occupies an area smaller than the upper passivation layer.
摘要翻译：提供具有高电荷迁移率并且可以获得相对于大面积显示器的均匀电特性的TFT显示面板及其制造方法。 TFT显示面板包括形成在绝缘基板上的栅极电极，栅极上由SiNx形成的第一栅极绝缘层，在第一栅极绝缘层上由SiOx形成的第二栅极绝缘层，形成为与栅极电极重叠的氧化物半导体层栅电极，并具有通道部分，以及由氧化物半导体层和栅电极上的SiO x形成的钝化层，钝化层包括暴露漏电极的接触孔。接触孔具有直接与金属一起暴露的部分的钝化层占据比上钝化层小的形状。

8. 发明授权

US08994023B2 Thin film transistor array substrate and method of fabricating the same 有权
标题翻译：薄膜晶体管阵列基板及其制造方法
公开(公告)号：US08994023B2
公开(公告)日：2015-03-31
申请号：US13115088
申请日：2011-05-24
申请人： Hye-Young Ryu , Woo-Geun Lee , Young-Joo Choi , Kyoung-Jae Chung , Jin-Won Lee , Seung-Ha Choi , Hee-Jun Byeon , Pil-Sang Yun
发明人： Hye-Young Ryu , Woo-Geun Lee , Young-Joo Choi , Kyoung-Jae Chung , Jin-Won Lee , Seung-Ha Choi , Hee-Jun Byeon , Pil-Sang Yun
IPC分类号： H01L47/00 , H01L29/10 , H01L29/04 , H01L29/15 , H01L27/12
CPC分类号： H01L27/1214 , H01L27/1225 , H01L27/1255
摘要： A thin film transistor array substrate capable of reducing degradation of a device due to degradation of an oxide semiconductor pattern and a method of fabricating the same are provided. The thin film transistor array substrate may include an insulating substrate on which a gate electrode is formed, a gate insulating film formed on the insulating substrate, an oxide semiconductor pattern disposed on the gate insulating film, an anti-etching pattern formed on the oxide semiconductor pattern, and a source electrode and a drain electrode formed on the anti-etching pattern. The oxide semiconductor pattern may include an edge portion positioned between the source electrode and the drain electrode, and the edge portion may include at least one conductive region and at least one non-conductive region.
摘要翻译：提供了能够降低由于氧化物半导体图案的劣化引起的器件劣化的薄膜晶体管阵列基板及其制造方法。薄膜晶体管阵列基板可以包括其上形成有栅极的绝缘基板，形成在绝缘基板上的栅极绝缘膜，设置在栅极绝缘膜上的氧化物半导体图案，形成在氧化物半导体上的抗蚀刻图案图案，以及形成在防蚀刻图案上的源电极和漏电极。氧化物半导体图案可以包括位于源电极和漏电极之间的边缘部分，并且边缘部分可以包括至少一个导电区域和至少一个非导电区域。

9. 发明申请

US20120113346A1 DISPLAY SUBSTRATE, DISPLAY DEVICE, AND METHOD OF MANUFACTURING THE DISPLAY SUBSTRATE 有权
标题翻译：显示基板，显示装置以及制造显示基板的方法
公开(公告)号：US20120113346A1
公开(公告)日：2012-05-10
申请号：US13277114
申请日：2011-10-19
申请人： Seung-Ha CHOI , Kyoung-Jae Chung , Woo-Geun Lee
发明人： Seung-Ha CHOI , Kyoung-Jae Chung , Woo-Geun Lee
IPC分类号： G02F1/136 , H01L33/08
CPC分类号： H01L21/3086 , G02F1/136227 , H01L27/1225 , H01L27/1288 , H01L29/4908 , H01L29/66742 , H01L29/66969 , H01L29/7869
摘要： Provided are a display substrate, a display device, and a method of manufacturing the display substrate. The display substrate includes: a substrate in which a pixel region is defined; a gate electrode and a gate pad are formed on the substrate; a gate insulating layer formed on the gate electrode and the gate pad; a buffer layer pattern overlaps the gate electrode and is formed on the gate insulating layer; an insulating film pattern formed on the buffer layer pattern; an oxide semiconductor pattern formed on the insulating film pattern; a source electrode formed on the oxide semiconductor pattern; and a drain electrode formed on the oxide semiconductor pattern and is separated from the source electrode.
摘要翻译：提供了显示基板，显示装置和制造显示基板的方法。显示基板包括：限定像素区域的基板; 在基板上形成栅电极和栅极焊盘; 形成在栅极电极和栅极焊盘上的栅极绝缘层; 缓冲层图案与栅电极重叠并形成在栅极绝缘层上; 形成在缓冲层图案上的绝缘膜图案; 形成在所述绝缘膜图案上的氧化物半导体图案; 形成在所述氧化物半导体图案上的源电极; 以及形成在氧化物半导体图案上并与源电极分离的漏电极。

10. 发明申请

US20110114940A1 THIN FILM DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：薄膜显示面板及其制造方法
公开(公告)号：US20110114940A1
公开(公告)日：2011-05-19
申请号：US12818047
申请日：2010-06-17
申请人： Do-Hyun Kim , Kyoung-Jae Chung , Seung-Ha Choi , Dong-Hoon Lee , Chang-Oh Jeong , Suk-Won Jung
发明人： Do-Hyun Kim , Kyoung-Jae Chung , Seung-Ha Choi , Dong-Hoon Lee , Chang-Oh Jeong , Suk-Won Jung
IPC分类号： H01L29/786 , H01L21/36
CPC分类号： H01L27/1225 , H01L21/02554 , H01L21/02565 , H01L21/02664 , H01L27/1214 , H01L27/124 , H01L27/1288 , H01L27/3262
摘要： A thin film transistor array panel includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a gate insulating layer disposed on the gate line; an semiconductive oxide layer disposed on the gate insulating layer; a data line disposed on the semiconductive oxide layer and including a source electrode; a drain electrode facing the source electrode on the semiconductive oxide layer; and a passivation layer disposed on the data line. The semiconductive oxide layer is patterned with chlorine (Cl) containing gas which alters relative atomic concentrations of primary semiconductive characteristic-providing elements of the semiconductive oxide layer at least at a portion where a transistor channel region is defined.
摘要翻译：薄膜晶体管阵列面板包括：基板; 栅极线，设置在所述基板上并且包括栅电极; 设置在栅极线上的栅极绝缘层; 设置在所述栅极绝缘层上的半导体氧化物层; 数据线，设置在所述半导体氧化物层上并包括源电极; 在半导体氧化物层上面对源电极的漏电极; 以及设置在数据线上的钝化层。至少在限定了晶体管沟道区域的部分，半导体氧化物层用含氯（Cl）的气体构图，该气体改变半导体氧化物层的初级半导体特性提供元件的相对原子浓度。

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