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1. 发明授权

US07224948B1 Transmitter and radio communication terminal using the same 有权
标题翻译：发射机和无线电通信终端使用相同的
公开(公告)号：US07224948B1
公开(公告)日：2007-05-29
申请号：US10148960
申请日：2000-01-11
申请人： Taizo Yamawaki , Satoshi Tanaka , Masaru Kokubo , Kazuo Watanabe , Masumi Kasahara , Kazuaki Hori , Julian Hildersley
发明人： Taizo Yamawaki , Satoshi Tanaka , Masaru Kokubo , Kazuo Watanabe , Masumi Kasahara , Kazuaki Hori , Julian Hildersley
IPC分类号： H04B1/04 , H01Q11/12
CPC分类号： H03C3/0983 , H03C3/0925 , H03C3/0966 , H03D7/163 , H03J2200/17 , H03L7/23 , H04B1/0475 , H04B2001/0491 , H04L25/03343
摘要： There are provided a transmitter and a wireless communication terminal apparatus using the same for solving a problem of undesired spurs due to harmonics of an output signal of a frequency synthesizer, and further solving a problem of the undesired spurs occurring when the harmonics of an output signal of a crystal oscillator are mixed into a VCO to facilitate to design a circuit or a mounting substrate. The transmitter has a relationship between an output frequency of a PLL frequency conversion circuit (5) and output frequencies of frequency synthesizers (1, 2) stored therein, and the output frequencies of the frequency synthesizers (1, 2) input into the PLL frequency conversion circuit (5) are controlled on the basis of the relationship so that the undesired spurs are suppressed. Thereby, even when the undesired spurs occur in the output of the transmitter due to a crosstalk between circuits or through a substrate, which can be easily suppressed, it is therefore possible to reduce time and cost for redesigning the circuit or the substrate.
摘要翻译：提供了一种使用该发送器和无线通信终端装置的方法，用于解决由于频率合成器的输出信号的谐波引起的不期望的杂散问题，并且进一步解决了当输出信号的谐波发生时出现的不需要的杂散的问题的晶体振荡器混合到VCO中以便于设计电路或安装衬底。发射机具有PLL频率转换电路（5）的输出频率和存储在其中的频率合成器（1,2）的输出频率与输入到PLL频率的频率合成器（1,2）的输出频率之间的关系基于该关系来控制转换电路（5），从而抑制不需要的杂散。因此，即使由于电路之间的串扰或通过可以容易地抑制的基板而在发射机的输出端发生不想要的杂散，因此可以减少重新设计电路或基板的时间和成本。

2. 发明授权

US07194242B2 Direct-conversion transmitter circuit and transceiver system 失效
标题翻译：直接转换发射机电路和收发器系统
公开(公告)号：US07194242B2
公开(公告)日：2007-03-20
申请号：US10739282
申请日：2003-12-19
申请人： Satoshi Tanaka , Taizo Yamawaki , Kazuaki Hori , Kazuo Watanabe
发明人： Satoshi Tanaka , Taizo Yamawaki , Kazuaki Hori , Kazuo Watanabe
IPC分类号： H04B1/04 , H03G3/20
CPC分类号： H03D3/007 , H03C3/40 , H04B1/30
摘要： Disclosed is a direct conversion type transmitter or transceiver circuit suitable for a mobile communication device which corresponds to broad signal output level variable width to be required by W-CDMA, which does not necessitate any high-performance low noise VCO and RF filter, capable of reducing a number of components and the cost. In the input portion of an orthogonal modulator composed of a divider, mixers, and a common load, there are provided variable attenuators. If an input signal level of the orthogonal modulator within the transmitter circuit lowers, this variable attenuator circuit is operated so as to lower the bias of the orthogonal modulator to reduce the amount of occurrence of carrier leak, and to prevent the signal during low output level and carrier leak ratio from being deteriorated. The direct conversion transmitter circuit is capable of easily realizing output level variable width of 70 dB or higher and reducing a variable amount in the high frequency circuit in which it is difficult to secure the variable gain width.
摘要翻译：公开了一种适用于移动通信设备的直接转换型发射器或收发器电路，其对应于由W-CDMA所要求的宽信号输出电平可变宽度，其不需要任何高性能低噪声VCO和RF滤波器，其能够减少了一些组件和成本。在由分频器，混频器和公共负载组成的正交调制器的输入部分中，提供可变衰减器。如果发射机电路内的正交调制器的输入信号电平降低，则该可变衰减器电路被工作，以降低正交调制器的偏置，以减少载波泄漏的发生量，并且防止在低输出电平期间的信号并且载体泄漏率不劣化。直接变换发送电路能够容易地实现70dB以上的输出电平可变宽度，并且在难以确保可变增益宽度的高频电路中减少可变量。

3. 发明授权

US07702359B2 Direct-conversion transmitter circuit and transceiver system 有权
标题翻译：直接转换发射机电路和收发器系统
公开(公告)号：US07702359B2
公开(公告)日：2010-04-20
申请号：US11703166
申请日：2007-02-07
申请人： Satoshi Tanaka , Taizo Yamawaki , Kazuaki Hori , Kazuo Watanabe
发明人： Satoshi Tanaka , Taizo Yamawaki , Kazuaki Hori , Kazuo Watanabe
IPC分类号： H04M1/00
CPC分类号： H03D3/007 , H03C3/40 , H04B1/30
摘要： Disclosed is a direct conversion type transmitter or transceiver circuit suitable for a mobile communication device which corresponds to broad signal output level variable width to be required by W-CDMA, which does not necessitate any high-performance low noise VCO and RF filter, capable of reducing a number of components and the cost. In the input portion of an orthogonal modulator composed of a divider, mixers, and a common load, there are provided variable attenuators. If an input signal level of the orthogonal modulator within the transmitter circuit lowers, this variable attenuator circuit is operated so as to lower the bias of the orthogonal modulator to reduce the amount of occurrence of carrier leak, and to prevent the signal during low output level and carrier leak ratio from being deteriorated. The direct conversion transmitter circuit is capable of easily realizing output level variable width of 70 dB or higher and reducing a variable amount in the high frequency circuit in which it is difficult to secure the variable gain width.
摘要翻译：公开了一种适用于移动通信设备的直接转换型发射器或收发器电路，其对应于由W-CDMA所要求的宽信号输出电平可变宽度，其不需要任何高性能低噪声VCO和RF滤波器，其能够减少了一些组件和成本。在由分频器，混频器和公共负载组成的正交调制器的输入部分中，提供可变衰减器。如果发射机电路内的正交调制器的输入信号电平降低，则该可变衰减器电路被工作，以降低正交调制器的偏置，以减少载波泄漏的发生量，并且防止在低输出电平期间的信号并且载体泄漏率不劣化。直接变换发送电路能够容易地实现70dB以上的输出电平可变宽度，并且在难以确保可变增益宽度的高频电路中减少可变量。

4. 发明申请

US20070142080A1 Direct-conversion transmitter circuit and transceiver system 有权
公开(公告)号：US20070142080A1
公开(公告)日：2007-06-21
申请号：US11703166
申请日：2007-02-07
申请人： Satoshi Tanaka , Taizo Yamawaki , Kazuaki Hori , Kazuo Watanabe
发明人： Satoshi Tanaka , Taizo Yamawaki , Kazuaki Hori , Kazuo Watanabe
IPC分类号： H04B1/44 , H04M1/00
CPC分类号： H03D3/007 , H03C3/40 , H04B1/30
摘要： Disclosed is a direct conversion type transmitter or transceiver circuit suitable for a mobile communication device which corresponds to broad signal output level variable width to be required by W-CDMA, which does not necessitate any high-performance low noise VCO and RF filter, capable of reducing a number of components and the cost. In the input portion of an orthogonal modulator composed of a divider, mixers, and a common load, there are provided variable attenuators. If an input signal level of the orthogonal modulator within the transmitter circuit lowers, this variable attenuator circuit is operated so as to lower the bias of the orthogonal modulator to reduce the amount of occurrence of carrier leak, and to prevent the signal during low output level and carrier leak ratio from being deteriorated. The direct conversion transmitter circuit is capable of easily realizing output level variable width of 70 dB or higher and reducing a variable amount in the high frequency circuit in which it is difficult to secure the variable gain width.

5. 发明授权

US06970683B2 PLL circuit and radio communication terminal apparatus using the same 失效
标题翻译： PLL电路和使用其的无线通信终端装置
公开(公告)号：US06970683B2
公开(公告)日：2005-11-29
申请号：US10375241
申请日：2003-02-28
申请人： Taizo Yamawaki , Takefumi Endo , Kazuo Watanabe , Kazuaki Hori , Julian Hildersley
发明人： Taizo Yamawaki , Takefumi Endo , Kazuo Watanabe , Kazuaki Hori , Julian Hildersley
IPC分类号： H03L7/10 , H03D13/00 , H03L7/00 , H03L7/08 , H03L7/085 , H03L7/093 , H03L7/099 , H03L7/107 , H03L7/16 , H03L7/18 , H04B1/3822 , H04B1/40 , H04L7/033
CPC分类号： H03L7/10 , H03D13/007 , H03L7/08 , H03L7/085 , H03L7/093 , H03L7/099 , H03L7/16 , H03L2207/12 , H04B1/406
摘要： In a PLL circuit, the number of LPFs is reduced to one to reduce mounting area and pin number, and to simplify design. In one embodiment, the PLL circuit includes a variable-gain phase comparator, a mixer, an LPF, VCOs, couplers, and a control circuit to controlling the on/off operation of the VCOs. The variable-gain phase comparator is capable of varying a phase difference gain. The on/off of the operation of the VCOs is controlled by the control circuit so that one of the VCOs is turned off. The phase difference conversion gain is varied in accordance with the sensitivity of the VCOs so the number of LPFs required for the PLL circuit can be reduced to only one.
摘要翻译：在PLL电路中，将LPF的数量减少到一个，以减少安装面积和引脚数量，并简化设计。在一个实施例中，PLL电路包括可变增益相位比较器，混频器，LPF，VCO，耦合器以及控制VCO的开/关操作的控制电路。可变增益相位比较器能够改变相位差增益。 VCO的操作的开/关由控制电路控制，使得VCO中的一个被关断。相位差转换增益根据VCO的灵敏度而变化，因此PLL电路所需的LPF的数量可以减少到一个。

6. 发明授权

US06996377B1 PLL circuit and radio communication terminal apparatus using the same 失效
公开(公告)号：US06996377B1
公开(公告)日：2006-02-07
申请号：US09787380
申请日：1999-09-14
申请人： Taizo Yamawaki , Takefumi Endo , Kazuo Watanabe , Kazuaki Hori , Julian Hildersley
发明人： Taizo Yamawaki , Takefumi Endo , Kazuo Watanabe , Kazuaki Hori , Julian Hildersley
IPC分类号： H04B1/40
CPC分类号： H03L7/10 , H03D13/007 , H03L7/08 , H03L7/085 , H03L7/093 , H03L7/099 , H03L7/16 , H03L2207/12 , H04B1/406
摘要： In a PLL circuit, the number of LPFs is reduced to one to reduce mounting area and pin number, and to simplify design. In one embodiment, the PLL circuit includes a variable-gain phase comparator, a mixer, an LPF, VCOs, couplers, and a control circuit to controlling the on/off operation of the VCOs. The variable-gain phase comparator is capable of varying a phase difference gain. The on/off of the operation of the VCOs is controlled by the control circuit so that one of the VCOs is turned off. The phase difference conversion gain is varied in accordance with the sensitivity of the VCOs so the number of LPFs required for the PLL circuit can be reduced to only one.

7. 发明授权

US07333779B2 PLL circuit and radio communication terminal apparatus using the same 有权
标题翻译： PLL电路和使用其的无线通信终端装置
公开(公告)号：US07333779B2
公开(公告)日：2008-02-19
申请号：US11121018
申请日：2005-05-04
申请人： Taizo Yamawaki , Takefumi Endo , Kazuo Watanabe , Kazuaki Hori , Julian Hildersley
发明人： Taizo Yamawaki , Takefumi Endo , Kazuo Watanabe , Kazuaki Hori , Julian Hildersley
IPC分类号： H01Q11/12 , H04B1/04
CPC分类号： H03L7/10 , H03D13/007 , H03L7/08 , H03L7/085 , H03L7/093 , H03L7/099 , H03L7/16 , H03L2207/12 , H04B1/406
摘要： In a PLL circuit, the number of LPFs is reduced to one to reduce mounting area and pin number, and to simplify design. In one embodiment, the PLL circuit includes a variable-gain phase comparator, a mixer, an LPF, VCOs, couplers, and a control circuit to controlling the on/off operation of the VCOs. The variable-gain phase comparator is capable of varying a phase difference gain. The on/off of the operation of the VCOs is controlled by the control circuit so that one of the VCOs is turned off. The phase difference conversion gain is varied in accordance with the sensitivity of the VCOs so the number of LPFs required for the PLL circuit can be reduced to only one.
摘要翻译：在PLL电路中，将LPF的数量减少到一个，以减少安装面积和引脚数量，并简化设计。在一个实施例中，PLL电路包括可变增益相位比较器，混频器，LPF，VCO，耦合器以及控制VCO的开/关操作的控制电路。可变增益相位比较器能够改变相位差增益。 VCO的操作的开/关由控制电路控制，使得VCO中的一个被关断。相位差转换增益根据VCO的灵敏度而变化，因此PLL电路所需的LPF的数量可以减少到一个。

8. 发明申请

US20050215222A1 PLL circuit and radio communication terminal apparatus using the same 有权
公开(公告)号：US20050215222A1
公开(公告)日：2005-09-29
申请号：US11121018
申请日：2005-05-04
申请人： Taizo Yamawaki , Takefumi Endo , Kazuo Watanabe , Kazuaki Hori , Julian Hildersley
发明人： Taizo Yamawaki , Takefumi Endo , Kazuo Watanabe , Kazuaki Hori , Julian Hildersley
IPC分类号： H03L7/10 , H03D13/00 , H03L7/00 , H03L7/08 , H03L7/085 , H03L7/093 , H03L7/099 , H03L7/107 , H03L7/16 , H03L7/18 , H04B1/3822 , H04B1/40 , H04L7/033
CPC分类号： H03L7/10 , H03D13/007 , H03L7/08 , H03L7/085 , H03L7/093 , H03L7/099 , H03L7/16 , H03L2207/12 , H04B1/406
摘要： In a PLL circuit, the number of LPFs is reduced to one to reduce mounting area and pin number, and to simplify design. In one embodiment, the PLL circuit includes a variable-gain phase comparator, a mixer, an LPF, VCOs, couplers, and a control circuit to controlling the on/off operation of the VCOs. The variable-gain phase comparator is capable of varying a phase difference gain. The on/off of the operation of the VCOs is controlled by the control circuit so that one of the VCOs is turned off. The phase difference conversion gain is varied in accordance with the sensitivity of the VCOs so the number of LPFs required for the PLL circuit can be reduced to only one.

9. 发明授权

US08396430B2 Semiconductor integrated circuit device and wireless communication system 有权
标题翻译：半导体集成电路器件和无线通信系统
公开(公告)号：US08396430B2
公开(公告)日：2013-03-12
申请号：US13114340
申请日：2011-05-24
申请人： Taizo Yamawaki , Tomonori Tanoue , Kazuaki Hori
发明人： Taizo Yamawaki , Tomonori Tanoue , Kazuaki Hori
IPC分类号： H04B1/44
CPC分类号： H04B1/006 , H04B1/52
摘要： Disclosed are a semiconductor integrated circuit device and a wireless communication system that are capable of improving reception sensitivity. The wireless communication system includes, for instance, a first duplexer, a second duplexer, a first low-noise amplifier circuit, and a second low-noise amplifier circuit. A transmission band compliant with a communication standard is split into two segments for use, namely, low- and high-frequency transmission bands. A reception band compliant with the communication standard is split into two segments for use, namely, low- and high-frequency reception bands. The first duplexer uses the low-frequency transmission band and low-frequency reception band as passbands. The second duplexer uses the high-frequency transmission band and high-frequency reception band as passbands. A signal received from the first duplexer and a signal received from the second duplexer are respectively amplified by the first and the second low-noise amplifier circuits, which are respectively provided to handle such signals.
摘要翻译：公开了能够提高接收灵敏度的半导体集成电路装置和无线通信系统。无线通信系统包括例如第一双工器，第二双工器，第一低噪声放大器电路和第二低噪声放大器电路。符合通信标准的传输频带被分成两个段，即低频和高频传输频带。符合通信标准的接收频段被分为两段供低频和高频接收频段使用。第一双工器使用低频传输频带和低频接收频带作为通带。第二双工器使用高频传输频带和高频接收频带作为通带。从第一双工器接收的信号和从第二双工器接收的信号分别由分别提供以处理这种信号的第一和第二低噪声放大器电路放大。

10. 发明授权

US07260373B2 Direct conversion receiver 有权
标题翻译：直接转换接收机
公开(公告)号：US07260373B2
公开(公告)日：2007-08-21
申请号：US10727612
申请日：2003-12-05
申请人： Yukinori Akamine , Satoshi Tanaka , Akio Yamamoto , Kazuaki Hori
发明人： Yukinori Akamine , Satoshi Tanaka , Akio Yamamoto , Kazuaki Hori
IPC分类号： H04B1/10
CPC分类号： H04B1/30 , H03G3/3052
摘要： In a direct conversion receiver, to cancel a DC offset generated in the baseband processing block, negative feedback arrangements comprising a gain control amplifier and a low-pass filter are respectively attached to the I and Q signal branches of the baseband block following mixer outputs. The gain control amplifier in each negative feedback circuit is gain adjusted so that the product G-B of the gain G of a primary gain control amplifier and its own gain B will be constant and thereby the DC offset is cancelled. This DC offset cancellation can be applied in a continuous receiving system with no intermittent time during a receiving operation. Capacitance elements located off-chip can be reduced to those to be used only in the low-pass filters in the negative feedback circuits, whereas many off-chip capacitance elements have been required to be inserted between each stage of gain control amplifiers in conventional baseband chains.
摘要翻译：在直接转换接收机中，为了消除在基带处理块中产生的DC偏移，包括增益控制放大器和低通滤波器的负反馈装置分别附加到混频器输出之后的基带块的I和Q信号分支。每个负反馈电路中的增益控制放大器被增益调整，使得主增益控制放大器的增益G的乘积G-B和其自身的增益B将恒定，从而DC偏移被消除。该DC偏移消除可以应用于在接收操作期间没有间歇时间的连续接收系统中。位于片外的电容元件可以减少到仅在负反馈电路中的低通滤波器中使用的电容元件，而许多芯片外电容元件需要插入到常规基带中的增益控制放大器的每个级之间链条

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