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1. 发明申请

US20070128812A1 METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT USING A SELECTIVE DISPOSABLE SPACER TECHNIQUE AND SEMICONDUCTOR INTEGRATED CIRCUIT MANUFACTURED THEREBY 有权
标题翻译：使用选择性可分离间隔技术制造半导体集成电路的方法和制造的半导体集成电路
公开(公告)号：US20070128812A1
公开(公告)日：2007-06-07
申请号：US11671438
申请日：2007-02-05
申请人： Sang-Eun LEE , Yun-Heub SONG
发明人： Sang-Eun LEE , Yun-Heub SONG
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L21/28273 , H01L21/76224 , H01L27/0207 , H01L27/105 , H01L27/11526 , H01L27/11539 , H01L27/11541
摘要： Methods of manufacturing a semiconductor integrated circuit using selective disposable spacer technology and semiconductor integrated circuits manufactured thereby. The method includes providing a semiconductor substrate; forming gate patterns on the semiconductor substrate, wherein a first space and a second space wider than the first space are disposed between the gate patterns; forming a first impurity region in the semiconductor substrate under the first space and forming a second impurity region in the semiconductor substrate under the second space; forming insulation spacers on sidewalls of the gate patterns, wherein a portion of the second impurity region is exposed and the first impurity region is covered with the insulation spacers; etching the insulation spacers, wherein an opening width of the second impurity region is enlarged and wherein the etching is carried out with a wet etching process; and forming an interlayer insulating layer on the overall structure including the gate patterns.
摘要翻译：使用选择性一次性间隔器技术制造半导体集成电路的方法和由此制造的半导体集成电路。该方法包括：提供半导体衬底; 在所述半导体衬底上形成栅极图案，其中在所述栅极图案之间设置比所述第一空间宽的第一空间和第二空间; 在所述第一空间下的所述半导体衬底中形成第一杂质区，并在所述第二空间下在所述半导体衬底中形成第二杂质区; 在所述栅极图案的侧壁上形成绝缘间隔物，其中所述第二杂质区域的一部分被暴露，并且所述第一杂质区域被所述绝缘间隔物覆盖; 蚀刻绝缘间隔物，其中第二杂质区域的开口宽度增大，并且其中蚀刻通过湿蚀刻工艺进行; 以及在包括栅极图案的整体结构上形成层间绝缘层。

2. 发明申请

US20090294823A1 METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT USING A SELECTIVE DISPOSAL SPACER TECHNIQUE AND SEMICONDUCTOR INTEGRATED CIRCUIT MANUFACTURED THEREBY 有权
标题翻译：使用选择性处理间隔技术制造半导体集成电路的方法和制造半导体集成电路的方法
公开(公告)号：US20090294823A1
公开(公告)日：2009-12-03
申请号：US12538798
申请日：2009-08-10
申请人： Sang-Eun LEE , Yun-Heub SONG
发明人： Sang-Eun LEE , Yun-Heub SONG
IPC分类号： H01L27/105 , H01L29/94 , H01L29/78
CPC分类号： H01L27/115 , H01L21/28273 , H01L21/76224 , H01L27/0207 , H01L27/105 , H01L27/11526 , H01L27/11539 , H01L27/11541
摘要： Methods of manufacturing a semiconductor integrated circuit using selective disposable spacer technology and semiconductor integrated circuits manufactured thereby. The method includes providing a semiconductor substrate; forming gate patterns on the semiconductor substrate, wherein a first space and a second space wider than the first space are disposed between the gate patterns; forming a first impurity region in the semiconductor substrate under the first space and forming a second impurity region in the semiconductor substrate under the second space; forming insulation spacers on sidewalls of the gate patterns, wherein a portion of the second impurity region is exposed and the first impurity region is covered with the insulation spacers; etching the insulation spacers, wherein an opening width of the second impurity region is enlarged and wherein the etching is carried out with a wet etching process; and forming an interlayer insulating layer on the overall structure including the gate patterns.
摘要翻译：使用选择性一次性间隔器技术制造半导体集成电路的方法和由此制造的半导体集成电路。该方法包括：提供半导体衬底; 在所述半导体衬底上形成栅极图案，其中在所述栅极图案之间设置比所述第一空间宽的第一空间和第二空间; 在所述第一空间下的所述半导体衬底中形成第一杂质区，并在所述第二空间下在所述半导体衬底中形成第二杂质区; 在所述栅极图案的侧壁上形成绝缘间隔物，其中所述第二杂质区域的一部分被暴露，并且所述第一杂质区域被所述绝缘间隔物覆盖; 蚀刻绝缘间隔物，其中第二杂质区域的开口宽度增大，并且其中蚀刻通过湿蚀刻工艺进行; 以及在包括栅极图案的整体结构上形成层间绝缘层。

3. 发明申请

US20110194356A1 METHODS OF FORMING AND OPERATING SEMICONDUCTOR DEVICE 有权
标题翻译：形成和操作半导体器件的方法
公开(公告)号：US20110194356A1
公开(公告)日：2011-08-11
申请号：US13087643
申请日：2011-04-15
申请人： Wook-Hyun KWON , Byung-Gook PARK , Yun-Heub SONG , Yoon KIM
发明人： Wook-Hyun KWON , Byung-Gook PARK , Yun-Heub SONG , Yoon KIM
IPC分类号： G11C11/34 , H01L21/336
CPC分类号： H01L27/11568 , H01L29/66833 , H01L29/7923
摘要： Provided are a semiconductor device and a methods of forming and operating the semiconductor device. The semiconductor device may include active pillars extending from a semiconductor substrate and disposed two dimensionally disposed on the semiconductor substrate, upper interconnections connecting the active pillars along one direction, lower interconnections crossing the upper interconnections and disposed between the active pillars, word lines crossing the upper interconnections and disposed between the active pillars, and data storage patterns disposed between the word lines and the active pillars.
摘要翻译：提供半导体器件以及形成和操作半导体器件的方法。半导体器件可以包括从半导体衬底延伸并且二维地设置在半导体衬底上的有源柱，在一个方向上连接有源柱的上部互连，与上部互连交叉的下部互连，并且设置在有源柱之间，跨越上部的字线互连并且布置在活动柱之间，以及布置在字线和活动柱之间的数据存储图案。

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