会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明申请
    • Method of manufacturing flash memory device
    • 制造闪存设备的方法
    • US20050277251A1
    • 2005-12-15
    • US10887260
    • 2004-07-08
    • Seung LeeSang ParkPil Song
    • Seung LeeSang ParkPil Song
    • H01L27/115H01L21/331H01L21/8239H01L21/8247
    • H01L27/11539H01L27/11526H01L27/11536H01L27/11541H01L27/11543
    • Provided relates to a method of a flash memory device, which performs a first rapid thermal oxidation process at a H2 rich atmosphere for recovering an etched damage during a gate forming process, and performs a second rapid thermal oxidation process at the H2 rich atmosphere for ion-activating after performing an ion implantation process for forming a cell transistor junction and a peripheral circuit transistor junction. As a result of those processes, a Si-dangling bond cut off during a gate etching process has a Si—H combination structure and the whole processing time is reduced, and thus an abnormal oxidation caused at an edge of an ONO layer and a tunnel oxide film, which can make it possible to prevent a smiling phenomena of the ONO layer and a bird's beak phenomena of the tunnel oxide film.
    • 本发明涉及一种闪存器件的方法,其在H 2富含气氛下进行第一快速热氧化处理,以在栅极形成工艺期间回收蚀刻损伤,并执行第二快速热氧化 在进行用于形成单元晶体管结的离子注入工艺和外围电路晶体管结的离子激活之后,在富H 2气氛下进行离子激活。 作为这些工艺的结果,在栅极蚀刻工艺期间切断的Si-悬挂键具有Si-H组合结构,并且整个处理时间减少,因此在ONO层和隧道的边缘处引起异常氧化 氧化膜,能够防止ONO层的微笑现象和隧道状氧化膜的鸟喙现象。
    • 5. 发明申请
    • Surface acoustic wave device package
    • 声表面波器件封装
    • US20060250049A1
    • 2006-11-09
    • US11259199
    • 2005-10-27
    • Doo ParkYoung LeeSeung LeeJoo ParkSang ParkNam Kim
    • Doo ParkYoung LeeSeung LeeJoo ParkSang ParkNam Kim
    • H01L41/053
    • H03H9/1085H01L2224/16225H03H9/059
    • The present invention provides a SAW device package used in filters, duplexers, etc., in particular, which simplifies sealing process for protecting the active area of a SAW device. The SAW device package comprises a wiring substrate, as a package base having connection patterns, having bare chip attaching means. A bare chip is flip-bonded and attached to the attaching means on the wiring substrate while maintaining the airtight condition. A resin molding part covers the top of the bare chip to seal the device. The invention facilitates maintaining an airtight condition of the active area which affects the operational characteristics of the device, and simplifies the manufacturing processes. Furthermore, the improved structure of the wiring substrate blocks the external moisture permeation, thereby enabling the device to better withstand the external changes.
    • 本发明提供了一种特别用于滤波器,双工器等中的SAW器件封装,其简化了用于保护SAW器件的有源区域的密封工艺。 SAW器件封装包括布线衬底,作为具有连接图案的封装基座,具有裸芯片附接装置。 在保持气密状态的同时,将裸芯片翻转接合并附接到布线基板上的附接装置。 树脂成型部分覆盖裸芯片的顶部以密封装置。 本发明有助于维持影响装置的操作特性的活性区域的气密状态,并且简化了制造过程。 此外,布线基板的改进的结构阻止外部水分渗透,从而使得该装置能够更好地承受外部变化。
    • 7. 发明申请
    • Method for manufacturing semiconductor device
    • 制造半导体器件的方法
    • US20050153520A1
    • 2005-07-14
    • US10887258
    • 2004-07-08
    • Seung LeeSang Park
    • Seung LeeSang Park
    • H01L21/308H01L21/336H01L21/8234H01L21/8247H01L27/088H01L27/10H01L27/105H01L27/115H01L29/788H01L29/792
    • H01L27/11543H01L21/823462H01L27/105H01L27/11526
    • The present invention discloses a method for forming an element isolation film of a semiconductor device, comprising the steps of: sequentially forming a pad oxide film, a pad nitride film and a mask oxide film on a semiconductor substrate on which a first region for forming a high voltage device and a second region for forming a low voltage device or a flash memory cell are defined; etching the mask oxide film, the pad nitride film and the pad oxide film in the first region and the mask oxide film in the second region, and forming an oxide film for the high voltage device in the first region; removing the residual pad nitride film in the second region; removing the nitride film and partially removing the oxide film for the high voltage device in the first region, wherein the oxide film for the high voltage device has a third thickness; removing the residual pad oxide film in the second region; partially removing the oxide film for the high voltage device in the first region according to a cleaning process, wherein the oxide film for the high voltage device has a third thickness; and forming a tunnel oxide film over the resulting structure, wherein a gate oxide film for a high voltage device including the oxide film for the high voltage device and the tunnel oxide film is formed in the first region, and the tunnel oxide film for the low voltage device and cell is formed in the second region.
    • 本发明公开了一种形成半导体器件的元件隔离膜的方法,包括以下步骤:在半导体衬底上依次形成衬垫氧化膜,衬垫氮化物膜和掩模氧化物膜,在半导体衬底上形成第一区域 定义高压装置和用于形成低电压装置或闪存单元的第二区域; 在所述第一区域中蚀刻所述掩模氧化膜,所述衬垫氮化物膜和所述衬垫氧化物膜,并且在所述第二区域中蚀刻所述掩模氧化物膜,并且在所述第一区域中形成用于所述高电压器件的氧化物膜; 去除所述第二区域中的所述残留的衬垫氮化物膜; 去除所述氮化物膜并部分地去除所述第一区域中的所述高电压器件的氧化物膜,其中所述高压器件的氧化物膜具有第三厚度; 去除所述第二区域中的残余衬垫氧化物膜; 根据清洁过程,部分去除第一区域中的高电压器件的氧化膜,其中用于高压器件的氧化物膜具有第三厚度; 并在所得到的结构上形成隧道氧化膜,其中在第一区域中形成用于包括用于高压器件的氧化物膜和隧道氧化物膜的高电压器件的栅极氧化膜,并且用于低电压的隧道氧化物膜 电压装置和电池形成在第二区域中。