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1. 发明授权

US07560371B2 Methods for selectively filling apertures in a substrate to form conductive vias with a liquid using a vacuum 有权
标题翻译：用于选择性地填充衬底中的孔以使用真空与液体形成导电通孔的方法
公开(公告)号：US07560371B2
公开(公告)日：2009-07-14
申请号：US11511619
申请日：2006-08-29
申请人： Ross S. Dando , Steven Oliver , Swarnal Borthakur , Kevin Hutto
发明人： Ross S. Dando , Steven Oliver , Swarnal Borthakur , Kevin Hutto
IPC分类号： H01L21/20
CPC分类号： H01L21/76898 , H05K3/3468 , H05K2201/09572 , H05K2203/0763 , H05K2203/082
摘要： Methods of forming a conductive via in a substrate include contacting the substrate with a wave of conductive liquid material, such as molten solder, and drawing the liquid material into the aperture with a vacuum. The wave may be formed by flowing the liquid material out from an outlet in a direction generally against the gravitational field. The liquid material may be solidified to form an electrically conductive structure. A plurality of apertures may be selectively filled with the liquid material one at a time, and liquids having different compositions may be used to provide conductive vias having different compositions in the same substrate. Systems for forming conductive vias include a substrate fixture, a vacuum device having a vacuum fixture, and a solder-dispensing device configured to provide a wave of molten solder material. Relative lateral and vertical movement is provided between the wave of molten solder and a substrate supported by the substrate fixture.
摘要翻译：在衬底中形成导电通孔的方法包括使衬底与诸如熔融焊料的导电液体材料的波接触，并且用真空将液体材料拉入孔中。该波浪可以通过使液体材料沿着通常抵靠重力场的方向从出口流出而形成。液体材料可以被固化以形成导电结构。可以一次一个地选择性地填充多个孔，并且可以使用具有不同组成的液体来在同一基底中提供具有不同组成的导电通孔。用于形成导电通孔的系统包括基板固定装置，具有真空夹具的真空装置以及被配置为提供熔融焊料材料波的焊料分配装置。在熔融焊料的波浪和由基板夹具支撑的基板之间提供相对的横向和垂直运动。

2. 发明申请

US20080057691A1 Methods and systems for selectively filling apertures in a substrate to form conductive vias with a liquid using a vacuum 有权
标题翻译：用于选择性地填充衬底中的孔以与使用真空的液体形成导电通孔的方法和系统
公开(公告)号：US20080057691A1
公开(公告)日：2008-03-06
申请号：US11511619
申请日：2006-08-29
申请人： Ross S. Dando , Steven Oliver , Swarnal Borthakur , Kevin Hutto
发明人： Ross S. Dando , Steven Oliver , Swarnal Borthakur , Kevin Hutto
IPC分类号： H01L21/44
CPC分类号： H01L21/76898 , H05K3/3468 , H05K2201/09572 , H05K2203/0763 , H05K2203/082
摘要： Methods of forming a conductive via in a substrate include contacting the substrate with a wave of conductive liquid material, such as molten solder, and drawing the liquid material into the aperture with a vacuum. The wave may be formed by flowing the liquid material out from an outlet in a direction generally against the gravitational field. The liquid material may be solidified to form an electrically conductive structure. A plurality of apertures may be selectively filled with the liquid material one at a time, and liquids having different compositions may be used to provide conductive vias having different compositions in the same substrate. Systems for forming conductive vias include a substrate fixture, a vacuum device having a vacuum fixture, and a solder dispensing device configured to provide a wave of molten solder material. Relative lateral and vertical movement is provided between the wave of molten solder and a substrate supported by the substrate fixture.
摘要翻译：在衬底中形成导电通孔的方法包括使衬底与诸如熔融焊料的导电液体材料的波接触，并且用真空将液体材料拉入孔中。该波浪可以通过使液体材料沿着通常抵靠重力场的方向从出口流出而形成。液体材料可以被固化以形成导电结构。可以一次一个地选择性地填充多个孔，并且可以使用具有不同组成的液体来在同一基底中提供具有不同组成的导电通孔。用于形成导电通孔的系统包括衬底夹具，具有真空夹具的真空装置以及被配置为提供熔融焊料材料波的焊料分配装置。在熔融焊料的波浪和由基板夹具支撑的基板之间提供相对的横向和垂直运动。

3. 发明申请

US20060275941A1 Methods for manufacturing microelectronic imagers 审中-公开
标题翻译：微电子成像仪的制造方法
公开(公告)号：US20060275941A1
公开(公告)日：2006-12-07
申请号：US11488848
申请日：2006-07-19
申请人： Steven Oliver , Jin Li , Ulrich Boettiger
发明人： Steven Oliver , Jin Li , Ulrich Boettiger
IPC分类号： H01L21/00
CPC分类号： H01L27/14618 , H01L27/14625 , H01L27/14634 , H01L27/14636 , H01L27/1464 , H01L2924/0002 , H01L2924/00
摘要： Microelectronic imagers with curved image sensors and methods for manufacturing curved image sensors. In one embodiment, a microelectronic imager device comprises an imager die having a substrate, a curved microelectronic image sensor having a face with a convex and/or concave portion at one side of the substrate, and integrated circuitry in the substrate operatively coupled to the image sensor. The imager die can further include external contacts electrically coupled to the integrated circuitry and a cover over the curved image sensor.
摘要翻译：具有弯曲图像传感器的微电子成像器和用于制造弯曲图像传感器的方法。在一个实施例中，微电子成像器装置包括具有基板的成像模具，具有在基板的一侧具有凸和/或凹部的表面的弯曲微电子图像传感器，以及可操作地耦合到图像的基板中的集成电路传感器。成像模具还可以包括电耦合到集成电路的外部触点和弯曲图像传感器上的盖。

4. 发明申请

US20070045632A1 Microelectronic imaging units and methods of manufacturing microelectronic imaging units at the wafer level 有权
标题翻译：微电子成像单元和在晶片级制造微电子成像单元的方法
公开(公告)号：US20070045632A1
公开(公告)日：2007-03-01
申请号：US11217877
申请日：2005-09-01
申请人： Steven Oliver , Lu Velicky , William Hiatt , David Hembree , Mark Tuttle , Sidney Rigg , James Wark , Warren Farnworth , Kyle Kirby
发明人： Steven Oliver , Lu Velicky , William Hiatt , David Hembree , Mark Tuttle , Sidney Rigg , James Wark , Warren Farnworth , Kyle Kirby
IPC分类号： H01L33/00
CPC分类号： H01L21/00 , H01L21/76898 , H01L23/552 , H01L27/14609 , H01L27/14618 , H01L27/14621 , H01L27/14623 , H01L27/14627 , H01L27/14632 , H01L27/14636 , H01L27/14685 , H01L27/14687 , H01L2924/0002 , H01L2924/00
摘要： Microelectronic imaging units and methods for manufacturing a plurality of imaging units at the wafer level are disclosed herein. In one embodiment, a method for manufacturing a plurality of imaging units includes providing an imager workpiece having a plurality of imaging dies including integrated circuits, external contacts electrically coupled to the integrated circuits, and image sensors operably coupled to the integrated circuits. The individual image sensors include at least one dark current pixel at a perimeter portion of the image sensor. The method includes depositing a cover layer onto the workpiece and over the image sensors. The method further includes patterning and selectively developing the cover layer to form discrete volumes of cover layer material over corresponding image sensors. The discrete volumes of cover layer material have sidewalls aligned with an inboard edge of the individual dark current pixels such that the dark current pixels are not covered by the discrete volumes.
摘要翻译：本文公开了用于在晶片级制造多个成像单元的微电子成像单元和方法。在一个实施例中，制造多个成像单元的方法包括提供具有多个成像管芯的成像工件，所述成像管芯包括集成电路，电耦合到集成电路的外部触点以及可操作地耦合到集成电路的图像传感器。各个图像传感器包括在图像传感器的周边部分处的至少一个暗电流像素。该方法包括将覆盖层沉积在工件上并在图像传感器上方。该方法还包括图案化和选择性地显影覆盖层以在对应的图像传感器上形成分离体积的覆盖层材料。覆盖层材料的离散体积具有与各个暗电流像素的内侧边缘对准的侧壁，使得暗电流像素不被离散体积覆盖。

5. 发明申请

US20060246869A1 Intelligent data network with power management capabilities 有权
公开(公告)号：US20060246869A1
公开(公告)日：2006-11-02
申请号：US11402182
申请日：2006-04-11
申请人： Norbert Ohlenbusch , Joseph Wronski , Paul Gaudet , Thomas Blackadar , Steven Oliver
发明人： Norbert Ohlenbusch , Joseph Wronski , Paul Gaudet , Thomas Blackadar , Steven Oliver
IPC分类号： H04B1/16 , H04B1/38 , H04M1/00
CPC分类号： H04W52/0248 , H04W4/80 , H04W74/04 , H04W84/00 , Y02D70/00 , Y02D70/144 , Y02D70/26
摘要： In one embodiment, a method for implementing two-way communication between at least first and second devices comprises steps of: (a1) during finite time periods following transmission of respective first messages from the first device to the second device, using the first device to listen for second messages transmitted from the second device to first device; and (a2) after each of the finite time periods following the transmission of the respective first messages from the first device to the second device, ceasing to use the first device to listen for second messages transmitted from the second device to the first device until after the first device transmits another first message to the second device. In another embodiment, a method for implementing two-way communication between at least first and second devices comprises steps of: (a1) during finite time periods following reception by the second device of respective first messages from the first device, using the second device to transmit second messages to the first device; and (a2) after each of the finite time periods following reception by the second device of respective first messages from the first device, ceasing to use the second device to transmit second messages to the first device until after the second device receives another first message from the first device.

6. 发明申请

US20060186492A1 Microelectronic imagers with shaped image sensors and methods for manufacturing microelectronic imagers 有权
标题翻译：具有成像图像传感器的微电子成像器和用于制造微电子成像器的方法
公开(公告)号：US20060186492A1
公开(公告)日：2006-08-24
申请号：US11061034
申请日：2005-02-18
申请人： Ulrich Boettiger , Jin Li , Steven Oliver
发明人： Ulrich Boettiger , Jin Li , Steven Oliver
IPC分类号： H01L21/00 , H01L29/82 , H01L27/14
CPC分类号： H01L27/14618 , H01L27/14601 , H01L27/14625 , H01L27/14634 , H01L27/14683 , H01L27/14685 , H01L2924/0002 , H01L2924/351 , H01L2924/00
摘要： Microelectronic imagers with shaped image sensors and methods for manufacturing curved image sensors. In one embodiment, a microelectronic imager device comprises an imaging die having a substrate, a curved microelectronic image sensor having a face with a convex and/or concave portion at one side of the substrate, and integrated circuitry in the substrate operatively coupled to the image sensor. The imaging die can further include external contacts electrically coupled to the integrated circuitry and a cover over the curved image sensor.
摘要翻译：具有形状图像传感器的微电子成像器和用于制造弯曲图像传感器的方法。在一个实施例中，微电子成像器件包括具有衬底的成像管芯，具有在衬底的一侧具有凸部和/或凹部的面的弯曲微电子图像传感器，以及可操作地耦合到图像的衬底中的集成电路传感器。成像芯片还可以包括电耦合到集成电路的外部触点和弯曲图像传感器上的盖。

7. 发明申请

US20110233777A1 THROUGH-WAFER INTERCONNECTS FOR PHOTOIMAGER AND MEMORY WAFERS 失效
标题翻译：用于光电子和存储器波形的通过波形互连
公开(公告)号：US20110233777A1
公开(公告)日：2011-09-29
申请号：US13154550
申请日：2011-06-07
申请人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
发明人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
IPC分类号： H01L23/498 , H01L23/48
CPC分类号： H01L21/76877 , H01L21/6835 , H01L21/76898 , H01L23/481 , H01L24/45 , H01L27/14634 , H01L27/14636 , H01L2221/6834 , H01L2224/02166 , H01L2224/0554 , H01L2224/05567 , H01L2224/05573 , H01L2224/16 , H01L2224/45144 , H01L2224/48463 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.
摘要翻译：公开了一种用于成像器，存储器和其他集成电路应用的透晶片互连，从而消除了对引线接合的需要，使得结合这种互连的器件可堆叠并且实现成像器件的晶片级封装。此外，实现了更小且更可靠的管芯封装，并且由于信号路径长度的减小，电路寄生（例如，L和R）被减小。

8. 发明申请

US20110136336A1 METHODS OF FORMING CONDUCTIVE VIAS 有权
标题翻译：形成导电VIAS的方法
公开(公告)号：US20110136336A1
公开(公告)日：2011-06-09
申请号：US13029950
申请日：2011-02-17
申请人： Salman Akram , William Mark Hiatt , Steven Oliver , Alan G. Wood , Sidney B. Rigg , James M. Wark , Kyle K. Kirby
发明人： Salman Akram , William Mark Hiatt , Steven Oliver , Alan G. Wood , Sidney B. Rigg , James M. Wark , Kyle K. Kirby
IPC分类号： H01L21/768
CPC分类号： H01L21/76898 , H01L23/481 , H01L2224/05001 , H01L2224/05009 , H01L2224/05568 , H01L2224/13009 , H01L2224/13025 , H01L2224/16 , H01L2224/16145 , H01L2224/17181 , H01L2924/09701
摘要： Methods of forming a conductive via may include forming a blind via hole partially through a substrate, forming an aluminum film on surfaces of the substrate, removing a first portion of the aluminum film from some surfaces, selectively depositing conductive material onto a second portion of the aluminum film, and exposing the blind via hole through a back side of the substrate. Methods of fabricating a conductive via may include forming at least one via hole through at least one unplated bond pad, forming a first adhesive over at least one surface of the at least one via hole, forming a dielectric over the first adhesive, forming a base layer over the dielectric and the at least one unplated bond pad, and plating nickel onto the base layer.
摘要翻译：形成导电通孔的方法可以包括部分地穿过衬底形成盲孔，在衬底的表面上形成铝膜，从一些表面去除铝膜的第一部分，将导电材料选择性地沉积到第二部分上铝膜，并且通过基板的背面露出盲孔。制造导电通孔的方法可以包括通过至少一个未镀覆的焊盘形成至少一个通孔，在至少一个通孔的至少一个表面上形成第一粘合剂，在第一粘合剂上形成电介质，形成基底层叠在电介质和至少一个未镀覆的焊盘上，并将镍镀在基底层上。

9. 发明申请

US20100041180A1 Methods of Forming Semiconductor Constructions and Assemblies 有权
标题翻译：形成半导体结构和组件的方法
公开(公告)号：US20100041180A1
公开(公告)日：2010-02-18
申请号：US12581586
申请日：2009-10-19
申请人： Steven Oliver , Warren M. Farnworth
发明人： Steven Oliver , Warren M. Farnworth
IPC分类号： H01L21/768 , H01L21/60
CPC分类号： H01L21/486 , H01L21/561 , H01L21/76898 , H01L23/3114 , H01L23/481 , H01L24/11 , H01L24/12 , H01L24/16 , H01L25/0657 , H01L25/50 , H01L2224/0231 , H01L2224/02372 , H01L2224/0401 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/0558 , H01L2224/056 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/06181 , H01L2224/13022 , H01L2224/1308 , H01L2224/13082 , H01L2224/131 , H01L2224/16235 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2225/06586 , H01L2924/00013 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04953 , H01L2224/13099 , H01L2224/29099 , H01L2924/00014 , H01L2924/01028 , H01L2924/013
摘要： The invention includes semiconductor assemblies having two or more dies. An exemplary assembly has circuitry associated with a first die front side electrically connected to circuitry associated with a second die front side. The front side of the second die is adjacent a back side of the first die, and a through wafer interconnect extends through the first die. The through wafer interconnect includes a conductive liner within a via extending through the first die. The conductive liner narrows the via, and the narrowed via is filled with insulative material. The invention also includes methods of forming semiconductor assemblies having two or more dies; and includes electronic systems containing assemblies with two or more dies.
摘要翻译：本发明包括具有两个或更多个管芯的半导体组件。示例性组件具有与第一管芯正面侧电连接到与第二管芯正面侧相关联的电路相关联的电路。第二管芯的前侧邻近第一管芯的背面，并且贯通晶片互连件延伸穿过第一管芯。贯通晶片互连包括穿过第一管芯的通孔内的导电衬垫。导电衬套使通孔变窄，并且变窄的通孔填充有绝缘材料。本发明还包括形成具有两个或更多个管芯的半导体组件的方法; 并且包括含有具有两个或更多个管芯的组件的电子系统。

10. 发明申请

US20070244329A1 Enantioselective Synthesis of 13-Oxotricyclo[8.2.1.0. 3,8] Trideca-3(8),4,6-Triene-5-Carboxylates 失效
标题翻译：对映选择性合成13-氧杂环[8.2.1.0。 3,8] Trideca-3（8），4,6-三烯-5-羧酸酯
公开(公告)号：US20070244329A1
公开(公告)日：2007-10-18
申请号：US11660334
申请日：2005-08-17
申请人： Stephen Keen , Steven Oliver , Gavin Stewart
发明人： Stephen Keen , Steven Oliver , Gavin Stewart
IPC分类号： C07D417/06 , C07C69/78 , C07D307/93 , C07D413/06
CPC分类号： C07C67/327 , C07C2603/80 , C07C69/76
摘要： An enantioselective route to compounds of formula I is disclosed: The compounds of formula I are key intermediates in the synthesis of compounds useful in treatment of Alzhemer's disease.
摘要翻译：公开了对式I化合物的对映选择性途径：式I化合物是合成可用于治疗阿尔茨海默病的化合物的关键中间体。

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