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1. 发明授权

US07838436B2 Bottom electrode for MRAM device and method to fabricate it 有权
标题翻译：用于MRAM设备的底电极及其制造方法
公开(公告)号：US07838436B2
公开(公告)日：2010-11-23
申请号：US11528877
申请日：2006-09-28
申请人： Rongfu Xiao , Cheng T. Horng , Ru-Ying Tong , Chyu-Jinh Torng , Tom Zhong , Witold Kula , Terry Kin Ting Ko , Wei Cao , Wai-Ming J. Kan , Liubo Hong
发明人： Rongfu Xiao , Cheng T. Horng , Ru-Ying Tong , Chyu-Jinh Torng , Tom Zhong , Witold Kula , Terry Kin Ting Ko , Wei Cao , Wai-Ming J. Kan , Liubo Hong
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L43/12 , G11C11/161 , H01L43/08
摘要： Formation of a bottom electrode for an MTJ device on a silicon nitride substrate is facilitated by including a layer of ruthenium near the silicon nitride surface. The ruthenium is a good electrical conductor and it responds differently from Ta and TaN to certain etchants. Adhesion to SiN is enhanced by using a TaN/NiCr bilayer as “glue”. Thus, said included layer of ruthenium may be used as an etch stop layer during the etching of Ta and/or TaN while the latter materials may be used to form a hard mask for etching the ruthenium without significant corrosion of the silicon nitride surface.
摘要翻译：通过在氮化硅表面附近包括一层钌来促进在氮化硅衬底上形成用于MTJ器件的底部电极。钌是良好的电导体，并且它对Ta和TaN的反应与某些蚀刻剂不同。通过使用TaN / NiCr双层作为“胶”来增强对SiN的附着力。因此，所述包含的钌层可以在蚀刻Ta和/或TaN期间用作蚀刻停止层，而后者可用于形成用于蚀刻钌的硬掩模，而不会对氮化硅表面产生显着的腐蚀。

2. 发明申请

US20110133300A1 Bottom electrode for MRAM device 有权
标题翻译： MRAM器件底电极
公开(公告)号：US20110133300A1
公开(公告)日：2011-06-09
申请号：US12927670
申请日：2010-11-19
申请人： Rongfu Xiao , Cheng T. Horng , Ru-Ying Tong , Chyu-Jinh Torng , Tom Zhong , Witold Kula , Terry Kin Ting Ko , Wei Cao , Wai-Ming J. Kan , Liubo Hong
发明人： Rongfu Xiao , Cheng T. Horng , Ru-Ying Tong , Chyu-Jinh Torng , Tom Zhong , Witold Kula , Terry Kin Ting Ko , Wei Cao , Wai-Ming J. Kan , Liubo Hong
IPC分类号： H01L29/82
CPC分类号： H01L43/12 , G11C11/161 , H01L43/08
摘要： A multi-layered bottom electrode for an MTJ device on a silicon nitride substrate is described. It comprises a bilayer of alpha tantalum on ruthenium which in turn lies on a nickel chrome layer over a second tantalum layer.
摘要翻译：描述了用于氮化硅衬底上的MTJ器件的多层底电极。它包括在钌上的α钽的双层，其又位于第二钽层上的镍铬层上。

3. 发明申请

US20110076785A1 Process to fabricate bottom electrode for MRAM device 有权
标题翻译：制造MRAM器件底电极的工艺
公开(公告)号：US20110076785A1
公开(公告)日：2011-03-31
申请号：US12927615
申请日：2010-11-19
申请人： Rongfu Xiao , Cheng T. Horng , Ru-Ying Tong , Chyu-Jinh Torng , Tom Zhong , Witold Kula , Terry Kin Ting Ko , Wei Cao , Wai-Ming J. Kan , Liubo Hong
发明人： Rongfu Xiao , Cheng T. Horng , Ru-Ying Tong , Chyu-Jinh Torng , Tom Zhong , Witold Kula , Terry Kin Ting Ko , Wei Cao , Wai-Ming J. Kan , Liubo Hong
IPC分类号： H01L21/00
CPC分类号： H01L43/12 , G11C11/161 , H01L43/08
摘要： Formation of a bottom electrode for an MTJ device on a silicon nitride substrate is facilitated by including a protective coating that is partly consumed during etching of the alpha tantalum portion of said bottom electrode. Adhesion to SiN is enhanced by using a TaN/NiCr bilayer as “glue”.
摘要翻译：在氮化硅衬底上形成用于MTJ器件的底部电极通过包括在所述底部电极的α钽部分的蚀刻期间部分消耗的保护涂层来促进。通过使用TaN / NiCr双层作为“胶”来增强对SiN的附着力。

4. 发明授权

US08969982B2 Bottom electrode for MRAM device 有权
标题翻译： MRAM器件底电极
公开(公告)号：US08969982B2
公开(公告)日：2015-03-03
申请号：US12927670
申请日：2010-11-19
申请人： Rongfu Xiao , Cheng T. Horng , Ru-Ying Tong , Chyu-Jinh Torng , Tom Zhong , Witold Kula , Terry Kin Ting Ko , Wei Cao , Wai-Ming J. Kan , Liubo Hong
发明人： Rongfu Xiao , Cheng T. Horng , Ru-Ying Tong , Chyu-Jinh Torng , Tom Zhong , Witold Kula , Terry Kin Ting Ko , Wei Cao , Wai-Ming J. Kan , Liubo Hong
IPC分类号： H01L29/82 , H01L43/12 , H01L43/08
CPC分类号： H01L43/12 , G11C11/161 , H01L43/08
摘要： A multi-layered bottom electrode for an MTJ device on a silicon nitride substrate is described. It comprises a bilayer of alpha tantalum on ruthenium which in turn lies on a nickel chrome layer over a second tantalum layer.
摘要翻译：描述了用于氮化硅衬底上的MTJ器件的多层底电极。它包括在钌上的α钽的双层，其又位于第二钽层上的镍铬层上。

5. 发明授权

US08273666B2 Process to fabricate bottom electrode for MRAM device 有权
标题翻译：制造MRAM器件底电极的工艺
公开(公告)号：US08273666B2
公开(公告)日：2012-09-25
申请号：US12927615
申请日：2010-11-19
申请人： Rongfu Xiao , Cheng T. Horng , Ru-Ying Tong , Chyu-Jinh Torng , Tom Zhong , Witold Kula , Terry Kin Ting Ko , Wei Cao , Wai-Ming J. Kan , Liubo Hong
发明人： Rongfu Xiao , Cheng T. Horng , Ru-Ying Tong , Chyu-Jinh Torng , Tom Zhong , Witold Kula , Terry Kin Ting Ko , Wei Cao , Wai-Ming J. Kan , Liubo Hong
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L43/12 , G11C11/161 , H01L43/08
摘要： Formation of a bottom electrode for an MTJ device on a silicon nitride substrate is facilitated by including a protective coating that is partly consumed during etching of the alpha tantalum portion of said bottom electrode. Adhesion to SiN is enhanced by using a TaN/NiCr bilayer as “glue”.
摘要翻译：在氮化硅衬底上形成用于MTJ器件的底部电极通过包括在所述底部电极的α钽部分的蚀刻期间部分消耗的保护涂层来促进。通过使用TaN / NiCr双层作为“胶”来增强对SiN的附着力。

6. 发明申请

US20080090307A1 Bottom electrode for MRAM device and method to fabricate it 有权
标题翻译：用于MRAM设备的底电极及其制造方法
公开(公告)号：US20080090307A1
公开(公告)日：2008-04-17
申请号：US11528877
申请日：2006-09-28
申请人： Rongfu Xiao , Cheng T. Horng , Ru-Ying Tong , Chyu-Jinh Torng , Tom Zhong , Witold Kula , Terry Kin Ting Ko , Wei Cao , Wai-Ming J. Kan , Liubo Hong
发明人： Rongfu Xiao , Cheng T. Horng , Ru-Ying Tong , Chyu-Jinh Torng , Tom Zhong , Witold Kula , Terry Kin Ting Ko , Wei Cao , Wai-Ming J. Kan , Liubo Hong
IPC分类号： H01L21/00
CPC分类号： H01L43/12 , G11C11/161 , H01L43/08
摘要： Formation of a bottom electrode for an MTJ device on a silicon nitride substrate is facilitated by including a layer of ruthenium near the silicon nitride surface. The ruthenium is a good electrical conductor and it responds differently from Ta and TaN to certain etchants. Adhesion to SiN is enhanced by using a TaN/NiCr bilayer as “glue”. Thus, said included layer of ruthenium may be used as an etch stop layer during the etching of Ta and/or TaN while the latter materials may be used to form a hard mask for etching the ruthenium without significant corrosion of the silicon nitride surface.
摘要翻译：通过在氮化硅表面附近包括一层钌来促进在氮化硅衬底上形成用于MTJ器件的底部电极。钌是良好的电导体，并且它对Ta和TaN的反应与某些蚀刻剂不同。通过使用TaN / NiCr双层作为“胶”来增强对SiN的附着力。因此，所述包含的钌层可以在蚀刻Ta和/或TaN期间用作蚀刻停止层，而后者可用于形成用于蚀刻钌的硬掩模，而不会对氮化硅表面产生显着的腐蚀。

7. 发明授权

US08786036B2 Magnetic tunnel junction for MRAM applications 有权
标题翻译：用于MRAM应用的磁隧道结
公开(公告)号：US08786036B2
公开(公告)日：2014-07-22
申请号：US12930877
申请日：2011-01-19
申请人： Wei Cao , Cheng T. Horng , Witold Kula , Chyu Jiuh Torng
发明人： Wei Cao , Cheng T. Horng , Witold Kula , Chyu Jiuh Torng
IPC分类号： H01L43/10 , H01L27/22
CPC分类号： H01L43/10 , G11C11/161 , H01L27/222 , H01L43/00 , H01L43/02 , H01L43/08
摘要： A MTJ in an MRAM array is disclosed with a composite free layer having a lower crystalline layer contacting a tunnel barrier and an upper amorphous NiFeX layer for improved bit switching performance. The crystalline layer is Fe, Ni, or FEB with a thickness of at least 6 Angstroms which affords a high magnetoresistive ratio. The X element in the NiFeX layer is Mg, Hf, Zr, Nb, or Ta with a content of 5 to 30 atomic % NiFeX thickness is preferably between 20 to 40 Angstroms to substantially reduce bit line switching current and number of shorted bits. In an alternative embodiments, the crystalline layer may be a Fe/NiFe bilayer. Optionally, the amorphous layer may have a NiFeM1/NiFeM2 configuration where M1 and M2 are Mg, Hf, Zr, Nb, or Ta, and M1 is unequal to M2. Annealing at 300° C. to 360° C. provides a high magnetoresistive ratio of about 150%.
摘要翻译：公开了具有接触隧道势垒的较低结晶层和上部非晶NiFeX层的复合自由层的MRAM阵列中的MTJ，用于改善位切换性能。结晶层是厚度至少为6埃的Fe，Ni或FEB，其具有高的磁阻比。 NiFeX层中的X元素为含有5〜30原子％NiFeX厚度的Mg，Hf，Zr，Nb或Ta优选为20〜40埃，以显着降低位线切换电流和短路位数。在替代实施例中，结晶层可以是Fe / NiFe双层。可选地，非晶层可以具有其中M1和M2是Mg，Hf，Zr，Nb或Ta的NiFeM1 / NiFeM2构型，M1不等于M2。在300℃至360℃退火，提供约150％的高磁阻比。

8. 发明申请

US20120181537A1 Magnetic Tunnel Junction for MRAM applications 有权
标题翻译： MRAM应用的磁隧道结
公开(公告)号：US20120181537A1
公开(公告)日：2012-07-19
申请号：US12930877
申请日：2011-01-19
申请人： Wei Cao , Cheng T. Horng , Witold Kula , Chyu Jiuh Torng
发明人： Wei Cao , Cheng T. Horng , Witold Kula , Chyu Jiuh Torng
IPC分类号： H01L29/82 , H01L21/36 , H01L29/04
CPC分类号： H01L43/10 , G11C11/161 , H01L27/222 , H01L43/00 , H01L43/02 , H01L43/08
摘要： A MTJ in an MRAM array is disclosed with a composite free layer having a lower crystalline layer contacting a tunnel barrier and an upper amorphous NiFeX layer for improved bit switching performance. The crystalline layer is Fe, Ni, or FeB with a thickness of at least 6 Angstroms which affords a high magnetoresistive ratio. The X element in the NiFeX layer is Mg, Hf, Zr, Nb, or Ta with a content of 5 to 30 atomic %. NiFeX thickness is preferably between 20 to 40 Angstroms to substantially reduce bit line switching current and number of shorted bits. In an alternative embodiment, the crystalline layer may be a Fe/NiFe bilayer. Optionally, the amorphous layer may have a NiFeM1/NiFeM2 configuration where M1 and M2 are Mg, Hf, Zr, Nb, or Ta, and M1 is unequal to M2. Annealing at 300° C. to 360° C. provides a high magnetoresistive ratio of about 150%.
摘要翻译：公开了具有接触隧道势垒的较低结晶层和上部非晶NiFeX层的复合自由层的MRAM阵列中的MTJ，用于改善位切换性能。结晶层是厚度至少为6埃的Fe，Ni或FeB，其具有高的磁阻比。 NiFeX层中的X元素为含有5〜30原子％的Mg，Hf，Zr，Nb或Ta。 NiFeX厚度优选在20至40埃之间，以显着减少位线切换电流和短路位数。在替代实施例中，结晶层可以是Fe / NiFe双层。可选地，非晶层可以具有其中M1和M2是Mg，Hf，Zr，Nb或Ta的NiFeM1 / NiFeM2构型，M1不等于M2。在300℃至360℃退火，提供约150％的高磁阻比。

9. 发明授权

US09159908B2 Composite free layer within magnetic tunnel junction for MRAM applications 有权
标题翻译：用于MRAM应用的磁性隧道结内的复合自由层
公开(公告)号：US09159908B2
公开(公告)日：2015-10-13
申请号：US13068222
申请日：2011-05-05
申请人： Wei Cao , Witold Kula
发明人： Wei Cao , Witold Kula
IPC分类号： H01L43/10 , H01L43/08 , G11C11/16 , H01L43/12 , H01F41/30 , B82Y40/00 , H01F10/187 , H01F10/32
CPC分类号： H01L43/10 , B82Y40/00 , G11C11/161 , H01F10/187 , H01F10/3254 , H01F10/3272 , H01F10/3295 , H01F41/303 , H01L43/08 , H01L43/12
摘要： A magnetic tunneling junction (MTJ) in an MRAM array is disclosed with a composite free layer having a FL1/FL2/FL3 configuration where FL1 and FL2 are crystalline magnetic layers and FL3 is an amorphous NiFeX layer for improved bit switching performance. FL1 layer is CoFe which affords a high magnetoresistive (MR) ratio when forming an interface with a MgO tunnel barrier. FL2 is Fe to improve switching performance. NiFeX thickness where X is Hf is preferably between 20 to 40 Angstroms to substantially reduce bit line switching current and number of shorted bits. Annealing at 330° C. to 360° C. provides a high MR ratio of 190%. Furthermore, low Hc and Hk are simultaneously achieved with improved bit switching performance and fewer shorts without compromising other MTJ properties such as MR ratio. As a result of high MR ratio and lower bit-to-bit resistance variation, higher reading margin is realized.
摘要翻译：公开了一种具有FL1 / FL2 / FL3配置的复合自由层的MRAM阵列中的磁隧道结（MTJ），其中FL1和FL2是结晶磁性层，FL3是非晶NiFeX层，用于改善位切换性能。 FL1层是当与MgO隧道势垒形成界面时提供高磁阻（MR）比的CoFe。 FL2是Fe提高开关性能。其中X为Hf的NiFeX厚度优选在20至40埃之间，以显着降低位线切换电流和短路位数。在330℃至360℃退火提供190％的高MR比。此外，低Hc和Hk同时实现，具有改进的位切换性能和更短的短路，而不会影响其他MTJ特性，例如MR比。由于高MR比和较低的比特电阻变化，实现了更高的读取余量。

10. 发明授权

US08492169B2 Magnetic tunnel junction for MRAM applications 有权
标题翻译：用于MRAM应用的磁隧道结
公开(公告)号：US08492169B2
公开(公告)日：2013-07-23
申请号：US13136929
申请日：2011-08-15
申请人： Wei Cao , Witold Kula , Chyu-Jiuh Torng
发明人： Wei Cao , Witold Kula , Chyu-Jiuh Torng
IPC分类号： H01L29/82 , H01L29/88 , G11C11/02
CPC分类号： H01L43/10 , B82Y40/00 , H01F10/3272 , H01F10/3295 , H01F41/307 , H01L43/12
摘要： Reading margin is improved in a MTJ designed for MRAM applications by employing a pinned layer with an AP2/Ru/AP1 configuration wherein the AP1 layer is a CoFeB/CoFe composite and by forming a MgO tunnel barrier adjacent to the CoFe AP1 layer by a sequence that involves depositing and oxidizing a first Mg layer with a radical oxidation (ROX) process, depositing and oxidizing a second Mg layer with a ROX method, and depositing a third Mg layer on the oxidized second Mg layer. The third Mg layer becomes oxidized during a subsequent anneal. MTJ performance may be further improved by selecting a composite free layer having a Fe/NiFeHf or CoFe/Fe/NiFeHf configuration where the NiFeHf layer adjoins a capping layer in a bottom spin valve configuration. As a result, read margin is optimized simultaneously with improved MR ratio, a reduction in bit line switching current, and a lower number of shorted bits.
摘要翻译：通过采用具有AP2 / Ru / AP1配置的钉扎层，其中AP1层是CoFeB / CoFe复合材料并且通过顺序形成与CoFe AP1层相邻的MgO隧道势垒，为MRAM应用设计的MTJ中的读取余量得到改善其包括用自由基氧化（ROX）工艺沉积和氧化第一Mg层，用ROX法沉积和氧化第二Mg层，以及在氧化的第二Mg层上沉积第三Mg层。在随后的退火中，第三Mg层变成氧化的。通过选择具有Fe / NiFeHf或CoFe / Fe / NiFeHf构型的复合自由层，其中NiFeHf层与底部自旋阀结构中的覆盖层邻接，可以进一步改善MTJ性能。结果，读取余量同时优化了MR比，降低了位线切换电流，并且更少的短路位数。

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