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    • 1. 发明授权
    • Method and apparatus for using across wafer back pressure differentials to influence the performance of chemical mechanical polishing
    • 用于跨晶片背压差的方法和装置,以影响化学机械抛光的性能
    • US06531397B1
    • 2003-03-11
    • US09005364
    • 1998-01-09
    • Ronald J. NagaharaDawn M. Lee
    • Ronald J. NagaharaDawn M. Lee
    • H01L21302
    • B24B37/30
    • Methods and apparatus for planarizing the surface of a semiconductor wafer by applying non-uniform pressure distributions across the back side of the wafer are disclosed. According to one aspect of the present invention, a chemical mechanical polishing apparatus for polishing a first surface of a semiconductor wafer includes a polishing pad which polishes the first surface of the semiconductor wafer. The apparatus also includes a first mechanism which is used to hold, or otherwise support, the wafer during polishing, and a second mechanism that is used to apply a non-uniform pressure distribution through the first mechanism, directly onto a second surface of the wafer. The second mechanism is further used to facilitate polishing the first surface of the semiconductor wafer such that the first surface of the semiconductor wafer is evenly polished. In one embodiment, the second mechanism is arranged to apply both positive pressure and negative pressure substantially simultaneously across the second surface of the semiconductor wafer.
    • 公开了通过在晶片的背面施加不均匀的压力分布来平坦化半导体晶片的表面的方法和装置。 根据本发明的一个方面,一种用于抛光半导体晶片的第一表面的化学机械抛光装置包括:抛光衬垫,其抛光半导体晶片的第一表面。 该装置还包括用于在抛光期间保持或以其他方式支撑晶片的第一机构,以及用于将非均匀压力分布通过第一机构施加到第二机构的第二机构,直接施加到晶片的第二表面上 。 第二机构还用于促进对半导体晶片的第一表面进行抛光,使得半导体晶片的第一表面被均匀地抛光。 在一个实施例中,第二机构被布置成在半导体晶片的第二表面上基本上同时施加正压和负压。
    • 4. 发明授权
    • Polishing pad surface for improved process control
    • 抛光垫表面,用于改进过程控制
    • US06168508A
    • 2001-01-02
    • US08918293
    • 1997-08-25
    • Ronald J. NagaharaDawn M. Lee
    • Ronald J. NagaharaDawn M. Lee
    • B24D1100
    • B24B37/24B24B37/26
    • A polishing pad for chemical-mechanical polishing of an integrated circuit surface is described. The polishing pad includes a first polishing area having a first value of a physical property; and a second polishing area having a second value of said physical property, which said second value is different from the first value, such that during chemical-mechanical polishing of an integrated circuit surface, the integrated circuit rotates and oscillates on the polishing pad so that a substantial portion of the integrated circuit surface contacts both the first and second polishing areas, wherein a width of said first and second polishing areas is greater than about 40 mils.
    • 描述了用于集成电路表面的化学机械抛光的抛光垫。 抛光垫包括具有物理性质的第一值的第一抛光区域; 以及具有所述物理性质的第二值的第二抛光区域,所述第二值不同于第一值,使得在集成电路表面的化学机械抛光期间,集成电路在抛光垫上旋转并振荡,使得 集成电路表面的大部分接触第一和第二抛光区域,其中所述第一和第二抛光区域的宽度大于约40密耳。
    • 5. 发明授权
    • Effective pad conditioning
    • 有效垫调节
    • US6106371A
    • 2000-08-22
    • US961383
    • 1997-10-30
    • Ronald J. NagaharaDawn M. Lee
    • Ronald J. NagaharaDawn M. Lee
    • B24B37/26B24B53/007B24B53/017B24D13/14B24B1/00
    • B24B37/26B24B53/017B24D13/14
    • An end effector to facilitate conditioning a surface of a polishing pad used in chemical-mechanical polishing of a substrate surface is described. The end effector includes an inwardly recessing contact surface capable of attaching to a conditioning disk having a conditioning surface such that the conditioning surface conforms to a substantial portion of the polishing pad, which protrudes outwardly under operation and thereby effectively conditions a substantial portion of the polishing pad. The present invention also describes a conditioning disk for effectively conditioning a surface of a polishing pad used in chemical-mechanical polishing of a substrate surface. The conditioning disk includes (i) a second surface capable of attaching to a contact surface of an end effector and (ii) an inwardly recessing conditioning surface that conforms to a substantial portion of said polishing pad, which protrudes outwardly under operation, and thereby effectively conditions the polishing pad. Processes and a chemical-mechanical polishing apparatuses employing the inventive end effectors or conditioning disks are also described.
    • 描述了一种端部执行器,以便于调节用于衬底表面的化学机械抛光的抛光垫的表面。 末端执行器包括向内凹入的接触表面,其能够附接到具有调节表面的调节盘,使得调节表面符合抛光垫的大部分,其在操作下向外突出,从而有效地调节抛光的大部分 垫。 本发明还描述了一种用于有效调节用于衬底表面的化学机械抛光的抛光垫的表面的调节盘。 调节盘包括(i)能够附接到端部执行器的接触表面的第二表面和(ii)符合在操作中向外突出的所述抛光垫的大部分的向内凹陷的调节表面,从而有效地 调节抛光垫。 还描述了采用本发明的末端效应器或调节盘的方法和化学机械抛光装置。
    • 7. 发明授权
    • Process for forming planarized isolation trench in integrated circuit structure on semiconductor substrate
    • 在半导体衬底上形成集成电路结构中的平面化隔离沟槽的工艺
    • US06607967B1
    • 2003-08-19
    • US09714000
    • 2000-11-15
    • Jayanthi PallintiDawn M. LeeRonald J. Nagahara
    • Jayanthi PallintiDawn M. LeeRonald J. Nagahara
    • H01L2176
    • H01L21/76229H01L21/31053
    • A process is disclosed for planarizing a semiconductor substrate after filling isolation trenches in the substrate with dielectric material wherein the respective thicknesses of a liner layer of dielectric material blanket deposited over the upper surface of the substrate and in the trenches, and/or a filler layer of dielectric material blanket deposited over the liner layer to fill the trenches, may not be uniform. The planarization process include: removing portions of the filler layer over the liner layer on the upper surface of the substrate until portions of the underlying liner layer on the upper surface of the substrate are exposed; treating the exposed portions of the liner layer to inhibit removal of the exposed liner layer portions; continuing to remove the remainder of the filler layer on the liner layer over the upper surface of the substrate until all of the underlying liner layer on the upper surface of the substrate is exposed; and then removing the liner layer over the upper surface of the substrate and over the filler layer in the trenches until all of the liner layer is removed from the upper surface of the substrate; whereby removal of all of the filler layer on the liner layer over the upper surface of the substrate, while inhibiting removal of the liner layer over the upper surface of the substrate until such filler layer removal on the liner layer over the upper surface of the substrate is completed, will result in formation of a planarized surface on the upper surface of the substrate, and the upper surfaces of the filler layer and the liner layer in the trenches.
    • 公开了一种用于在用介电材料填充衬底中的隔离沟槽之后对半导体衬底进行平面化的工艺,其中介电材料的衬垫层的相应厚度沉积在衬底的上表面和沟槽中,和/或填充层 沉积在衬层上以填充沟槽的介电材料毯可能不均匀。 平坦化工艺包括:在衬底的上表面上的衬垫层上去除填料层的部分,直到衬底的上表面上的下层衬垫层的部分露出; 处理衬里层的暴露部分以阻止暴露的衬垫层部分的去除; 继续在衬底的上表面上去除衬垫层上的填充层的剩余部分,直到衬底的上表面上的所有下面的衬垫层露出; 然后在衬底的上表面上并在沟槽中的填料层上除去衬垫层,直到衬底的所有层从衬底的上表面去除; 从而在衬底的上表面上去除衬垫层上的所有填料层,同时抑制衬底层在衬底的上表面上的移除,直到衬底上的填料层在衬底的上表面上移除 将导致在基板的上表面上形成平坦化的表面,并且在沟槽中形成填料层和衬垫层的上表面。
    • 8. 发明授权
    • Method and apparatus for using across wafer back pressure differentials to influence the performance of chemical mechanical polishing
    • 用于跨晶片背压差的方法和装置,以影响化学机械抛光的性能
    • US06179956B2
    • 2001-01-30
    • US09442078
    • 1999-11-16
    • Ronald J. NagaharaDawn M. Lee
    • Ronald J. NagaharaDawn M. Lee
    • C23F102
    • B24B37/30
    • Methods and apparatus for planarizing the surface of a semiconductor wafer by applying non-uniform pressure distributions across the back side of the wafer are disclosed. According to one aspect of the present invention, a chemical mechanical polishing apparatus for polishing a first surface of a semiconductor wafer includes a polishing pad which polishes the first surface of the semiconductor wafer. The apparatus also includes a first mechanism which is used to hold, or otherwise support, the wafer during polishing, and a second mechanism that is used to apply a non-uniform pressure distribution through the first mechanism, directly onto a second surface of the wafer. The second mechanism is further used to facilitate polishing the first surface of the semiconductor wafer such that the first surface of the semiconductor wafer is evenly polished. In one embodiment, the second mechanism is arranged to apply both positive pressure and negative pressure substantially simultaneously across the second surface of the semiconductor wafer.
    • 公开了通过在晶片的背面施加不均匀的压力分布来平坦化半导体晶片的表面的方法和装置。 根据本发明的一个方面,一种用于抛光半导体晶片的第一表面的化学机械抛光装置包括:抛光衬垫,其抛光半导体晶片的第一表面。 该装置还包括用于在抛光期间保持或以其他方式支撑晶片的第一机构,以及用于将非均匀压力分布通过第一机构施加到第二机构的第二机构,直接施加到晶片的第二表面上 。 第二机构还用于促进对半导体晶片的第一表面进行抛光,使得半导体晶片的第一表面被均匀地抛光。 在一个实施例中,第二机构被布置成在半导体晶片的第二表面上基本上同时施加正压和负压。
    • 9. 发明授权
    • Modified carrier films to produce more uniformly polished substrate
surfaces
    • 改进的载体膜以产生更均匀地抛光的基底表面
    • US6074288A
    • 2000-06-13
    • US961382
    • 1997-10-30
    • Ronald J. NagaharaDawn M. Lee
    • Ronald J. NagaharaDawn M. Lee
    • B24B13/005B24B37/30B24B41/06
    • B24B37/30B24B13/005
    • A substrate holder assembly for forming a substantially uniformly polished substrate surface during chemical-mechanical polishing is described. The substrate holder assembly includes a carrier film having: (A) a porous layer with (i) a first surface with an outwardly protruding dome shaped region that applies pressure on at least a portion of the substrate surface during chemical-mechanical polishing and a location of the protruding dome shape is aligned with a location of an area of substrate surface that is likely to be underpolished, (ii) a second surface facing a contact surface of a backing plate; and (B) a pressure sensitive adhesive backing layer for affixing the carrier film to the contact surface of the backing plate under sufficient pressure.
    • 描述了用于在化学机械抛光期间形成基本均匀抛光的衬底表面的衬底保持器组件。 衬底保持器组件包括载体膜,其具有:(A)多孔层,其具有(i)具有向外突出的拱形区域的第一表面,其在化学机械抛光期间在基底表面的至少一部分上施加压力,并且位置 突出的圆顶形状与可能被抛光的基底表面的区域的位置对准,(ii)面对背板的接触表面的第二表面; 和(B)压敏粘合剂背衬层,用于在足够的压力下将载体膜附着到背板的接触表面。