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1. 发明授权

US4785264A Dual FET oscillator 失效
标题翻译：双FET振荡器
公开(公告)号：US4785264A
公开(公告)日：1988-11-15
申请号：US55206
申请日：1987-05-28
申请人： Robert S. Kaltenecker , Robert E. Stengel , Ralph T. Enderby , James S. Irwin
发明人： Robert S. Kaltenecker , Robert E. Stengel , Ralph T. Enderby , James S. Irwin
IPC分类号： H03B5/12
CPC分类号： H03B5/1203 , H03B5/1228 , H03B2200/0008 , H03B2200/0032
摘要： A dual FET oscillator includes a first J-FET and a second J-FET connected to it as a source follower. A turned circuit is connected to the gate of the first J-FET and to the second J-FET. Bias voltage is supplied to both J-FET's. Schottky diodes are connected to both J-FET's to limit gate-source voltage.
摘要翻译：双FET振荡器包括第一J-FET和连接到其的源极跟随器的第二J-FET。开路电路连接到第一J-FET的栅极和第二J-FET。两个J-FET都提供偏置电压。肖特基二极管连接到两个J-FET，以限制栅源电压。

2. 发明授权

US4785263A FET oscillator circuit 失效
标题翻译： FET振荡电路
公开(公告)号：US4785263A
公开(公告)日：1988-11-15
申请号：US55207
申请日：1987-05-28
申请人： Robert S. Kaltenecker , Robert E. Stengel , Ralph T. Enderby , James S. Irwin
发明人： Robert S. Kaltenecker , Robert E. Stengel , Ralph T. Enderby , James S. Irwin
IPC分类号： H03B5/12 , H03B5/00
CPC分类号： H03B5/1228 , H03B5/1203 , H03B5/1243 , H03B2200/0008 , H03B2200/0032
摘要： A Ga As FET oscillator includes an FET having gate-drain and source connections. A tuned circuit is connected to the FET gate. Bias voltage is supplied to the FET. A parallel-connected resistor and capacitor is connected to the FET source. A Schottky diode is connected across the FET gate-source junction and the parallel connected resistor and capacitor, with its anode connected to the FET gate and its cathode connected to the resistor and capacitor. The Schottky diode limits the positive voltage across the gate-source junction of the Ga As FET to prevent gate-source current flow.
摘要翻译： GaAs FET振荡器包括具有栅极 - 漏极和源极连接的FET。调谐电路连接到FET门。偏置电压被提供给FET。并联电阻和电容连接到FET源。肖特基二极管连接在FET栅极 - 源极结和并联的电阻和电容之间，其阳极连接到FET栅极，其阴极连接到电阻和电容。肖特基二极管限制Ga As FET栅极 - 源极结两端的正电压，以防止栅极 - 源极电流流动。

3. 发明授权

US07395206B1 Systems and methods for managing and building directed dialogue portal applications 有权
标题翻译：用于管理和构建定向对话门户应用程序的系统和方法
公开(公告)号：US07395206B1
公开(公告)日：2008-07-01
申请号：US11036032
申请日：2005-01-14
申请人： James S. Irwin , Alan Weiman , Owen Simon Dallaway
发明人： James S. Irwin , Alan Weiman , Owen Simon Dallaway
IPC分类号： G01L11/00
CPC分类号： G10L15/26
摘要： A directed dialogue portal system management scheme is disclosed, providing a manager application layer over portal system managed applications. The manager application layer may include a global grammar (e.g., the grammar of each managed application) and each managed application may inherit behaviors of the manager application. Responses to prompts received by a first managed application that are unrecognized or are directed to a second managed application are sent to the manager application. The manager application sends the response to the second application. The scheme is transparent to the user and, from the user's perspective, a user is able to directly access any application or services in a directed dialogue portal system from other locations in the system.
摘要翻译：公开了一种定向对话门户系统管理方案，通过门户系统管理的应用程序提供一个管理应用层。管理器应用层可以包括全局语法（例如，每个被管理应用的语法），并且每个被管理的应用可以继承管理器应用的行为。对第一被管理应用程序接收到的无法识别或被引导到第二个被管理应用程序的提示的响应被发送到管理应用程序。经理应用程序将响应发送到第二个应用程序。该方案对于用户是透明的，并且从用户的角度来看，用户能够直接访问来自系统中其他位置的定向对话门户系统中的任何应用或服务。

4. 发明授权

US5484138A Consumable form with adjustable walls 失效
标题翻译：带可调节墙面的消耗品
公开(公告)号：US5484138A
公开(公告)日：1996-01-16
申请号：US308755
申请日：1994-09-19
申请人： Madjid Soofi , James S. Irwin , Charles W. Connors, Jr.
发明人： Madjid Soofi , James S. Irwin , Charles W. Connors, Jr.
IPC分类号： B22D41/02 , C21B7/14 , F27D1/16 , F27D3/00 , C21B7/04
CPC分类号： F27D1/1626 , B22D41/023 , C21B7/14 , F27D2003/0001 , Y10S266/01
摘要： An adjustable form used for forming or repairing a refractory lining includes an adjustable frame constructed from a plurality of intersecting beams, at least some of which are adjustable, and a form connected to the adjustable frame. The frame can be adjusted in at least one direction and, preferably, in more than one direction. By properly adjusting the frame, the adjustable form can be used to form a refractory lining in different metal containment devices varying in dimensions, and can also be used to repair existing refractory linings. The adjustable form is inserted into a metal containment device at a distance from the floor and walls of the metal containment device, and refractory material is poured into the space between the adjustable form and the metal containment device.
摘要翻译：用于形成或修复耐火衬里的可调节形式包括由多个相交梁构成的可调节框架，其中至少一些是可调节的，以及连接到可调节框架的形式。框架可以在至少一个方向上，优选地在多于一个方向上进行调节。通过适当地调节框架，可调节形式可用于在不同尺寸的不同金属容纳装置中形成耐火衬里，并且还可用于修复现有的耐火衬里。将可调节形式插入到金属容纳装置的距离金属容纳装置的地板和墙壁一定距离处的金属容纳装置中，并且耐火材料被倒入可调节形式和金属容纳装置之间的空间中。

5. 发明授权

US5323157A Sigma-delta digital-to-analog converter with reduced noise 失效
标题翻译：具有降低噪声的Sigma-delta数模转换器
公开(公告)号：US5323157A
公开(公告)日：1994-06-21
申请号：US004816
申请日：1993-01-15
申请人： Robert C. Ledzius , James S. Irwin
发明人： Robert C. Ledzius , James S. Irwin
IPC分类号： H03M3/02 , H03M7/00
CPC分类号： H03M3/504
摘要： A sigma-delta digital-to-analog converter (DAC) (40) receives oversampled input data representative of an analog signal. The data may be optionally interpolated to a higher rate in a interpolator (41). A noise-shaping sigma-delta modulator (42) is connected to the output of the interpolator (41). The output of the modulator (42) is provided to a finite impulse response (FIR) filter (43). The FIR filter (43) has a frequency response characteristic which reduces the shaped noise and aliased components. This noise has a tendency to intermodulate back into the DAC's passband. The FIR filter (43) uses a series of flip-flops (81, 82, 83) functioning as delay elements with well-controlled timing edges. The outputs of the flip-flops (81, 82, 83) control current sources (91, 92, 93) weighted according to corresponding filter coefficients. The outputs of the current sources (91, 92, 93) are then summed in a summing device such as an amplifier (101).
摘要翻译： Σ-Δ数模转换器（DAC）（40）接收代表模拟信号的过采样输入数据。可以在内插器（41）中可选地将数据内插到更高的速率。噪声整形Σ-Δ调制器（42）连接到内插器（41）的输出端。调制器（42）的输出被提供给有限脉冲响应（FIR）滤波器（43）。 FIR滤波器（43）具有降低成形噪声和混叠分量的频率响应特性。该噪声具有互调回DAC通带的趋势。 FIR滤波器（43）使用一系列用作具有良好控制的时序边缘的延迟元件的触发器（81,82,83）。触发器（81,82,83）的输出控制根据相应的滤波器系数加权的电流源（91,92,93）。然后将电流源（91,92,93）的输出在诸如放大器（101）的求和装置中相加。

6. 发明授权

US5231395A Sigma-delta digital-to-analog converter with reduced distortion 失效
标题翻译：具有减小失真的Sigma-delta数模转换器
公开(公告)号：US5231395A
公开(公告)日：1993-07-27
申请号：US860540
申请日：1992-03-30
申请人： James S. Irwin , Robert C. Ledzius , Dhirajlal N. Manvar
发明人： James S. Irwin , Robert C. Ledzius , Dhirajlal N. Manvar
IPC分类号： H03M3/02
CPC分类号： H03M3/34 , H03M3/356 , H03M3/50
摘要： A sigma-delta digital-to-analog converter (20) reduces even order distortion, such as a DC offset, in an output signal by chopping the output signal alternately with set and reset pulses. The sigma-delta digital-to-analog converter (20) includes a sigma-delta modulator (25), a chop circuit (261) associated with a corresponding bit of the sigma-delta modulator (25), and an output buffer (264) for providing the output signal. The chop circuit (261) alternately inserts first and second logic levels into an output data stream of the sigma-delta modulator (25) before providing it to the output buffer (264). Even-order distortion is eliminated with only a tolerable attenuation of the output signal.
摘要翻译： Σ-Δ数模转换器（20）通过用设置和复位脉冲交替地切断输出信号来减少输出信号中的偶数阶失真，例如DC偏移。 Σ-Δ数模转换器（20）包括Σ-Δ调制器（25），与Σ-Δ调制器（25）的相应位相关联的斩波电路（261）和输出缓冲器（264））用于提供输出信号。斩波电路（261）在将其提供给输出缓冲器（264）之前交替地将第一和第二逻辑电平插入到Σ-Δ调制器（25）的输出数据流中。只有输出信号的容忍衰减才能消除偶数阶失真。

7. 发明授权

US07024348B1 Dialogue flow interpreter development tool 有权
公开(公告)号：US07024348B1
公开(公告)日：2006-04-04
申请号：US09702224
申请日：2000-10-31
申请人： Karl Wilmer Scholz , James S. Irwin , Samir Tamri
发明人： Karl Wilmer Scholz , James S. Irwin , Samir Tamri
IPC分类号： G06F9/455 , G10L15/04
CPC分类号： G06F8/38 , G10L2015/228
摘要： A computer software product is used to create applications for enabling a dialogue between a human and a computer. The software product provides a programming tool that insulates software developers from time-consuming, technically-challenging programming tasks by enabling the developer to specify generalized instructions to a Dialogue Flow Interpreter, which invokes functions to implement a speech application, automatically populating a library with dialogue objects that are available to other applications. The speech applications created through the DFI may be implemented as COM (component object model) objects, and so the applications can be easily integrated into a variety of different platforms. In addition, “translator” object classes are provided to handle specific types of data, such as currency, numeric data, dates, times, string variables, etc. These translator object classes have utility either as part of the DFI library or as a sub-library separate from dialogue implementation.

8. 发明授权

US5795508A Method of lining a blast furnace 失效
标题翻译：高炉内衬方法
公开(公告)号：US5795508A
公开(公告)日：1998-08-18
申请号：US650221
申请日：1996-05-20
申请人： Madjid Soofi , James S. Irwin
发明人： Madjid Soofi , James S. Irwin
IPC分类号： B22D41/02 , C21B7/06 , C21C5/44 , F27B1/14 , F27D1/16 , F27D3/14 , F27D99/00
CPC分类号： C21B7/06 , B22D41/023 , F27D1/1626 , C21C5/44 , F27B1/14 , F27D2001/1631 , F27D3/145 , F27D99/0033
摘要： A method for lining a blast furnace or other metallurgical vessel in stages uses a plurality of porous consumable forms and a pumpable casting composition. A form member, including a rigid support frame and a porous consumable form mounted thereto, is installed in a lower portion of the vessel being lined, and is spaced from the vessel wall. Casting composition is then pumped into the space between the consumable form and the vessel wall, and is permitted to harden. Then, another form member is positioned above the first, and casting composition is pumped into the space between the second form member and the vessel wall. This process is repeated, using stacked form members, until the refractory lining is completely installed.
摘要翻译：分段高炉或其他冶金容器衬里的方法使用多个多孔易消耗形式和可泵送的铸造组合物。包括刚性支撑框架和安装在其上的多孔易消耗形式的模板构件安装在被衬里的容器的下部中，并与容器壁间隔开。然后将铸造组合物泵入可消耗形式和容器壁之间的空间中，并允许其硬化。然后，另一个形式构件位于第一个上方，并且将铸造组合物泵送到第二成形构件和容器壁之间的空间中。重复该过程，使用堆叠的形式构件，直到耐火衬里完全安装。

9. 发明授权

US5357252A Sigma-delta modulator with improved tone rejection and method therefor 失效
标题翻译：具有改进的色调抑制的Sigma-delta调制器及其方法
公开(公告)号：US5357252A
公开(公告)日：1994-10-18
申请号：US34967
申请日：1993-03-22
申请人： Robert C. Ledzius , James S. Irwin
发明人： Robert C. Ledzius , James S. Irwin
IPC分类号： H03M3/02 , H03M3/00
CPC分类号： H03M3/344 , H03M3/358 , H03M3/43 , H03M3/454 , H03M3/458 , H03M3/50
摘要： A sigma-delta modulator (50, 100) attenuates a frequency domain characteristic of a feedback signal to a first stage (60) of the modulator (50, 100) near f.sub.s /2, where f.sub.s is the modulator's (50, 100) clock frequency. The modulator (50, 100) thus virtually eliminates in-band tones which are characteristic of known sigma-delta modulators, without complex dithering schemes. In one embodiment, the sigma-delta modulator (50, 100) includes a two-tap finite impulse response (FIR) filter (80) within a feedback loop of the modulator (50, 100). The two-tap FIR filter (80) smoothes transitions at an output of a second stage (70) to provide the feedback signal to the first stage (60). This architecture is useful for either a digital-to-analog sigma-delta modulator (50) or an analog-to-digital sigma-delta modulator (100).
摘要翻译： Σ-Δ调制器（50,100）将反馈信号的频域特性衰减到靠近fs / 2的调制器（50,100）的第一级（60），其中fs是调制器（50,100）时钟频率。因此，调制器（50,100）实际上消除了已知的Σ-Δ调制器的特征的带内音调，没有复杂的抖动方案。在一个实施例中，Σ-Δ调制器（50,100）包括在调制器（50,100）的反馈回路内的二抽头有限脉冲响应（FIR）滤波器（80）。二抽头FIR滤波器（80）在第二级（70）的输出端平滑转换，以将反馈信号提供给第一级（60）。该架构对于数模转换Σ-Δ调制器（50）或模拟 - 数字Σ-Δ调制器（100）是有用的。

10. 发明授权

US5122799A Multi-modulator digital-to-analog converter 失效
标题翻译：多调制器数模转换器
公开(公告)号：US5122799A
公开(公告)日：1992-06-16
申请号：US632772
申请日：1990-12-24
申请人： Robert C. Ledzius , James S. Irwin
发明人： Robert C. Ledzius , James S. Irwin
IPC分类号： H03M3/04
CPC分类号： H03M3/50
摘要： A digital signal having a plurality of bits is apportioned by the DAC into a plurality of words, at least one of which has a plurality of bits. Each of the plurality of words is then processed in an energy signal producing means, such as a .SIGMA.-.DELTA. modulator, to produce an output energy signal whose time average represents the input digital word portion. The energy output signals are then summed to provide the analog signal.
摘要翻译：具有多个位的数字信号由DAC分配成多个字，其中至少一个具有多个位。然后在诸如SIGMA-DELTA调制器的能量信号产生装置中对多个单词中的每一个进行处理，以产生其时间平均表示输入数字字部分的输出能量信号。然后将能量输出信号相加以提供模拟信号。

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