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    • 5. 发明授权
    • Filtering a read signal to attenuate secondary pulses caused by pole
tips of a thin film magnetic read head
    • 滤除读取信号以衰减由薄膜磁头读取头的极尖引起的次脉冲
    • US5623377A
    • 1997-04-22
    • US222666
    • 1994-04-04
    • Richard T. BehrensNeal GloverTrent O. DudleyAlan J. ArmstrongChristopher P. ZookWilliam G. Bliss
    • Richard T. BehrensNeal GloverTrent O. DudleyAlan J. ArmstrongChristopher P. ZookWilliam G. Bliss
    • G11B5/09G11B20/10H03H17/02H03H17/06H04B3/06G11B5/035
    • H03H17/06G11B20/10009G11B5/09H03H17/02
    • A filter for compensating discrete secondary pulse formations associated with a data stream of discrete main pulses produced from data read from magnetic media. The filter's impulse response comprises a center coefficient with side compensating coefficients for attenuating the secondary pulses when the input signal is convolved with the impulse response. The magnitude and delay of the compensation coefficients are programmable and are adaptively adjusted to optimize the impulse response for a given environment. In a traditional FIR embodiment, two delay lines are used to generate the two programmable delays between the center coefficient and side compensation coefficients. In the preferred embodiment, an IIR filter provides the two programmable delays using only one delay line thereby reducing the size and cost of the circuit. Also in the preferred embodiment, the data stream is interleaved into an even and odd data stream and processed in parallel by two filters in order to double the throughput. Further, the pre-cursor correcting portion of the filter can be disabled in order to avoid delaying the data stream while still canceling the post-cursor secondary pulses. The filter also comprises attenuation and adder means to match the coincident sample values in amplitude and add them to substantially eliminate the effect of the secondary pulses in the discrete data stream.
    • 用于补偿与从磁介质读取的数据产生的离散主脉冲的数据流相关联的离散次级脉冲形成的滤波器。 滤波器的脉冲响应包括具有侧补偿系数的中心系数,用于当输入信号与脉冲响应卷积时衰减次级脉冲。 补偿系数的幅度和延迟可编程,并进行自适应调整,以优化给定环境的脉冲响应。 在传统的FIR实施例中,使用两条延迟线来产生中心系数和侧面补偿系数之间的两个可编程延迟。 在优选实施例中,IIR滤波器仅使用一个延迟线提供两个可编程延迟,从而减小电路的尺寸和成本。 同样在优选实施例中,数据流被交织成偶数和奇数数据流,并且由两个滤波器并行处理,以使吞吐量翻倍。 此外,可以禁用滤波器的前光标校正部分,以避免在仍然取消后光标次级脉冲的同时延迟数据流。 滤波器还包括衰减和加法器装置,以使幅度上重合的采样值相匹配,并将它们相加,以基本上消除离散数据流中次级脉冲的影响。
    • 8. 发明授权
    • Method and apparatus for calibrating an analog filter in a sampled
amplitude read channel
    • 用于校准采样振幅读通道中的模拟滤波器的方法和装置
    • US5903857A
    • 1999-05-11
    • US751832
    • 1996-11-18
    • Richard T. BehrensTyson TuttleKent D. AndersonTrent O. DudleyWilliam G. Bliss
    • Richard T. BehrensTyson TuttleKent D. AndersonTrent O. DudleyWilliam G. Bliss
    • G11B20/10G06F17/10G11B5/035
    • G11B20/10055G11B20/10009G11B20/10037G11B20/10481
    • A method and apparatus for calibrating an analog equalizer in a sampled amplitude read channel is disclosed wherein the filter's frequency response is measured and calibrated directly. This is accomplished by injecting a known periodic signal into the analog filter and measuring a spectrum value at a predetermined frequency. The filter parameters are adjusted accordingly until the spectrum reaches a predetermined target value. In the preferred embodiment, the analog filter comprises at least one second order low pass filter (referred to as a biquad filter), and the filter's spectrum is adjusted relative to the well known parameters f.sub.o and Q. Specifically, the parameters f.sub.o and Q are optimized relative to a power measurement at predetermined harmonics of the input signal. In this manner, the present invention enables auto-calibration of the analog equalizer without reading any data from the disc. Furthermore, the calibration process can be executed during the storage system's normal operation without significantly degrading its overall performance.
    • 公开了一种用于校准采样振幅读通道中的模拟均衡器的方法和装置,其中滤波器的频率响应被直接测量和校准。 这是通过将已知的周期信号注入模拟滤波器并以预定频率测量频谱值来实现的。 相应地调整滤波器参数,直到频谱达到预定的目标值。 在优选实施例中,模拟滤波器包括至少一个二阶低通滤波器(称为双二阶滤波器),并且相对于众所周知的参数fo和Q调节滤波器的频谱。具体地,参数fo和Q是 相对于输入信号的预定谐波处的功率测量而优化。 以这种方式,本发明能够在不从盘读取任何数据的情况下自动校准模拟均衡器。 此外,可以在存储系统的正常操作期间执行校准过程,而不会显着降低其整体性能。
    • 9. 发明授权
    • Sampled amplitude read channel employing early-decisions from a trellis sequence detector for sampling value estimation
    • 采样幅度读取信道采用来自网格序列检测器的早期判决来进行采样值估计
    • US06246723B1
    • 2001-06-12
    • US09072285
    • 1998-05-04
    • William G. BlissDavid E. ReedMarvin L. VisGerman S. Feyh
    • William G. BlissDavid E. ReedMarvin L. VisGerman S. Feyh
    • H04L512
    • G11B20/10009G11B20/10055H03M13/3961H03M13/41H03M13/6331H03M13/6343H04L1/0054
    • A sampled amplitude read channel is disclosed for disc storage systems that extracts early-decisions from a discrete-time trellis sequence detector to generate estimated target values for use in decision-directed timing recovery, gain control, and adaptive equalization. The trellis sequence detector comprises a metric generator for generating error metrics corresponding to a plurality of states of a state transition diagram, and a plurality of path memories which correspond to the paths of a trellis. The path memories store a plurality of survivor sequences which eventually merge into a most likely sequence at the output of the path memories. To reduce the latency in generating the estimated target samples, the trellis sequence detector outputs an early-decision from an intermediate location within the path memories. The early-decision is then converted into the partial response signaling space of the read signal samples. To improve the accuracy in estimating the target sample values, the accumulated metrics of a predetermined number of states are compared and the early-decision value is selected from the path memory having the smallest error metric. Alternatively, a majority-vote circuit evaluates the intermediate values stored in a predetermined number of the path memories and outputs the intermediate value that occurs most frequently. Although the early-decision technique of the present invention requires more latency than a simple slicer circuit, during acquisition the estimated target sample values are not used and therefore the increase in latency is not a significant problem.
    • 公开了用于从离散时间网格序列检测器提取早期决定以产生用于决策定时恢复,增益控制和自适应均衡的估计目标值的盘存储系统的采样幅度读取信道。 网格序列检测器包括用于产生与状态转移图的多个状态相对应的误差度量的度量发生器,以及对应于网格的路径的多个路径存储器。 路径存储器存储多个幸存者序列,其最终在路径存储器的输出处合并成最可能的序列。 为了减少生成估计的目标样本的延迟,网格序列检测器从路径存储器内的中间位置输出早期决定。 然后将早期决定转换为读取信号样本的部分响应信令空间。 为了提高估计目标采样值的准确性,比较预定数量状态的累积度量,并从具有最小误差度量的路径存储器中选择早期判定值。 或者,多数投票电路评估存储在预定数量的路径存储器中的中间值,并输出最频繁出现的中间值。 虽然本发明的早期决策技术比简单的限幅器电路需要更多的延迟,但在采集期间,不使用估计的目标采样值,因此等待时间的增加不是一个显着的问题。