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1. 发明授权

US06208481B1 Gain and phase constrained adaptive equalizing filter in a sampled amplitude read channel for magnetic recording 有权
标题翻译：用于磁记录的采样振幅读通道中的增益和相位约束自适应均衡滤波器
公开(公告)号：US06208481B1
公开(公告)日：2001-03-27
申请号：US09342167
申请日：1999-06-28
申请人： Mark S. Spurbeck , Li Du , Trent O. Dudley , William G. Bliss , German S. Feyh , Richard T. Behrens
发明人： Mark S. Spurbeck , Li Du , Trent O. Dudley , William G. Bliss , German S. Feyh , Richard T. Behrens
IPC分类号： G11B5035
CPC分类号： G11B20/10055 , G11B5/012 , G11B5/035 , G11B5/09 , G11B20/10009 , G11B20/10037 , G11B20/1403 , H04L7/0029 , H04L7/0062
摘要： A sampled amplitude read channel for magnetic disk recording which asynchronously samples the analog read signal, adaptively equalizes the resulting discrete time sample values according to a target partial response, extracts synchronous sample values through interpolated timing recovery, and detects digital data from the synchronous sample values using a Viterbi sequence detector is disclosed. To minimize interference from the timing and gain control loops, the phase and magnitude response of the adaptive equalizer filter are constrained at a predetermined frequency using an optimal orthogonal projection operation as a modification to a least mean square (LMS) adaptation algorithm. Further, with interpolated timing recovery, the equalizer filter and its associated latency are removed from the timing recovery loop, thereby allowing a higher order discrete time filter and a lower order analog filter.
摘要翻译：用于磁盘记录的采样幅度读取通道，其异步采样模拟读取信号，根据目标部分响应对所得离散时间采样值进行自适应均衡，通过内插定时恢复提取同步采样值，并从同步采样值检测数字数据公开了使用维特比序列检测器。为了最小化来自定时和增益控制环路的干扰，使用最佳正交投影操作将自适应均衡器滤波器的相位和幅度响应约束在预定频率，作为对最小均方（LMS）适配算法的修改。此外，通过内插定时恢复，均衡器滤波器及其相关等待时间从定时恢复环路中移除，从而允许较高阶离散时间滤波器和较低阶模拟滤波器。

2. 发明授权

US06246723B1 Sampled amplitude read channel employing early-decisions from a trellis sequence detector for sampling value estimation 失效
标题翻译：采样幅度读取信道采用来自网格序列检测器的早期判决来进行采样值估计
公开(公告)号：US06246723B1
公开(公告)日：2001-06-12
申请号：US09072285
申请日：1998-05-04
申请人： William G. Bliss , David E. Reed , Marvin L. Vis , German S. Feyh
发明人： William G. Bliss , David E. Reed , Marvin L. Vis , German S. Feyh
IPC分类号： H04L512
CPC分类号： G11B20/10009 , G11B20/10055 , H03M13/3961 , H03M13/41 , H03M13/6331 , H03M13/6343 , H04L1/0054
摘要： A sampled amplitude read channel is disclosed for disc storage systems that extracts early-decisions from a discrete-time trellis sequence detector to generate estimated target values for use in decision-directed timing recovery, gain control, and adaptive equalization. The trellis sequence detector comprises a metric generator for generating error metrics corresponding to a plurality of states of a state transition diagram, and a plurality of path memories which correspond to the paths of a trellis. The path memories store a plurality of survivor sequences which eventually merge into a most likely sequence at the output of the path memories. To reduce the latency in generating the estimated target samples, the trellis sequence detector outputs an early-decision from an intermediate location within the path memories. The early-decision is then converted into the partial response signaling space of the read signal samples. To improve the accuracy in estimating the target sample values, the accumulated metrics of a predetermined number of states are compared and the early-decision value is selected from the path memory having the smallest error metric. Alternatively, a majority-vote circuit evaluates the intermediate values stored in a predetermined number of the path memories and outputs the intermediate value that occurs most frequently. Although the early-decision technique of the present invention requires more latency than a simple slicer circuit, during acquisition the estimated target sample values are not used and therefore the increase in latency is not a significant problem.
摘要翻译：公开了用于从离散时间网格序列检测器提取早期决定以产生用于决策定时恢复，增益控制和自适应均衡的估计目标值的盘存储系统的采样幅度读取信道。网格序列检测器包括用于产生与状态转移图的多个状态相对应的误差度量的度量发生器，以及对应于网格的路径的多个路径存储器。路径存储器存储多个幸存者序列，其最终在路径存储器的输出处合并成最可能的序列。为了减少生成估计的目标样本的延迟，网格序列检测器从路径存储器内的中间位置输出早期决定。然后将早期决定转换为读取信号样本的部分响应信令空间。为了提高估计目标采样值的准确性，比较预定数量状态的累积度量，并从具有最小误差度量的路径存储器中选择早期判定值。或者，多数投票电路评估存储在预定数量的路径存储器中的中间值，并输出最频繁出现的中间值。虽然本发明的早期决策技术比简单的限幅器电路需要更多的延迟，但在采集期间，不使用估计的目标采样值，因此等待时间的增加不是一个显着的问题。

3. 发明授权

US6141169A System and method for control of low frequency input levels to an amplifier and compensation of input offsets of the amplifier 失效
标题翻译：用于控制放大器的低频输入电平的系统和方法以及放大器的输入偏移的补偿
公开(公告)号：US6141169A
公开(公告)日：2000-10-31
申请号：US956569
申请日：1997-10-23
申请人： David M. Pietruszynski , Jerrell P. Hein , William G. Bliss , German S. Feyh
发明人： David M. Pietruszynski , Jerrell P. Hein , William G. Bliss , German S. Feyh
IPC分类号： G11B5/00 , G11B5/09 , G11B7/09 , G11B20/10 , H03F1/30 , H03F3/45 , G11B5/02
CPC分类号： H03F3/45748 , G11B20/10009 , H03F1/303 , H03F3/45973 , G11B2005/0013 , G11B5/09 , G11B7/0941 , G11B7/0948
摘要： A system and method for an amplifier control circuit is provided which does not require the use of a large off-chip or on-chip capacitor for achieving a low frequency coupling corner, while still effectively allowing AC coupling the data detection circuit. In addition, the input offset voltage to the amplifier may be compensated and the inherent random low frequency input voltages provided to the amplifier may be controlled or canceled. Further, the amplifier control circuitry includes a freeze capability which allows the control circuitry to halt all updates to the input offset/low frequency control circuit when the voltage input signal is interrupted. In addition low frequency control and offset compensation updates may be performed without causing large output signal glitches so that the integrity of the received signal will not be compromised. In a preferred embodiment the system and method may be utilized for data detection circuits utilized in conjunction with optical disks.
摘要翻译：提供一种用于放大器控制电路的系统和方法，其不需要使用大的片外或片上电容器来实现低频耦合角，同时仍然有效地允许AC耦合数据检测电路。此外，可以补偿放大器的输入失调电压，并且可以控制或取消提供给放大器的固有的随机低频输入电压。此外，放大器控制电路包括冻结能力，其允许控制电路在电压输入信号中断时停止对输入偏移/低频控制电路的所有更新。此外，可以执行低频控制和偏移补偿更新，而不会导致大的输出信号毛刺，从而不会损害接收信号的完整性。在优选实施例中，系统和方法可以用于与光盘结合使用的数据检测电路。

4. 发明授权

US07167327B2 Integrated circuit and method for remodulating bits and hard disk drive incorporating the same 有权
标题翻译：用于重新调制位的集成电路和方法以及包含其的硬盘驱动器
公开(公告)号：US07167327B2
公开(公告)日：2007-01-23
申请号：US10337071
申请日：2003-01-06
申请人： German S. Feyh
发明人： German S. Feyh
IPC分类号： G11B5/09
CPC分类号： G11B20/1403 , G11B5/09 , G11B20/10203 , G11B20/10296 , G11B20/18
摘要： A remodulator embodied in an integrated circuit (IC), a method for remodulating bits and a controller and disk drive incorporating the IC or the method. In one embodiment, the IC includes: (1) a remodulator that processes incoming bits to yield remodulated outgoing bits, the remodulator including a selected one of a decision feedback loop and an error feedback loop and (2) a feedforward loop coupled to an input of the remodulator and having a baseline wander filter, the baseline wander filter cooperating with the selected one of the decision feedback loop and the error feedback loop to reduce a bit error rate of the remodulated outgoing bits.
摘要翻译：集成电路（IC）中实现的再调制器，重新调制位的方法以及包含IC或方法的控制器和磁盘驱动器。在一个实施例中，IC包括：（1）再调制器，其处理输入位以产生再调制的输出比特，所述重调制器包括判定反馈回路和误差反馈回路中选择的一个，以及（2）耦合到输入的前馈回路的重调制器并且具有基线漂移滤波器，基线漂移滤波器与所选择的判决反馈环路和误差反馈回路协作以减少重新调制的输出位的误码率。

5. 发明授权

US6157604A Sampled amplitude read channel employing a baud rate estimator for digital timing recovery in an optical disk storage device 失效
标题翻译：采用波特率估计器的采样幅度读取通道用于光盘存储设备中的数字定时恢复
公开(公告)号：US6157604A
公开(公告)日：2000-12-05
申请号：US80559
申请日：1998-05-18
申请人： German S. Feyh , Jim Graba , William G. Bliss
发明人： German S. Feyh , Jim Graba , William G. Bliss
IPC分类号： G11B20/14 , G11B27/30 , H03L7/091 , H03M13/41 , H04N5/85 , H04N5/76
CPC分类号： G11B20/10037 , G11B20/10055 , G11B20/10296 , G11B20/1403 , G11B27/3027 , H03L7/091 , H03M13/41 , H03M13/6331 , H03M13/6505 , H03M13/6563 , H03M13/6569 , H04N5/85 , G11B2020/10916 , G11B2220/2545 , G11B2220/2562
摘要： A sampled amplitude read channel for optical disk storage systems is disclosed comprising an all digital timing recovery circuit. The RF read signal from the read head is sampled asynchronous to the baud rate and the asynchronous sample values are interpolated to generate sample values that are substantially synchronous to the baud rate. A data detector, such as a Viterbi sequence detector, processes the synchronous sample values to generate an estimated binary sequence representing the recorded binary sequence. The timing recovery circuit comprises a baud rate estimator for estimating the baud rate relative to the sampling rate, wherein the estimated baud rate is used to initialize a timing recovery loop filter at the end of seek operations. The all digital timing recovery circuit and baud rate estimator enable the storage device to begin reading the user data immediately after a seek operation, rather than wait for the CLV servo loop to acquire the target spindle speed.
摘要翻译：公开了一种用于光盘存储系统的采样幅度读取通道，其包括全数字定时恢复电路。来自读取头的RF读取信号与波特率异步采样，并且内插异步采样值以产生与波特率基本同步的采样值。诸如维特比序列检测器的数据检测器处理同步采样值以产生表示记录的二进制序列的估计二进制序列。定时恢复电路包括用于估计相对于采样率的波特率的波特率估计器，其中所估计的波特率用于在搜索操作结束时初始化定时恢复环路滤波器。全数字定时恢复电路和波特率估计器使存储设备能够在搜索操作之后立即开始读取用户数据，而不是等待CLV伺服循环获取目标主轴转速。

6. 发明授权

US5696639A Sampled amplitude read channel employing interpolated timing recovery 失效
标题翻译：采用内插时序恢复的采样幅度读取通道
公开(公告)号：US5696639A
公开(公告)日：1997-12-09
申请号：US440508
申请日：1995-05-12
申请人： Mark S. Spurbeck , Richard T. Behrens , German S. Feyh
发明人： Mark S. Spurbeck , Richard T. Behrens , German S. Feyh
IPC分类号： G11B20/10 , G11B20/12 , G11B20/14 , H04L7/02 , H04L7/04 , C11B5/09
CPC分类号： G11B20/10009 , G11B20/10037 , G11B20/10055 , G11B20/1403 , H04L7/0029 , G11B20/1258 , H04L2007/047 , H04L7/04
摘要： A sampled amplitude read channel for reading information stored on a magnetic medium by detecting digital data from a sequence of discrete time interpolated sample values, the interpolated sample values generated by interpolating a sequence of discrete time channel sample values generated by sampling pulses in an analog read signal from a magnetic read head positioned over the magnetic medium. A write VFO generates a write clock for writing digital data to the magnetic medium at a predetermined baud rate for a selected zone, and upon read back, the write VFO generates a sampling clock at a frequency slightly higher than the write frequency. A sampling device samples the analog read signal at the sampling clock rate to generate a sequence of discrete time channel samples that are not synchronized to the baud rate. The channel samples are equalized by a discrete time equalizing filter according to a predetermined partial response (PR4, EPR4, EEPR4, etc.). An interpolating timing recovery circuit, responsive to the equalized channel samples, computes an interpolation interval .tau. and, in response thereto, generates interpolated sample values substantially synchronized to the baud rate. The timing recovery circuit also generates a data clock for clocking a discrete time sequence detector for detecting the digital data from the interpolated sample values.
摘要翻译：一种采样振幅读通道，用于通过从离散时间内插样本值序列中检测数字数据来读取存储在磁介质上的信息，该内插样本值是通过内插由模拟读取中的采样脉冲产生的离散时间通道采样值序列而产生的来自位于磁介质上的磁读头的信号。写入VFO产生写入时钟，用于以预定的波特率为所选区域将数字数据写入磁介质，并且在读回时，写入VFO以略高于写入频率的频率产生采样时钟。采样设备以采样时钟速率对模拟读取信号进行采样，以产生不与波特率同步的离散时间通道采样序列。信道样本根据预定的部分响应（PR4，EPR4，EEPR4等）由离散时间均衡滤波器进行均衡。内插定时恢复电路响应于均衡信道采样，计算内插间隔τ，并且响应于此产生基本上与波特率同步的内插采样值。定时恢复电路还产生用于对离散时间序列检测器进行计时的数据时钟，用于从内插样本值检测数字数据。

7. 发明授权

US6111710A Asynchronous/synchronous gain control for interpolated timing recovery in a sampled amplitude read channel 失效
标题翻译：采样振幅读通道内插定时恢复的异步/同步增益控制
公开(公告)号：US6111710A
公开(公告)日：2000-08-29
申请号：US882473
申请日：1997-06-25
申请人： German S. Feyh , Sian She , William G. Bliss
发明人： German S. Feyh , Sian She , William G. Bliss
IPC分类号： G11B5/012 , G11B5/09 , G11B20/10 , G11B20/14 , G11B5/035
CPC分类号： G11B20/10055 , G11B20/10009 , G11B20/10037 , G11B20/1426 , G11B5/012 , G11B5/09
摘要： A sampled amplitude read channel is disclosed for reading data recorded on a disk storage medium by asynchronously sampling an analog read signal, equalizing the asynchronous sample values according to a desired partial response, and interpolating the equalized sample values to generate synchronous sample values substantially synchronized to a baud rate of the recorded data. The read channel further comprises a gain control circuit which generates a gain error for adjusting the amplitude of the analog read signal to a nominal value through a variable gain amplifier (VGA). During acquisition, the gain error is computed from the asynchronous sample values at the output of the sampling device in order to avoid the delay associated with the discrete equalizer filter and the timing recovery interpolation filter. This decreases the acquisition time and the corresponding length of the acquisition preamble, thereby reserving more area on the disk to record user data. After acquisition and while tracking the random user data, the gain control loop is reconfigured to generate the gain error according to using the synchronous, interpolated sample values output by the timing recovery circuit.
摘要翻译：公开了采样幅度读通道，用于通过异步采样模拟读取信号来读取记录在磁盘存储介质上的数据，根据期望的部分响应对异步采样值进行均衡，并内插均衡的采样值，以生成基本上与记录数据的波特率。读通道还包括增益控制电路，其产生用于通过可变增益放大器（VGA）将模拟读取信号的幅度调整到标称值的增益误差。在采集期间，从采样设备输出端的异步采样值计算增益误差，以避免与离散均衡滤波器和定时恢复插值滤波器相关的延迟。这降低了采集前导码的采集时间和相应长度，从而在磁盘上保留更多的区域来记录用户数据。在采集并跟踪随机用户数据之后，根据定时恢复电路输出的同步内插采样值重新配置增益控制环以产生增益误差。

8. 发明授权

US6038091A Magnetic disk drive read channel with digital thermal asperity detector 失效
标题翻译：磁盘驱动器读取通道，带数字式热凹凸检测器
公开(公告)号：US6038091A
公开(公告)日：2000-03-14
申请号：US944224
申请日：1997-10-06
申请人： David E. Reed , William G. Bliss , German S. Feyh
发明人： David E. Reed , William G. Bliss , German S. Feyh
IPC分类号： G11B5/012 , G11B5/02 , G11B5/09 , G11B20/10 , G11B20/24 , G11B27/36 , G11B5/035 , G11B15/12
CPC分类号： G11B20/10203 , G11B20/10009 , G11B20/10037 , G11B20/24 , G11B27/36 , G11B5/012 , G11B5/09 , G11B5/6076
摘要： A thermal asperity-tolerant read channel is provided for a magnetic disk drive. Thermal asperities are detected by a digital detector which includes a pre-filter, a first threshold comparator and, optionally, a second threshold comparator. The pre-filter reduces noise and signal variation in the analog-to-digital converter output to enable better detection of a DC shift caused by a thermal asperity. The first threshold comparator compares the pre-filter output to a predetermined level; if the predetermined level is exceeded, the comparator output is set to one state, providing an initial indication of the presence of a thermal asperity. The optional second threshold comparator determines whether, out of a predetermined number of comparator outputs, the number in the one state exceeds programmed value; if so, the second threshold comparator outputs a final indication of the presence of a thermal asperity. In such a manner, accurate detection of thermal asperities is enhanced while reducing the likelihood of false detection. When a thermal asperity is detected, one or more of the following features can be activated to reduce the adverse effects of the thermal asperity: a squelch connected to the inputs of the variable gain amplifier; a loop-hold feature to maintain channel parameters such as timing, offset and gain until the effects of the thermal asperity have dissipated; and a user data erasure pointer to flag data which has been corrupted by the thermal asperity and which needs to be corrected by ECC circuitry.
摘要翻译：为磁盘驱动器提供耐热耐读读通道。数字检测器检测热不均匀性，数字检测器包括预滤波器，第一阈值比较器和可选地第二阈值比较器。预滤波器可减少模数转换器输出中的噪声和信号变化，从而更好地检测由热不均匀性引起的直流偏移。第一阈值比较器将预滤波器输出与预定电平进行比较; 如果超过预定电平，则将比较器输出设置为一个状态，提供存在热不均匀性的初始指示。可选的第二阈值比较器确定在预定数量的比较器输出中，一个状态中的数量是否超过编程值; 如果是，则第二阈值比较器输出存在热不均匀性的最终指示。以这种方式，提高了热粗糙度的精确检测，同时降低了错误检测的可能性。当检测到热粗糙度时，可以激活以下特征中的一个或多个以减少热凹凸的不利影响：连接到可变增益放大器的输入的静噪; 保持通道参数（例如定时，偏移和增益）的循环保持功能，直到散热的影响消散; 以及用户数据擦除指针，其标志数据已经被热不均匀性破坏并且需要由ECC电路校正。

9. 发明授权

US5999355A Gain and phase constrained adaptive equalizing filter in a sampled amplitude read channel for magnetic recording 失效
标题翻译：用于磁记录的采样振幅读通道中的增益和相位约束自适应均衡滤波器
公开(公告)号：US5999355A
公开(公告)日：1999-12-07
申请号：US640410
申请日：1996-04-30
申请人： Richard T. Behrens , William G. Bliss , Li Du , Mark S. Spurbeck , German S. Feyh , Trent O. Dudley
发明人： Richard T. Behrens , William G. Bliss , Li Du , Mark S. Spurbeck , German S. Feyh , Trent O. Dudley
IPC分类号： G11B5/012 , G11B5/035 , G11B5/09 , G11B20/10 , G11B20/14 , G11B20/18 , H03H15/00 , H03H17/02 , H03H17/06 , H04L7/00 , H04L7/02 , H04L25/03
CPC分类号： G11B20/10055 , G11B20/10009 , G11B20/10037 , G11B20/1403 , G11B5/09 , G11B5/012 , G11B5/035 , H04L7/0029 , H04L7/0062
摘要： A sampled amplitude read channel for magnetic disk recording which asynchronously samples the analog read signal, adaptively equalizes the resulting discrete time sample values according to a target partial response, extracts synchronous sample values through interpolated timing recovery, and detects digital data from the synchronous sample values using a Viterbi sequence detector is disclosed. To minimize interference from the timing and gain control loops, the phase and magnitude response of the adaptive equalizer filter are constrained at a predetermined frequency using an optimal orthogonal projection operation as a modification to a least mean square (LMS) adaptation algorithm. Further, with interpolated timing recovery, the equalizer filter and its associated latency are removed from the timing recovery loop, thereby allowing a higher order discrete time filter and a lower order analog filter.
摘要翻译：用于磁盘记录的采样幅度读取通道，其异步采样模拟读取信号，根据目标部分响应对所得离散时间采样值进行自适应均衡，通过内插定时恢复提取同步采样值，并从同步采样值检测数字数据公开了使用维特比序列检测器。为了最小化来自定时和增益控制环路的干扰，使用最佳正交投影操作将自适应均衡器滤波器的相位和幅度响应约束在预定频率，作为对最小均方（LMS）适配算法的修改。此外，通过内插定时恢复，均衡器滤波器及其相关等待时间从定时恢复环路中移除，从而允许较高阶离散时间滤波器和较低阶模拟滤波器。

10. 发明授权

US5956304A Differential phase error detector using dual arm correlation for servo tracking in an optical disk storage device 失效
标题翻译：差分相位误差检测器，用于光盘存储装置中的伺服跟踪双臂相关
公开(公告)号：US5956304A
公开(公告)日：1999-09-21
申请号：US912916
申请日：1997-08-15
申请人： Louis Supino , Paul M. Romano , Larry D. King , German S. Feyh
发明人： Louis Supino , Paul M. Romano , Larry D. King , German S. Feyh
IPC分类号： G11B7/085 , G11B7/09 , G11B7/00
CPC分类号： G11B7/0906 , G11B7/08541 , G11B7/0901
摘要： In an optical disk storage device, a differential phase detector is disclosed for generating a position error signal independent of the frequency content of the recorded data. A pair if diagonal signals S1 and S2 are generated by adding a pair of respective quadrants of a four-quadrant photodetector, where the phase offset between the diagonal signals represents the position error of the pit image as it passes over the photodetector. The position error is determined in the present invention by computing the difference between a positive and negative correlation of the diagonal signals S1 and S2, otherwise referred to as a dual arm correlation (DAC) ##EQU1## where .DELTA. is the correlation offset and L is the correlation length. In the preferred embodiment, the correlation offset .DELTA. is adaptively adjusted to maximize the correlation between S1 and S2. In this manner, the position error estimate is substantially insensitive to the frequency content of the recorded data. Furthermore, this method extends the position error over a range of plus or minus one-half a track, which facilitates generating a quadrature signal for use in counting track crossings during seek operations.
摘要翻译：在光盘存储装置中，公开了用于产生与记录数据的频率内容无关的位置误差信号的差分相位检测器。如果对角线信号S1和S2是通过增加四象限光电检测器的一对相应象限来产生的，其中对角线信号之间的相位偏移表示当其通过光电检测器时凹坑图像的位置误差。在本发明中通过计算对角线信号S1和S2的正相关和负相关之间的差异来确定位置误差，否则称为双相位相关（DAC），其中DELTA是相关偏移，L是相关长度。在优选实施例中，相关偏移量DELTA被自适应地调整以最大化S1和S2之间的相关性。以这种方式，位置误差估计对记录数据的频率内容基本不敏感。此外，该方法将位置误差扩展到正或负二分之一的轨道的范围，这有利于产生用于在搜索操作期间计数轨道交叉的正交信号。

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