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1. 发明授权

US06383826B1 Method for determining etch depth 失效
标题翻译：确定蚀刻深度的方法
公开(公告)号：US06383826B1
公开(公告)日：2002-05-07
申请号：US09691636
申请日：2000-10-18
申请人： Michael E. Barsky , Richard Lai , Ronald W. Grundbacher , Rosie M. Dia , Yaochung Chen
发明人： Michael E. Barsky , Richard Lai , Ronald W. Grundbacher , Rosie M. Dia , Yaochung Chen
IPC分类号： H01L2166
CPC分类号： H01L22/26 , H01L22/12
摘要： A method for determining the etch depth of a gate recess (26) in an InP based FET device (10). The source-drain, current-voltage (I-V) relationship is monitored during the etching process. As the etch depth increases, a kink is formed in the linear portion of the I-V relationship. When the kink current reaches a desired value, the etching is stopped. The kink current is a strong function of etch depth, so small differences in etch depth can be easily targeted. By controlling the etch depth, the characteristics of the transistor can be reproducibly controlled and optimized.
摘要翻译：一种用于确定基于InP的FET器件（10）中的栅极凹槽（26）的蚀刻深度的方法。在蚀刻过程中监测源极 - 漏极，电流 - 电压（I-V）关系。当蚀刻深度增加时，在I-V关系的线性部分中形成扭结。当扭结电流达到所需值时，停止蚀刻。扭结电流是蚀刻深度的强函数，因此刻蚀深度的差异很小。通过控制蚀刻深度，可以可重复地控制和优化晶体管的特性。

2. 发明授权

US06452221B1 Enhancement mode device 有权
标题翻译：增强模式设备
公开(公告)号：US06452221B1
公开(公告)日：2002-09-17
申请号：US09668120
申请日：2000-09-21
申请人： Richard Lai , Ronald W. Grundbacher , Yaochung Chen , Michael E. Barsky
发明人： Richard Lai , Ronald W. Grundbacher , Yaochung Chen , Michael E. Barsky
IPC分类号： H01L31072
CPC分类号： H01L29/7787
摘要： An enhancement mode FET device (10) that employs a strained N-doped InAlAs charge shield layer (22) disposed on an intrinsic InAlAs barrier layer (20). A gate metal electrode (38) of the FET device (10) is controllably diffused through a recess (36) into the shield layer (22) to the barrier layer (20). The resulting enhancement mode device (10) provides an excellent Schottky barrier with a high barrier height that inhibits undesirable surface depletion effects through charge shielding by the shield layer (22) in the regions between the recess edge and the gate metal. Minimizing surface depletion effects makes the device more robust by making the surface less sensitive to processing conditions and long-term operation effects.
摘要翻译：一种使用设置在本征InAlAs势垒层（20）上的应变N掺杂InAlAs电荷屏蔽层（22）的增强型FET器件（10）。 FET器件（10）的栅极金属电极（38）通过凹部（36）被可控地扩散到屏蔽层（22）中至阻挡层（20）。所产生的增强模式器件（10）提供具有高势垒高度的优异的肖特基势垒，其通过在凹口边缘和栅极金属之间的区域中的屏蔽层（22）的电荷屏蔽来抑制不期望的表面消耗效应。通过使表面对加工条件和长期运行效果较不敏感，最小化表面耗尽效应使器件更加坚固。

3. 发明授权

US06551905B1 Wafer adhesive for semiconductor dry etch applications 有权
标题翻译：用于半导体干蚀刻应用的晶片粘合剂
公开(公告)号：US06551905B1
公开(公告)日：2003-04-22
申请号：US09693716
申请日：2000-10-20
申请人： Michael E. Barsky , Harvey N. Rogers , Vladimir Medvedev , Yaochung Chen , Richard Lai
发明人： Michael E. Barsky , Harvey N. Rogers , Vladimir Medvedev , Yaochung Chen , Richard Lai
IPC分类号： H01L2130
CPC分类号： H01L21/6835 , H01L21/76898 , H01L23/481 , H01L2221/68318 , H01L2924/0002 , H01L2924/3025 , H01L2924/00
摘要： A method is provided for backside processing a semiconductor wafer (10) including applying a polymer based protective coating (16) on the wafer, depositing a barrier layer of ceramic (18) on the protective coating, and coating the ceramic layer with a thermoplastic based adhesive (20). Thereafter, the wafer (10) is bonded to a perforated substrate (22) and then lapped and polished to a desired thickness and patterned with an etch mask. A high temperature plasma etching process is then used to etch via holes in the wafer (10). After etching and subsequent backside processing, the adhesive layer (20) is dissolved in acetone to separate the wafer (10) from the substrate (22). The protective coating (16) is then dissolved with a solvent to separate the ceramic layer (18) from the finished wafer (10).
摘要翻译：提供了一种用于背面处理半导体晶片（10）的方法，包括在晶片上施加基于聚合物的保护涂层（16），在保护涂层上沉积陶瓷（18）的阻挡层，并用基于热塑性的涂层粘合剂（20）。此后，将晶片（10）接合到多孔基材（22）上，然后研磨并抛光至所需厚度并用蚀刻掩模图案化。然后使用高温等离子体蚀刻工艺来蚀刻晶片（10）中的通孔。在蚀刻和随后的背面处理之后，将粘合剂层（20）溶解在丙酮中以将晶片（10）与基板（22）分离。然后用溶剂溶解保护涂层（16）以将陶瓷层（18）与成品晶片（10）分离。

4. 发明授权

US06764573B2 Wafer thinning techniques 有权
标题翻译：晶圆薄化技术
公开(公告)号：US06764573B2
公开(公告)日：2004-07-20
申请号：US09977158
申请日：2001-10-11
申请人： Richard Lai , Harvey N. Rogers , Yaochung Chen , Michael E. Barsky
发明人： Richard Lai , Harvey N. Rogers , Yaochung Chen , Michael E. Barsky
IPC分类号： B08B302
CPC分类号： H01L21/30612 , H01L21/302 , H01L21/67086 , H01L21/67346
摘要： Apparatuses (10, 100), and methods of using same, for the simultaneous thinning of the backside surfaces of a plurality of semiconductor wafers (W) using a non-crystallographic and uniform etching process, are described. The apparatuses (10, 100) include a fixture (12, 102) having a plurality of horizontal receptacles (14, 16, 18, 20, 104, 106, 108, 110) for receiving the semiconductor wafers (W). The loaded fixtures (12, 102) are then immersed into an etchant solution (36, 146) that is capable of isotropically removing a layer of semiconductor material from the backside surface of the semiconductor wafers (W). The etchant solution (36, 146) is preferably heated to about 40° C.-50° C. and constantly stirred with a magnetic stirring bar (48, 158). Once a sufficient period of time has elapsed, the thinned semiconductor wafers (W) are removed from the etchant solution (36, 146). The apparatuses (10, 100) are capable of simultaneously thinning several semiconductor wafers (V) down to a final thickness of about 25 &mgr;m.
摘要翻译：描述了使用非结晶和均匀蚀刻工艺的装置（10,100）及其使用方法，用于同时薄化多个半导体晶片（W）的背面。装置（10,100）包括具有用于接收半导体晶片（W）的多个水平插座（14,16,18,20,104,106,108,110）的固定装置（12,102）。然后将装载的固定装置（12,102）浸入能够从半导体晶片（W）的背面各向同性地去除半导体材料层的蚀刻剂溶液（36,146）中。蚀刻剂溶液（36,146）优选加热至约40℃-50℃，并与磁力搅拌棒（48,158）持续搅拌。一旦经过足够的时间，就从蚀刻剂溶液（36,146）中除去变薄的半导体晶片（W）。装置（10,100）能够同时使多个半导体晶片（V）变薄至约25μm的最终厚度。

5. 发明授权

US06201283B1 Field effect transistor with double sided airbridge 失效
标题翻译：具双面气桥的场效应晶体管
公开(公告)号：US06201283B1
公开(公告)日：2001-03-13
申请号：US09391339
申请日：1999-09-08
申请人： Richard Lai , Yaochung Chen , Huan-Chun Yen , James C. K. Lau
发明人： Richard Lai , Yaochung Chen , Huan-Chun Yen , James C. K. Lau
IPC分类号： H01L2976
CPC分类号： H01L23/4821 , H01L29/42316 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A field effect transistor with a double sided airbridge comprises a substrate containing a conductive region and source, drain and gate electrodes disposed on the substrate. The gate electrode has a finger portion with a first end secured to the substrate between the source and drain electrodes and a second end, and a double sided airbridge portion flaring outwardly from the second end and having opposed first and second extremities. A first gate pad is disposed on said substrate outwardly from the source electrode and is connected to the first extremity. A second gate pad is disposed on said substrate outwardly from the drain electrodes and is connected to the second extremity. The gate pads serve to support the airbridge gate finger so as to reduce stress on the gate finger. The first and second gate pads receive and transmit signals through the airbridge and to and from the gate finger.
摘要翻译：具有双面气桥的场效应晶体管包括含有导电区域的基板和设置在基板上的源极，漏极和栅电极。栅电极具有手指部分，其第一端固定在源极和漏极之间的衬底上，第二端和从第二端向外扩张并具有相对的第一和第二端的双面气桥部分。第一栅极焊盘从源电极向外设置在所述衬底上并连接到第一末端。第二栅极焊盘从漏电极向外设置在所述衬底上，并连接到第二末端。闸板用于支撑空中桥闸手指，以减轻闸手指的压力。第一和第二栅极焊盘通过空中桥梁接收和传送信号，并且与门指接收和传送信号。

6. 发明授权

US06344777B1 Highly efficient compact ultra-high power source 失效
标题翻译：高效紧凑型超高功率源
公开(公告)号：US06344777B1
公开(公告)日：2002-02-05
申请号：US09618391
申请日：2000-07-18
申请人： Daisy L. Ingram , Yaochung Chen , William M. Brunner , Huan-Chun Yen
发明人： Daisy L. Ingram , Yaochung Chen , William M. Brunner , Huan-Chun Yen
IPC分类号： H03F368
CPC分类号： H03F3/602
摘要： Greater levels of microwave and millimeter microwave frequency power is achieved in a new power amplifier structure in which sixteen MMIC amplifiers are supported in a 4×4 row by column matrix and the output (and input) manifold is of a “crazy-H” power combining structure. Even greater output power, on the order of 100 watts at 35 GHz, is achieved by combining multiple numbers of such power amplifier units through a radial combiner.
摘要翻译：在一个新的功率放大器结构中实现了更高水平的微波和毫米微波频率功率，其中十六个MMIC放大器以4×4行列式支持，并且输出（和输入）歧管是“疯狂H”功率组合结构。通过组合多个这样的功率放大器单元通过径向组合器实现更大的输出功率，在35GHz时为100瓦特。

7. 发明申请

US20090267115A1 CLUB EXTENSION TO A T-GATE HIGH ELECTRON MOBILITY TRANSISTOR 有权
标题翻译： CLUB扩展到T型高电子移动晶体管
公开(公告)号：US20090267115A1
公开(公告)日：2009-10-29
申请号：US12150417
申请日：2008-04-28
申请人： Carol Osaka Namba , Po-Hsin Liu , Ioulia Smorchkova , Michael Wojtowicz , Robert Coffie , Yaochung Chen
发明人： Carol Osaka Namba , Po-Hsin Liu , Ioulia Smorchkova , Michael Wojtowicz , Robert Coffie , Yaochung Chen
IPC分类号： H01L29/778 , H01L21/338
CPC分类号： H01L29/42316 , H01L21/0272 , H01L21/0277 , H01L29/1608 , H01L29/2003 , H01L29/66462 , H01L29/7786
摘要： A method of fabricating a T-gate HEMT with a club extension comprising the steps of: providing a substrate; providing a bi-layer resist on the substrate; exposing an area of the bi-layer resist to electron beam lithography where the area corresponds to a T-gate opening; exposing an area of the bi-layer resist to electron beam lithography where the area corresponds to the shape of the club extension wherein the area corresponding to the club extension is approximately 1 micron to an ohmic source side of a T-gate and approximately 0.5 microns forward from a front of the T-gate; developing out the bi-layer resist in the exposed area that corresponds to the T-gate opening; developing out the bi-layer resist in the exposed area that corresponds to the club extension; and forming the T-gate and club extension through a metallization process.
摘要翻译：一种制造具有球杆延伸部的T形门HEMT的方法，包括以下步骤：提供衬底; 在基板上提供双层抗蚀剂; 将双层抗蚀剂的区域暴露于电子束光刻，其中该区域对应于T形栅极开口; 将双层抗蚀剂的区域暴露于电子束光刻，其中该区域对应于球杆延伸部的形状，其中对应于球杆延伸部分的区域对于T形闸门的欧姆源侧为约1微米，大约为0.5微米从T型门前方前进; 在对应于T型门开口的暴露区域中形成双层抗蚀剂; 在对应于俱乐部延伸的暴露区域中开发双层抗蚀剂; 以及通过金属化工艺形成T形门和球杆延伸。

8. 发明授权

US07612610B2 Active input load wide bandwidth low noise HEMT amplifier 有权
标题翻译：有源输入负载宽带宽低噪声HEMT放大器
公开(公告)号：US07612610B2
公开(公告)日：2009-11-03
申请号：US11256542
申请日：2005-10-21
申请人： Yaochung Chen
发明人： Yaochung Chen
IPC分类号： H03F3/16
CPC分类号： H03F3/16 , H03F1/26 , H03F1/42 , H03F1/56 , H03F3/195 , H03F2200/21 , H03F2200/222 , H03F2200/294 , H03F2200/36 , H03F2200/372 , H03F2200/451 , H03H11/28
摘要： A relatively wide bandwidth low noise amplifier with an active input matching network. The active load maybe formed from a field effect transistor (FET) or high electron mobility transistor (HEMT) in a common gate configuration. The active load input matching network has a lower overall noise component to only transistor channel noise than reactive matching components, such as inductors and capacitors. By utilizing the active mode input matching network in accordance with the present invention, the circuit layout such amplifiers can be reduces significantly, for example, 23 mils×47 mils.
摘要翻译：具有主动输入匹配网络的相对宽带宽的低噪声放大器。有源负载可以由公共栅极配置中的场效应晶体管（FET）或高电子迁移率晶体管（HEMT）形成。有源负载输入匹配网络具有仅比晶体管沟道噪声更低的总体噪声分量，而不是诸如电感器和电容器的电抗匹配组件。通过利用根据本发明的有源模式输入匹配网络，可以显着地减少这种放大器的电路布局，例如23密耳×47密耳。

9. 发明授权

US07608865B1 Club extension to a T-gate high electron mobility transistor 有权
标题翻译：俱乐部扩展到T门高电子迁移率晶体管
公开(公告)号：US07608865B1
公开(公告)日：2009-10-27
申请号：US12150417
申请日：2008-04-28
申请人： Carol Osaka Namba , Po-Hsin Liu , Ioulia Smorchkova , Michael Wojtowicz , Robert Coffie , Yaochung Chen
发明人： Carol Osaka Namba , Po-Hsin Liu , Ioulia Smorchkova , Michael Wojtowicz , Robert Coffie , Yaochung Chen
IPC分类号： H01L31/092 , H01L31/109 , H01L31/0328 , H01L31/0336
CPC分类号： H01L29/42316 , H01L21/0272 , H01L21/0277 , H01L29/1608 , H01L29/2003 , H01L29/66462 , H01L29/7786
摘要： A method of fabricating a T-gate HEMT with a club extension comprising the steps of: providing a substrate; providing a bi-layer resist on the substrate; exposing an area of the bi-layer resist to electron beam lithography where the area corresponds to a T-gate opening; exposing an area of the bi-layer resist to electron beam lithography where the area corresponds to the shape of the club extension wherein the area corresponding to the club extension is approximately 1 micron to an ohmic source side of a T-gate and approximately 0.5 microns forward from a front of the T-gate; developing out the bi-layer resist in the exposed area that corresponds to the T-gate opening; developing out the bi-layer resist in the exposed area that corresponds to the club extension; and forming the T-gate and club extension through a metallization process.
摘要翻译：一种制造具有球杆延伸部的T形门HEMT的方法，包括以下步骤：提供衬底; 在基板上提供双层抗蚀剂; 将双层抗蚀剂的区域暴露于电子束光刻，其中该区域对应于T形栅极开口; 将双层抗蚀剂的区域暴露于电子束光刻，其中该区域对应于球杆延伸部的形状，其中对应于球杆延伸部分的区域对于T形闸门的欧姆源侧为约1微米，大约为0.5微米从T型门前方前进; 在对应于T型门开口的暴露区域中形成双层抗蚀剂; 在对应于俱乐部延伸的暴露区域中开发双层抗蚀剂; 以及通过金属化工艺形成T形门和球杆延伸。

10. 发明授权

US06711723B2 Hybrid semi-physical and data fitting HEMT modeling approach for large signal and non-linear microwave/millimeter wave circuit CAD 失效
标题翻译：用于大信号和非线性微波/毫米波电路CAD的混合半物理和数据拟合HEMT建模方法
公开(公告)号：US06711723B2
公开(公告)日：2004-03-23
申请号：US09840561
申请日：2001-04-23
申请人： Roger S. Tsai , Yaochung Chen
发明人： Roger S. Tsai , Yaochung Chen
IPC分类号： G06F1750
CPC分类号： G06F17/5036 , G01R31/28 , G01R31/316
摘要： A hybrid model formed from a semi-physical device model along with an accurate data-fitting model in order to implement a relatively accurate physical device model as a large signal microwave circuit computer-aided design (CAD) tool. The semi-physical device model enables accurate representation of known physical device characteristics and measured bias-dependent characteristics. This model is used to accurately simulate the effect of process variation and environmental changes on bias-dependent characteristics. The data-fitting model is used to model these characteristics with relatively good fidelity. The expressions of the model are constructed to be charge conservative. As such, the model is computationally robust within the harmonic balance algorithms employed by known large signal microwave circuit CAD tools.
摘要翻译：由半物理设备模型形成的混合模型以及精确的数据拟合模型，以实现相对准确的物理设备模型作为大信号微波电路计算机辅助设计（CAD）工具。半物理器件模型能够精确表示已知的物理器件特性和测量的偏置相关特性。该模型用于准确模拟过程变化和环境变化对偏置依赖特征的影响。数据拟合模型用于以较好的保真度对这些特征进行建模。模型的表达被构造为电荷保守。因此，该模型在已知的大信号微波电路CAD工具采用的谐波平衡算法中是计算稳健的。

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