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1. 发明申请

US20040137941A1 Mobile communication apparatus 审中-公开
公开(公告)号：US20040137941A1
公开(公告)日：2004-07-15
申请号：US10742812
申请日：2003-12-23
申请人： Renesas Technology Corp. , TTPCom Limited
发明人： Satoshi Tanaka , Kazuo Watanabe , Masao Hotta , Toyohiko Hongo , Taizo Yamawaki , Masumi Kasahara , Kumiko Takikawa
IPC分类号： H04B001/38
CPC分类号： H04B1/30 , H03D2200/0047 , H03K21/16
摘要： A transceiver suitable for larger scale of integration employs direct conversion reception for reducing the number of filters. Also, the number of VCOs is reduced by utilizing dividers to supply a receiver and a transmitter with locally oscillated signals at an RF band. Dividers each having a fixed division ratio are used for generating locally oscillated signals for the receiver, while a divider having a switchable division ratio are used for generating the locally oscillated signal for the transmitter. In addition, a variable gain amplifier for baseband signal is provided with a DC offset voltage detector and a DC offset canceling circuit for supporting high speed data communications to accomplish fast cancellation of a DC offset by eliminating intervention of a filter within a feedback loop for offset cancellation.

2. 发明申请

US20040088319A1 Data Processor 审中-公开
标题翻译：数据处理器
公开(公告)号：US20040088319A1
公开(公告)日：2004-05-06
申请号：US10686701
申请日：2003-10-17
申请人： Renesas Technology Corp.
发明人： Takanaga Yamazaki , Yuichi Abe , Kesami Hagiwara , Yasuo Sugure , Takeshi Kataoka , Seiji Takeuchi , Satoshi Tanaka
IPC分类号： G06F017/00
CPC分类号： G06F9/30043
摘要： A data processor of the present invention reduces the program code size of a program for saving and restoring plural registers. The data processor includes a plurality of registers usable for instruction execution and has an instruction set including predetermined data transfer instructions. The predetermined data transfer instructions have register specification fields of plural bits in which the number of one register is explicitly specified from a group of registers, and specify data transfers between registers corresponding to numbers equal to or greater than, or equal to or smaller than a number specified in the register specification field and memory. A plurality of registers of the group of registers, specified in one operand, can be saved to and restored from memory. The program code size of a program for saving and restoring plural registers can be reduced. Since the predetermined instructions have only one operand, they can fit easily in 16 bits.
摘要翻译：本发明的数据处理器减少用于保存和恢复多个寄存器的程序的程序代码大小。数据处理器包括可用于指令执行的多个寄存器，并具有包括预定数据传送指令的指令集。预定的数据传输指令具有多个位的寄存器指定字段，其中从一组寄存器中明确地指定一个寄存器的数量，并且指定对应于等于或大于等于或等于或等于在寄存器指定字段和存储器中指定的数字。在一个操作数中指定的寄存器组的多个寄存器可以保存到存储器并从存储器恢复。可以减少用于保存和恢复多个寄存器的程序的程序代码大小。由于预定指令只有一个操作数，所以它们可以容易地配置在16位中。

3. 发明申请

US20040137853A1 Mobile communication apparatus 有权
标题翻译：移动通信装置
公开(公告)号：US20040137853A1
公开(公告)日：2004-07-15
申请号：US10742813
申请日：2003-12-23
申请人： Renesas Technology Corp. , TTPCom Limited
发明人： Satoshi Tanaka , Kazuo Watanabe , Masao Hotta , Toyohiko Hongo , Taizo Yamawaki , Masumi Kasahara , Kumiko Takikawa
IPC分类号： H04B007/00
CPC分类号： H04B1/30 , H03D2200/0047 , H03K21/16
摘要： A transceiver suitable for larger scale of integration employs direct conversion reception for reducing the number of filters. Also, the number of VCOs is reduced by utilizing dividers to supply a receiver and a transmitter with locally oscillated signals at an RF band. Dividers each having a fixed division ratio are used for generating locally oscillated signals for the receiver, while a divider having a switchable division ratio are used for generating the locally oscillated signal for the transmitter. In addition, a variable gain amplifier for baseband signal is provided with a DC offset voltage detector and a DC offset canceling circuit for supporting high speed data communications to accomplish fast cancellation of a DC offset by eliminating intervention of a filter within a feedback loop for offset cancellation.
摘要翻译：适合较大规模集成的收发器采用直接转换接收，以减少滤波器的数量。此外，通过利用分频器来为RF频带提供具有本地振荡信号的接收机和发射机来减少VCO的数量。每个具有固定分频比的分频器用于产生用于接收机的局部振荡信号，而具有可切换分频比的分频器用于产生用于发射机的本地振荡信号。另外，用于基带信号的可变增益放大器设置有DC偏移电压检测器和DC偏移消除电路，用于支持高速数据通信以通过消除用于偏移的反馈回路内的滤波器的干涉来实现DC偏移的快速消除消除。

4. 发明申请

US20040087298A1 Local signal generation circuit 审中-公开
标题翻译：本地信号发生电路
公开(公告)号：US20040087298A1
公开(公告)日：2004-05-06
申请号：US10682928
申请日：2003-10-14
申请人： Renesas Technology Corp.
发明人： Taizo Yamawaki , Satoshi Tanaka
IPC分类号： H04B001/26 , H04B015/00
CPC分类号： H04B1/406
摘要： The present invention relates to miniaturization of a local signal generation circuit to supply signals to a frequency converter in communication terminals such as a transmitter, a receiver, a transmitter-receiver, and the like that use one or more frequency bands. The local signal generation circuit comprises first and second oscillators capable of changing output frequencies and a multiplication means for multiplying input signals and generates local signals. The multiplication means selectively generates a signal of frequency corresponding to a sum or a difference between an output signal from the first oscillator and an output signal from the second oscillator.
摘要翻译：本发明涉及本地信号发生电路的小型化，以向诸如使用一个或多个频带的发射机，接收机，发射机 - 接收机等的通信终端中的频率转换器提供信号。本地信号发生电路包括能够改变输出频率的第一和第二振荡器以及用于乘以输入信号并产生本地信号的乘法装置。乘法装置选择性地产生对应于来自第一振荡器的输出信号和来自第二振荡器的输出信号之间的和或差的频率的信号。

5. 发明申请

US20040121746A1 Direct conversion receiver 有权
标题翻译：直接转换接收机
公开(公告)号：US20040121746A1
公开(公告)日：2004-06-24
申请号：US10727612
申请日：2003-12-05
申请人： Renesas Technology Corp.
发明人： Yukinori Akamine , Satoshi Tanaka , Akio Yamamoto , Kazuaki Hori
IPC分类号： H04B017/02 , H04B001/00
CPC分类号： H04B1/30 , H03G3/3052
摘要： In a direct conversion receiver, to cancel a DC offset generated in the baseband processing block, negative feedback arrangements comprising a gain control amplifier and a low-pass filter are respectively attached to the I and Q signal branches of the baseband block following mixer outputs. The gain control amplifier in each negative feedback circuit is gain adjusted so that the product G-B of the gain G of a primary gain control amplifier and its own gain B will be constant and thereby the DC offset is cancelled. This DC offset cancellation can be applied in a continuous receiving system with no intermittent time during a receiving operation. Capacitance elements located off-chip can be reduced to those to be used only in the low-pass filters in the negative feedback circuits, whereas many off-chip capacitance elements have been required to be inserted between each stage of gain control amplifiers in conventional baseband chains.
摘要翻译：在直接转换接收机中，为了消除在基带处理块中产生的DC偏移，包括增益控制放大器和低通滤波器的负反馈装置分别附加到混频器输出之后的基带块的I和Q信号分支。每个负反馈电路中的增益控制放大器被增益调整，使得主增益控制放大器的增益G的乘积G-B和其自身的增益B将恒定，从而DC偏移被消除。该DC偏移消除可以应用于在接收操作期间没有间歇时间的连续接收系统中。位于片外的电容元件可以减少到仅在负反馈电路中的低通滤波器中使用的电容元件，而许多芯片外电容元件需要插入到常规基带中的增益控制放大器的每个级之间链条

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