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1. 发明授权

US08598043B2 Methods of forming semiconductor constructions 有权
标题翻译：形成半导体结构的方法
公开(公告)号：US08598043B2
公开(公告)日：2013-12-03
申请号：US12886459
申请日：2010-09-20
申请人： Ramakanth Alapati , Ardavan Niroomand , Gurtej S. Sandhu , Luan C. Tran
发明人： Ramakanth Alapati , Ardavan Niroomand , Gurtej S. Sandhu , Luan C. Tran
IPC分类号： H01L21/302
CPC分类号： H01L21/3086 , H01L21/0337 , H01L21/76232 , H01L27/105 , H01L27/1052
摘要： The invention includes methods of forming isolation regions for semiconductor constructions. A hard mask can be formed and patterned over a semiconductor substrate, with the patterned hard mask exposing a region of the substrate. Such exposed region can be etched to form a first opening having a first width. The first opening is narrowed with a conformal layer of carbon-containing material. The conformal layer is punched through to expose substrate along a bottom of the narrowed opening. The exposed substrate is removed to form a second opening which joins to the first opening, and which has a second width less than the first width. The carbon-containing material is then removed from within the first opening, and electrically insulative material is formed within the first and second openings. The electrically insulative material can substantially fill the first opening, and leave a void within the second opening.
摘要翻译：本发明包括形成用于半导体结构的隔离区域的方法。可以在半导体衬底上形成并图案化硬掩模，其中图案化的硬掩模暴露衬底的区域。可以蚀刻这样的暴露区域以形成具有第一宽度的第一开口。第一个开口用含碳材料的共形层变窄。穿过保形层以沿着狭窄的开口的底部露出衬底。去除暴露的衬底以形成连接到第一开口的第二开口，并且具有小于第一宽度的第二宽度。然后从第一开口内去除含碳材料，并且在第一和第二开口内形成电绝缘材料。电绝缘材料可以基本上填充第一开口，并在第二开口内留下空隙。

2. 发明授权

US07799694B2 Methods of forming semiconductor constructions 有权
标题翻译：形成半导体结构的方法
公开(公告)号：US07799694B2
公开(公告)日：2010-09-21
申请号：US11402659
申请日：2006-04-11
申请人： Ramakanth Alapati , Ardavan Niroomand , Gurtej S. Sandhu , Luan C. Tran
发明人： Ramakanth Alapati , Ardavan Niroomand , Gurtej S. Sandhu , Luan C. Tran
IPC分类号： H01L21/302
CPC分类号： H01L21/3086 , H01L21/0337 , H01L21/76232 , H01L27/105 , H01L27/1052
摘要： The invention includes methods of forming isolation regions for semiconductor constructions. A hard mask can be formed and patterned over a semiconductor substrate, with the patterned hard mask exposing a region of the substrate. Such exposed region can be etched to form a first opening having a first width. The first opening is narrowed with a conformal layer of carbon-containing material. The conformal layer is punched through to expose substrate along a bottom of the narrowed opening. The exposed substrate is removed to form a second opening which joins to the first opening, and which has a second width less than the first width. The carbon-containing material is then removed from within the first opening, and electrically insulative material is formed within the first and second openings. The electrically insulative material can substantially fill the first opening, and leave a void within the second opening.
摘要翻译：本发明包括形成用于半导体结构的隔离区域的方法。可以在半导体衬底上形成并图案化硬掩模，其中图案化的硬掩模暴露衬底的区域。可以蚀刻这样的暴露区域以形成具有第一宽度的第一开口。第一个开口用含碳材料的共形层变窄。穿过保形层以沿着狭窄的开口的底部露出衬底。去除暴露的衬底以形成连接到第一开口的第二开口，并且具有小于第一宽度的第二宽度。然后从第一开口内去除含碳材料，并且在第一和第二开口内形成电绝缘材料。电绝缘材料可以基本上填充第一开口，并在第二开口内留下空隙。

3. 发明申请

US20110008970A1 Methods of Forming Semiconductor Constructions 有权
标题翻译：形成半导体结构的方法
公开(公告)号：US20110008970A1
公开(公告)日：2011-01-13
申请号：US12886459
申请日：2010-09-20
申请人： Ramakanth Alapati , Ardavan Niroomand , Gurtej S. Sandhu , Luan C. Tran
发明人： Ramakanth Alapati , Ardavan Niroomand , Gurtej S. Sandhu , Luan C. Tran
IPC分类号： H01L21/31
CPC分类号： H01L21/3086 , H01L21/0337 , H01L21/76232 , H01L27/105 , H01L27/1052
摘要： The invention includes methods of forming isolation regions for semiconductor constructions. A hard mask can be formed and patterned over a semiconductor substrate, with the patterned hard mask exposing a region of the substrate. Such exposed region can be etched to form a first opening having a first width. The first opening is narrowed with a conformal layer of carbon-containing material. The conformal layer is punched through to expose substrate along a bottom of the narrowed opening. The exposed substrate is removed to form a second opening which joins to the first opening, and which has a second width less than the first width. The carbon-containing material is then removed from within the first opening, and electrically insulative material is formed within the first and second openings The electrically insulative material can substantially fill the first opening, and leave a void within the second opening.
摘要翻译：本发明包括形成用于半导体结构的隔离区域的方法。可以在半导体衬底上形成并图案化硬掩模，其中图案化的硬掩模暴露衬底的区域。可以蚀刻这样的暴露区域以形成具有第一宽度的第一开口。第一个开口用含碳材料的共形层变窄。穿过保形层以沿着狭窄的开口的底部露出衬底。去除暴露的衬底以形成连接到第一开口的第二开口，并且具有小于第一宽度的第二宽度。然后从第一开口内去除含碳材料，并且电绝缘材料形成在第一和第二开口内。电绝缘材料可以基本上填充第一开口，并在第二开口内留下空隙。

4. 发明申请

US20120238077A1 Methods of Forming High Density Structures and Low Density Structures with a Single Photomask 有权
标题翻译：用单一光掩模形成高密度结构和低密度结构的方法
公开(公告)号：US20120238077A1
公开(公告)日：2012-09-20
申请号：US13485869
申请日：2012-05-31
申请人： Ramakanth Alapati , Ardavan Niroomand , Gurtej S. Sandhu
发明人： Ramakanth Alapati , Ardavan Niroomand , Gurtej S. Sandhu
IPC分类号： H01L21/302 , H01L21/20
CPC分类号： H01L21/32139 , H01L21/0337 , H01L21/31144 , H01L27/11526 , H01L27/11543
摘要： Some embodiments include formation of polymer spacers along sacrificial material, removal of the sacrificial material, and utilization of the polymer spacers as masks during fabrication of integrated circuitry. The polymer spacer masks may, for example, be utilized to pattern flash gates of a flash memory array. In some embodiments, the polymer is simultaneously formed across large sacrificial structures and small sacrificial structures. The polymer is thicker across the large sacrificial structures than across the small sacrificial structures, and such difference in thickness is utilized to fabricate high density structures and low-density structures with a single photomask.
摘要翻译：一些实施方案包括沿着牺牲材料形成聚合物间隔物，去除牺牲材料，以及在制造集成电路期间利用聚合物间隔物作为掩模。聚合物间隔物掩模可以例如用于对闪存阵列的闪光栅图案进行图案化。在一些实施方案中，聚合物同时形成跨越大的牺牲结构和小的牺牲结构。聚合物在大的牺牲结构上比通过小的牺牲结构更厚，并且这种厚度的差异被用于利用单个光掩模制造高密度结构和低密度结构。

5. 发明申请

US20100295114A1 Semiconductor Constructions 有权
标题翻译：半导体建筑
公开(公告)号：US20100295114A1
公开(公告)日：2010-11-25
申请号：US12851896
申请日：2010-08-06
申请人： Ramakanth Alapati , Ardavan Niroomand , Gurtej S. Sandhu
发明人： Ramakanth Alapati , Ardavan Niroomand , Gurtej S. Sandhu
IPC分类号： H01L29/788
CPC分类号： H01L21/32139 , H01L21/0337 , H01L21/31144 , H01L27/11526 , H01L27/11543
摘要： Some embodiments include formation of polymer spacers along sacrificial material, removal of the sacrificial material, and utilization of the polymer spacers as masks during fabrication of integrated circuitry. The polymer spacer masks may, for example, be utilized to pattern flash gates of a flash memory array. In some embodiments, the polymer is simultaneously formed across large sacrificial structures and small sacrificial structures. The polymer is thicker across the large sacrificial structures than across the small sacrificial structures, and such difference in thickness is utilized to fabricate high density structures and low-density structures with a single photomask.
摘要翻译：一些实施方案包括沿着牺牲材料形成聚合物间隔物，去除牺牲材料，以及在制造集成电路期间利用聚合物间隔物作为掩模。聚合物间隔物掩模可以例如用于对闪存阵列的闪光栅图案进行图案化。在一些实施方案中，聚合物同时形成跨越大的牺牲结构和小的牺牲结构。聚合物在大的牺牲结构上比通过小的牺牲结构更厚，并且这种厚度的差异被用于利用单个光掩模制造高密度结构和低密度结构。

6. 发明授权

US07790360B2 Methods of forming multiple lines 有权
标题翻译：形成多条线的方法
公开(公告)号：US07790360B2
公开(公告)日：2010-09-07
申请号：US11714378
申请日：2007-03-05
申请人： Ramakanth Alapati , Ardavan Niroomand , Gurtej S. Sandhu
发明人： Ramakanth Alapati , Ardavan Niroomand , Gurtej S. Sandhu
IPC分类号： H01L21/00
CPC分类号： H01L21/32139 , H01L21/0337 , H01L21/31144 , H01L27/11526 , H01L27/11543
摘要： Some embodiments include formation of polymer spacers along sacrificial material, removal of the sacrificial material, and utilization of the polymer spacers as masks during fabrication of integrated circuitry. The polymer spacer masks may, for example, be utilized to pattern flash gates of a flash memory array. In some embodiments, the polymer is simultaneously formed across large sacrificial structures and small sacrificial structures. The polymer is thicker across the large sacrificial structures than across the small sacrificial structures, and such difference in thickness is utilized to fabricate high density structures and low-density structures with a single photomask.
摘要翻译：一些实施方案包括沿着牺牲材料形成聚合物间隔物，去除牺牲材料，以及在制造集成电路期间利用聚合物间隔物作为掩模。聚合物间隔物掩模可以例如用于对闪存阵列的闪光栅图案进行图案化。在一些实施方案中，聚合物同时形成跨越大的牺牲结构和小的牺牲结构。聚合物在大的牺牲结构上比通过小的牺牲结构更厚，并且这种厚度的差异被用于利用单个光掩模制造高密度结构和低密度结构。

7. 发明授权

US08431456B2 Methods of forming high density structures and low density structures with a single photomask 有权
标题翻译：用单个光掩模形成高密度结构和低密度结构的方法
公开(公告)号：US08431456B2
公开(公告)日：2013-04-30
申请号：US13485869
申请日：2012-05-31
申请人： Ramakanth Alapati , Ardavan Niroomand , Gurtej S. Sandhu
发明人： Ramakanth Alapati , Ardavan Niroomand , Gurtej S. Sandhu
IPC分类号： H01L21/336
CPC分类号： H01L21/32139 , H01L21/0337 , H01L21/31144 , H01L27/11526 , H01L27/11543
摘要： Some embodiments include formation of polymer spacers along sacrificial material, removal of the sacrificial material, and utilization of the polymer spacers as masks during fabrication of integrated circuitry. The polymer spacer masks may, for example, be utilized to pattern flash gates of a flash memory array. In some embodiments, the polymer is simultaneously formed across large sacrificial structures and small sacrificial structures. The polymer is thicker across the large sacrificial structures than across the small sacrificial structures, and such difference in thickness is utilized to fabricate high density structures and low-density structures with a single photomask.
摘要翻译：一些实施方案包括沿着牺牲材料形成聚合物间隔物，去除牺牲材料，以及在制造集成电路期间利用聚合物间隔物作为掩模。聚合物间隔物掩模可以例如用于对闪存阵列的闪光栅图案进行图案化。在一些实施方案中，聚合物同时形成跨越大的牺牲结构和小的牺牲结构。聚合物在大的牺牲结构上比通过小的牺牲结构更厚，并且这种厚度的差异被用于利用单个光掩模制造高密度结构和低密度结构。

8. 发明授权

US08207570B2 Semiconductor constructions 有权
标题翻译：半导体结构
公开(公告)号：US08207570B2
公开(公告)日：2012-06-26
申请号：US12851896
申请日：2010-08-06
申请人： Ramakanth Alapati , Ardavan Niroomand , Gurtej S. Sandhu
发明人： Ramakanth Alapati , Ardavan Niroomand , Gurtej S. Sandhu
IPC分类号： H01L29/788
CPC分类号： H01L21/32139 , H01L21/0337 , H01L21/31144 , H01L27/11526 , H01L27/11543
摘要： Some embodiments include formation of polymer spacers along sacrificial material, removal of the sacrificial material, and utilization of the polymer spacers as masks during fabrication of integrated circuitry. The polymer spacer masks may, for example, be utilized to pattern flash gates of a flash memory array. In some embodiments, the polymer is simultaneously formed across large sacrificial structures and small sacrificial structures. The polymer is thicker across the large sacrificial structures than across the small sacrificial structures, and such difference in thickness is utilized to fabricate high density structures and low-density structures with a single photomask.
摘要翻译：一些实施方案包括沿着牺牲材料形成聚合物间隔物，去除牺牲材料，以及在制造集成电路期间利用聚合物间隔物作为掩模。聚合物间隔物掩模可以例如用于对闪存阵列的闪光栅图案进行图案化。在一些实施方案中，聚合物同时形成跨越大的牺牲结构和小的牺牲结构。聚合物在大的牺牲结构上比通过小的牺牲结构更厚，并且这种厚度的差异被用于利用单个光掩模制造高密度结构和低密度结构。

9. 发明申请

US20080220600A1 Semiconductor constructions, methods of forming multiple lines, and methods of forming high density structures and low density structures with a single photomask 有权
标题翻译：半导体结构，形成多条线的方法，以及用单个光掩模形成高密度结构和低密度结构的方法
公开(公告)号：US20080220600A1
公开(公告)日：2008-09-11
申请号：US11714378
申请日：2007-03-05
申请人： Ramakanth Alapati , Ardavan Niroomand , Gurtej S. Sandhu
发明人： Ramakanth Alapati , Ardavan Niroomand , Gurtej S. Sandhu
IPC分类号： H01L21/20
CPC分类号： H01L21/32139 , H01L21/0337 , H01L21/31144 , H01L27/11526 , H01L27/11543
摘要： Some embodiments include formation of polymer spacers along sacrificial material, removal of the sacrificial material, and utilization of the polymer spacers as masks during fabrication of integrated circuitry. The polymer spacer masks may, for example, be utilized to pattern flash gates of a flash memory array. In some embodiments, the polymer is simultaneously formed across large sacrificial structures and small sacrificial structures. The polymer is thicker across the large sacrificial structures than across the small sacrificial structures, and such difference in thickness is utilized to fabricate high density structures and low-density structures with a single photomask.
摘要翻译：一些实施方案包括沿着牺牲材料形成聚合物间隔物，去除牺牲材料，以及在制造集成电路期间利用聚合物间隔物作为掩模。聚合物间隔物掩模可以例如用于对闪存阵列的闪光栅图案进行图案化。在一些实施方案中，聚合物同时形成跨越大的牺牲结构和小的牺牲结构。聚合物在大的牺牲结构上比通过小的牺牲结构更厚，并且这种厚度的差异被用于利用单个光掩模制造高密度结构和低密度结构。

10. 发明授权

US08324107B2 Method for forming high density patterns 有权
标题翻译：形成高密度图案的方法
公开(公告)号：US08324107B2
公开(公告)日：2012-12-04
申请号：US12686602
申请日：2010-01-13
申请人： Baosuo Zhou , Gurtej S. Sandhu , Ardavan Niroomand
发明人： Baosuo Zhou , Gurtej S. Sandhu , Ardavan Niroomand
IPC分类号： H01L21/311
CPC分类号： H01L21/76885 , H01L21/0337 , H01L21/0338 , H01L21/76816
摘要： Methods are disclosed, such as those involving increasing the density of isolated features in an integrated circuit. In one or more embodiments, a method is provided for forming an integrated circuit with a pattern of isolated features having a final density of isolated features that is greater than a starting density of isolated features in the integrated circuit by a multiple of two or more. The method can include forming a pattern of pillars having a density X, and forming a pattern of holes amongst the pillars, the holes having a density at least X. The pillars can be selectively removed to form a pattern of holes having a density at least 2X. In some embodiments, plugs can be formed in the pattern of holes, such as by epitaxial deposition on the substrate, in order to provide a pattern of pillars having a density 2X. In other embodiments, the pattern of holes can be transferred to the substrate by etching.
摘要翻译：公开了诸如涉及增加集成电路中的隔离特征的密度的方法。在一个或多个实施例中，提供了一种用于形成具有孤立特征图案的集成电路的方法，其具有比集成电路中的隔离特征的起始密度大2倍或更多倍的隔离特征的最终密度。该方法可以包括形成具有密度X的柱状图案，并且在柱之间形成孔的图案，孔的密度至少为X.可以选择性地去除柱，以形成至少具有密度的孔的图案 2X。在一些实施例中，插塞可以以空穴的图案形成，例如通过外延沉积在基板上，以便提供具有密度2X的柱状图案。在其他实施例中，孔的图案可以通过蚀刻转移到衬底。

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