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1. 发明申请

US20220250961A1 METHOD AND APPARATUS FOR ADDITIVELY FORMING AN OPTICAL COMPONENT 有权
公开(公告)号：US20220250961A1
公开(公告)日：2022-08-11
申请号：US17171587
申请日：2021-02-09
申请人： Po-Han Huang , Frank Niklaus , Kristinn B. Gylfason , Miku Laakso , Pierre Edinger , Carlos Errando Herranz , David Emmanuel Marschner , Lee-Lun Lai , BonSens AB
发明人： Po-Han Huang , Göran Stemme , Frank Niklaus , Kristinn B. Gylfason , Miku Laakso , Pierre Edinger , Carlos Errando Herranz , David Emmanuel Marschner , Lee-Lun Lai
IPC分类号： C03B19/01 , B33Y80/00 , B33Y10/00 , B33Y30/00
摘要： The present invention relates to a method for forming a 3D optical component comprising the steps of: forming over a substrate a liquid layer of a polymer in a solvent, drying said polymer for removing at least a portion of said solvent and thereby creating a layer having a first dissolution rate, exposing by multi-photon absorption using an electromagnetic radiation source a predefined volume of said layer, thereby causing the volume to have a second dissolution rate which is different to said first dissolution rate, dissolve the non-exposed areas with a liquid solution for forming the 3D optical component, wherein said polymer is Hydrogen silsesquioxane, HSQ, and said dried layer having a thickness of at least 1 μm.

2. 发明申请

US20210349261A1 Device with a Waveguide with a Support Structure Comprising a Polymer Layer and Method for its Fabrication 有权
公开(公告)号：US20210349261A1
公开(公告)日：2021-11-11
申请号：US17282343
申请日：2019-03-08
申请人： Floria Ottonello Briano , Valentin Dubois , Simon Bleiker , Arne Quellmalz , Frank Niklaus , Kristinn B. Gylfason
发明人： Floria Ottonello Briano , Valentin Dubois , Simon Bleiker , Arne Quellmalz , Frank Niklaus , Kristinn B. Gylfason
IPC分类号： G02B6/122 , G02B6/13
摘要： In an embodiment a device includes a device layer, a substrate defining a substrate plane extending through a point of the substrate being closest to the device layer, a waveguide configured to guide an electromagnetic wave, wherein the waveguide extends in a length direction in the device layer, and wherein the waveguide has a width in a device layer plane in a direction perpendicular to the length direction and a height out of the device layer plane in the direction perpendicular to the length direction and a support structure, wherein the support structure extends from the substrate to the device layer to support the waveguide on the substrate.

3. 发明申请

US20130029480A1 FREE FORM PRINTING OF SILICON MICRO- AND NANOSTRUCTURES 审中-公开
标题翻译：自由形式印刷硅微结构和纳米结构
公开(公告)号：US20130029480A1
公开(公告)日：2013-01-31
申请号：US13639221
申请日：2011-04-05
申请人： Frank Niklaus , Andreas Fischer
发明人： Frank Niklaus , Andreas Fischer
IPC分类号： H01L21/20 , H01L21/205
CPC分类号： B81C1/00373 , B33Y10/00 , B33Y70/00 , B81C2201/0143 , B81C2201/0188 , B82Y20/00
摘要： A method of making a three-dimensional structure in semiconductor material includes providing a substrate (20) is provided having at least a surface including semiconductor material. Selected areas of the surface of the substrate are exposed to a focussed ion beam whereby the ions are implanted in the semiconductor material in the selected areas. Several layers of a material selected from the group consisting of mono-crystalline, poly-crystalline or amorphous semiconductor material, are deposited on the substrate surface and between depositions focussed ion beam is used to expose the surface so as to define a three-dimensional structure. Material not part of the final structure (30) defined by the focussed ion beam is etched away so as to provide a three-dimensional structure on the substrate (20).
摘要翻译：在半导体材料中制造三维结构的方法包括提供至少具有包括半导体材料的表面的基底（20）。将基板的表面的选定区域暴露于聚焦的离子束，由此将离子注入到所选择的区域中的半导体材料中。选自由单晶，多晶或非晶半导体材料组成的组的几层材料沉积在衬底表面上，并且在沉积之间聚焦离子束以暴露表面以便限定三维结构。不会被聚焦的离子束限定的最终结构（30）的部分的材料被蚀刻掉，以便在衬底（20）上提供三维结构。

4. 发明授权

US11504959B2 Method of material transfer 有权
公开(公告)号：US11504959B2
公开(公告)日：2022-11-22
申请号：US17425749
申请日：2020-01-24
申请人： Arne Quellmalz , Kristinn Gylfason , Niclas Roxhed , Göran Stemme , Frank Niklaus
发明人： Arne Quellmalz , Xiaojing Wang , Kristinn Gylfason , Niclas Roxhed , Göran Stemme , Frank Niklaus
IPC分类号： B32B37/00 , B82B3/00
摘要： A method for transferring an atomically thin layer comprising providing a target substrate and a donor substrate on which a first atomically thin layer has been formed. The method further comprises disposing an adhesion layer at the donor substrate or at the target substrate. The method further comprises bringing the target substrate and the donor substrate together. Further, the method comprises bonding together the donor substrate, the adhesion layer and the target substrate and removing the donor substrate.

5. 发明授权

US09027239B2 Method for plugging a hole 有权
标题翻译：堵塞孔的方法
公开(公告)号：US09027239B2
公开(公告)日：2015-05-12
申请号：US13511486
申请日：2010-12-17
申请人： Andreas Fischer , Göran Stemme , Frank Niklaus , Niklas Roxhed
发明人： Andreas Fischer , Göran Stemme , Frank Niklaus , Niklas Roxhed
IPC分类号： H01R9/00 , H05K3/00 , B81C1/00 , B01L3/00
CPC分类号： B81C1/00293 , B01L3/502707 , B01L2300/042 , B81B2201/058 , B81B2203/0315 , B81C2201/019 , B81C2203/0145 , Y10T29/49117 , Y10T29/49151 , Y10T29/49153 , Y10T29/49826 , Y10T29/49885
摘要： A method for at least partially inserting a plug into a hole, said method comprising the steps of a) providing a at least one substrate with at least one hole wherein said at least one hole has a largest dimension of from 1 μm to 300 μm, b) providing a piece of material, wherein said piece of material has a larger dimension than said at least one hole, c) pressing said piece of material against the hole with a tool so that a plug is formed, wherein at least a part of said piece of material is pressed into said hole, d) removing the tool from the piece of material. There is further disclosed a plugged hole manufactured with the method. One advantage of an embodiment is that an industrially available wire bonding technology can be used to seal various cavities. The existing wire bonding technology makes the plugging fast and cheap.
摘要翻译：一种用于至少部分地将插头插入孔中的方法，所述方法包括以下步骤：a）提供具有至少一个孔的至少一个基底，其中所述至少一个孔具有1μm至300μm的最大尺寸， b）提供一块材料，其中所述材料片具有比所述至少一个孔更大的尺寸，c）用工具将所述材料件压靠在孔上，从而形成插塞，其中至少部分所述材料被压入所述孔中，d）从所述材料上移除所述工具。还公开了一种使用该方法制造的堵塞孔。一个实施例的一个优点是可以使用工业上可用的引线接合技术来密封各种空腔。现有的导线接合技术使堵塞快速便宜。

6. 发明申请

US20130285256A1 METHOD AND AN APPARATUS FOR FORMING ELECTRICALLY CONDUCTIVE VIAS IN A SUBSTRATE, AN AUTOMATED ROBOT-BASED MANUFACTURING SYSTEM, A COMPONENT COMPRISING A SUBSTRATE WITH VIA HOLES, AND AN INTERPOSER DEVICE 审中-公开
标题翻译：用于形成基底中的导电VIAS的方法和装置，基于机器人的自动化制造系统，包括通孔的基板的组件和插入器装置
公开(公告)号：US20130285256A1
公开(公告)日：2013-10-31
申请号：US13988796
申请日：2011-11-21
申请人： Andreas Fischer , Göran Stemme , Frank Niklaus
发明人： Andreas Fischer , Göran Stemme , Frank Niklaus
IPC分类号： H01L21/768 , H01L23/48
CPC分类号： H01L21/76879 , H01L21/486 , H01L21/76898 , H01L23/147 , H01L23/481 , H01L23/49866 , H01L2224/131 , H01L2924/0001 , H01L2924/09701 , H01L2924/1461 , H01L2924/014 , H01L2924/00015 , H01L2224/13099 , H01L2924/00
摘要： A method is disclosed for forming conductive vias in a substrate by filling preformed via holes, preferably through via holes, with conductive material. The method includes providing a plurality of preformed objects at least partly including ferromagnetic material on a surface of the substrate; providing a magnetic source on an opposite side of the substrate with respect to the plurality of preformed objects, thereby at least partly aligning at least a portion of the preformed objects with a magnetic field associated with the magnetic source; and moving the magnetic source relative the substrate, or vice versa, thereby moving the at least portion of the preformed objects into at least a portion of the via holes.
摘要翻译：公开了一种用于通过用导电材料填充预先形成的通孔，优选地通过通孔来在衬底中形成导电通孔的方法。该方法包括在基底的表面上提供至少部分包括铁磁材料的多个预成型物体; 在所述基板的相对于所述多个预成形物体的相对侧上提供磁源，从而至少部分地将所述预成形物体的至少一部分与与所述磁源相关联的磁场对准; 并且相对于衬底移动磁源，反之亦然，从而将预成形物体的至少一部分移动到通孔的至少一部分中。

7. 发明授权

US10782249B2 Crack structures, tunneling junctions using crack structures and methods of making same 有权
公开(公告)号：US10782249B2
公开(公告)日：2020-09-22
申请号：US16062517
申请日：2016-12-14
申请人： Valentin Dubois , Frank Niklaus , Göran Stemme
发明人： Valentin Dubois , Frank Niklaus , Göran Stemme
IPC分类号： G01N21/95 , G01N33/487 , G01N27/327 , C12Q1/6869 , H01L21/66 , H01L21/302 , H01L21/02 , B82Y5/00 , B82Y15/00 , B82Y40/00
摘要： Disclosed is a method of making a crack structure on a substrate, the crack structure being usable as a tunneling junction structure in a nanogap device, including the controlled fracture or release of a patterned layer under built-in stress, thereby forming elements separated by nanogaps or crack-junctions. The width of the crack-defined nanogap is controlled by locally release-etching the film at a notched bridge patterned in the film. The built-in stress contributes to forming the crack and defining of the width of the crack-defined nanogap. Further, by design of the length of the bridge in a range between sub-μπι to >25μαι, the separation between the elements, defined by the width of the crack-defined nanogaps, can be controlled for each individual crack structure from 100 nm. The nanogaps can be used for tunneling devices in combination with nanopores for DNA, RNA or peptides sequencing.

8. 发明申请

US20130292856A1 METHOD FOR THE WAFER-LEVEL INTEGRATION OF SHAPE MEMORY ALLOY WIRES 有权
标题翻译：用于形状记忆合金线的水平集成的方法
公开(公告)号：US20130292856A1
公开(公告)日：2013-11-07
申请号：US13885257
申请日：2011-11-22
申请人： Stefan Braun , Frank Niklaus , Andreas Fischer , Henrik Gradin
发明人： Stefan Braun , Frank Niklaus , Andreas Fischer , Henrik Gradin
IPC分类号： H01L23/00
CPC分类号： H01L24/85 , B23K20/007 , C22C19/03 , H01L24/05 , H01L24/45 , H01L24/48 , H01L24/78 , H01L24/94 , H01L2224/04042 , H01L2224/05571 , H01L2224/05599 , H01L2224/45 , H01L2224/45015 , H01L2224/45139 , H01L2224/45155 , H01L2224/4813 , H01L2224/48453 , H01L2224/48463 , H01L2224/78301 , H01L2224/85045 , H01L2224/85099 , H01L2224/85205 , H01L2224/85345 , H01L2224/85375 , H01L2224/85385 , H01L2224/85399 , H01L2224/858 , H01L2224/85855 , H01L2224/85899 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01033 , H01L2924/10253 , H01L2924/14 , H01L2924/1461 , H01L2224/45099 , H01L2924/00 , H01L2224/05552 , H01L2924/01049 , H01L2924/00015 , H01L2924/20753 , H01L2924/01022
摘要： The present invention relates to a method to attach a shape memory alloy wire to a substrate, where the wire is mechanically attached into a 3D structure on the substrate. The present invention also relates to a device comprising a shape memory alloy wire attached to a substrate, where the wire is mechanically attached into a 3D structure on the substrate.
摘要翻译：本发明涉及一种将形状记忆合金线附着到基底上的方法，其中线被机械连接到基底上的3D结构中。本发明还涉及一种装置，其包括附接到基底的形状记忆合金丝，其中线被机械地附接到基底上的3D结构中。

9. 发明申请

US20130012078A1 METHOD FOR PLUGGING A HOLE AND A PLUGGED HOLE 有权
标题翻译：用于插入孔和插入孔的方法
公开(公告)号：US20130012078A1
公开(公告)日：2013-01-10
申请号：US13511486
申请日：2010-12-17
申请人： Andreas Fischer , Göran Stemme , Frank Niklaus , Niklas Roxhed
发明人： Andreas Fischer , Göran Stemme , Frank Niklaus , Niklas Roxhed
IPC分类号： B81C1/00 , H01R13/02
CPC分类号： B81C1/00293 , B01L3/502707 , B01L2300/042 , B81B2201/058 , B81B2203/0315 , B81C2201/019 , B81C2203/0145 , Y10T29/49117 , Y10T29/49151 , Y10T29/49153 , Y10T29/49826 , Y10T29/49885
摘要： A method for at least partially inserting a plug into a hole, said method comprising the steps of a) providing a at least one substrate with at least one hole wherein said at least one hole has a largest dimension of from 1 μm to 300 μm, b) providing a piece of material, wherein said piece of material has a larger dimension than said at least one hole, c) pressing said piece of material against the hole with a tool so that a plug is formed, wherein at least a part of said piece of material is pressed into said hole, d) removing the tool from the piece of material. There is further disclosed a plugged hole manufactured with the method. One advantage of an embodiment is that an industrially available wire bonding technology can be used to seal various cavities. The existing wire bonding technology makes the plugging fast and cheap.
摘要翻译：一种用于至少部分地将插头插入孔中的方法，所述方法包括以下步骤：a）提供具有至少一个孔的至少一个基底，其中所述至少一个孔具有1μm至300μm的最大尺寸， b）提供一块材料，其中所述材料片具有比所述至少一个孔更大的尺寸，c）用工具将所述材料件压靠在孔上，从而形成插塞，其中至少部分所述材料被压入所述孔中，d）从所述材料上移除所述工具。还公开了一种使用该方法制造的堵塞孔。一个实施例的一个优点是可以使用工业上可用的引线接合技术来密封各种空腔。现有的导线接合技术使堵塞快速便宜。

10. 发明授权

US09054162B2 Method and an apparatus for forming electrically conductive vias in a substrate, an automated robot-based manufacturing system, a component comprising a substrate with via holes, and an interposer device 有权
标题翻译：用于在基板中形成导电通孔的方法和装置，基于自动机器人的制造系统，包括具有通孔的基板的部件和插入件装置
公开(公告)号：US09054162B2
公开(公告)日：2015-06-09
申请号：US13988796
申请日：2011-11-21
申请人： Andreas Fischer , Göran Stemme , Frank Niklaus
发明人： Andreas Fischer , Göran Stemme , Frank Niklaus
IPC分类号： H01L21/768 , H01L21/48 , H01L23/48 , H01L23/14 , H01L23/498
CPC分类号： H01L21/76879 , H01L21/486 , H01L21/76898 , H01L23/147 , H01L23/481 , H01L23/49866 , H01L2224/131 , H01L2924/0001 , H01L2924/09701 , H01L2924/1461 , H01L2924/014 , H01L2924/00015 , H01L2224/13099 , H01L2924/00
摘要： A method is disclosed for forming conductive vias in a substrate by filling preformed via holes, preferably through via holes, with conductive material. The method includes providing a plurality of preformed objects at least partly including ferromagnetic material on a surface of the substrate; providing a magnetic source on an opposite side of the substrate with respect to the plurality of preformed objects, thereby at least partly aligning at least a portion of the preformed objects with a magnetic field associated with the magnetic source; and moving the magnetic source relative the substrate, or vice versa, thereby moving the at least portion of the preformed objects into at least a portion of the via holes.
摘要翻译：公开了一种用于通过用导电材料填充预先形成的通孔，优选地通过通孔来在衬底中形成导电通孔的方法。该方法包括在基底的表面上提供至少部分包括铁磁材料的多个预成型物体; 在所述基板的相对于所述多个预成形物体的相对侧上提供磁源，从而至少部分地将所述预成形物体的至少一部分与与所述磁源相关联的磁场对准; 并且相对于衬底移动磁源，反之亦然，从而将预成形物体的至少一部分移动到通孔的至少一部分中。

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