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1. 发明授权

US07106808B2 Tuner of the type having zero intermediate frequency and corresponding control process 有权
标题翻译：调谐器具有零中频和相应的控制过程
公开(公告)号：US07106808B2
公开(公告)日：2006-09-12
申请号：US09827306
申请日：2001-04-05
申请人： Pierre Busson , Pierre-Olivier Jouffre , Frédéric Paillardet
发明人： Pierre Busson , Pierre-Olivier Jouffre , Frédéric Paillardet
IPC分类号： H03K9/00
CPC分类号： H03G3/3068 , H03G3/3089
摘要： A tuner includes an analog block, a digital block, and an analog/digital conversion stage connected therebetween. The analog block includes a first attenuator/controlled-gain amplifier stage connected upstream to a frequency transposition stage. The overall mean power of the entire signal received by the tuner is calculated during a phase of initialization. This overall calculated power is compared in the digital block with a first predetermined reference value corresponding to a maximum power desired at a predetermined location of the analog block. The gain of the first attenuator/amplifier stage is adjusted to minimize the deviation between the overall calculated power and the reference value. In a phase of normal operation, one of the channels of the signal received is selected, with the gain of the first attenuator/amplifier stage being fixed.
摘要翻译：调谐器包括模拟块，数字块和连接在它们之间的模拟/数字转换级。模拟模块包括连接到频率转置级上游的第一衰减器/受控增益放大器级。在初始化阶段计算由调谐器接收的整个信号的总平均功率。该总计算功率在数字模块中与对应于模拟模块的预定位置所需的最大功率的第一预定参考值进行比较。调整第一衰减器/放大器级的增益以最小化总计算功率与参考值之间的偏差。在正常操作的相位中，选择所接收的信号中的一个通道，其中第一衰减器/放大器级的增益是固定的。

2. 发明申请

US20050024799A1 Electronic component protected against elelctrostatic discharges 有权
标题翻译：保护电子元件免受静电放电
公开(公告)号：US20050024799A1
公开(公告)日：2005-02-03
申请号：US10867285
申请日：2004-06-14
申请人： Pierre Busson , Pierre-Olivier Jouffre , Bernard Louis-Gavet
发明人： Pierre Busson , Pierre-Olivier Jouffre , Bernard Louis-Gavet
IPC分类号： H01L23/36 , H01L23/60 , H01L23/62 , H02H9/00
CPC分类号： H01L23/60 , H01L24/48 , H01L2224/05553 , H01L2224/05599 , H01L2224/45099 , H01L2224/48237 , H01L2224/85399 , H01L2924/00014 , H01L2924/01057 , H01L2924/01079 , H01L2924/10161 , H01L2924/10253 , H01L2924/1305 , H01L2924/14 , H01L2924/181 , H01L2924/3011 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
摘要： The electronic component, comprises an integrated circuit incorporating several separate functional blocks within a semiconductor substrate, and electrostatic discharge protection means. These electrostatic discharge protection means comprise several separate metal discharge rails (GNDi) placed above the substrate (SB) and respectively associated with the plurality of functional blocks (CRi), all these metal discharge rails being mutually unconnected electrically within the integrated circuit (CI) but connected electrically via an electrical connection (FLi) external to the integrated circuit to one and the same ground plane (SLG) forming a ground reference for the electrostatic discharges, this ground plane (SLG) being located outside the integrated circuit (CI), and possibly being a heat slug.
摘要翻译：该电子部件包括在半导体衬底内并入几个单独功能块的集成电路和静电放电保护装置。这些静电放电保护装置包括放置在衬底（SB）上方并分别与多个功能块（CRi）分别相关联的多个单独的金属放电导轨（GNDi），所有这些金属放电导轨在集成电路（CI）内都是电连接的，但是通过集成电路外部的电连接（FLi）电连接到形成用于静电放电的接地基准的同一接地平面（SLG），该接地平面（SLG）位于集成电路（CI）外部，并可能是一个热塞。

3. 发明授权

US06914304B2 Electronic component protected against electrostatic discharges 有权
标题翻译：电子元件防止静电放电
公开(公告)号：US06914304B2
公开(公告)日：2005-07-05
申请号：US10867285
申请日：2004-06-14
申请人： Pierre Busson , Pierre-Olivier Jouffre , Bernard Louis-Gavet
发明人： Pierre Busson , Pierre-Olivier Jouffre , Bernard Louis-Gavet
IPC分类号： H01L23/36 , H01L23/60 , H01L23/62 , H02H9/00
CPC分类号： H01L23/60 , H01L24/48 , H01L2224/05553 , H01L2224/05599 , H01L2224/45099 , H01L2224/48237 , H01L2224/85399 , H01L2924/00014 , H01L2924/01057 , H01L2924/01079 , H01L2924/10161 , H01L2924/10253 , H01L2924/1305 , H01L2924/14 , H01L2924/181 , H01L2924/3011 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
摘要： The electronic component, comprises an integrated circuit incorporating several separate functional blocks within a semiconductor substrate, and electrostatic discharge protection means. These electrostatic discharge protection means comprise several separate metal discharge rails (GNDi) placed above the substrate (SB) and respectively associated with the plurality of functional blocks (CRi), all these metal discharge rails being mutually unconnected electrically within the integrated circuit (CI) but connected electrically via an electrical connection (FLi) external to the integrated circuit to one and the same ground plane (SLG) forming a ground reference for the electrostatic discharges, this ground plane (SLG) being located outside the integrated circuit (CI), and possibly being a heat slug.
摘要翻译：该电子部件包括在半导体衬底内并入几个单独功能块的集成电路和静电放电保护装置。这些静电放电保护装置包括放置在衬底（SB）上方并分别与多个功能块（CRi）分别相关联的多个单独的金属放电导轨（GNDi），所有这些金属放电导轨在集成电路（CI）内都是电连接的，但是通过集成电路外部的电连接（FLi）电连接到形成用于静电放电的接地基准的同一接地平面（SLG），该接地平面（SLG）位于集成电路（CI）外部，并可能是一个热塞。

4. 发明授权

US08483644B2 Electronic component allowing the decoding of a radiofrequency transmission channel conveying coded digital information, in particular for satellite digital telebroadcasting 有权
公开(公告)号：US08483644B2
公开(公告)日：2013-07-09
申请号：US10150524
申请日：2002-05-17
申请人： Pierre Busson , Bernard Louis-Gavet , Pierre-Olivier Jouffre
发明人： Pierre Busson , Bernard Louis-Gavet , Pierre-Olivier Jouffre
IPC分类号： H04B1/10
CPC分类号： H04N21/6143 , H04L27/06 , H04N7/20
摘要： The component, fully integrated onto a monolithic substrate, includes a tuner, a demodulator, and a channel decoder. The overall filtering is carried out in two parts, a baseband analog filtering and a digital Nyquist filtering removing the information of adjacent channels. It outputs a stream of MPEG data.

5. 发明申请

US20120154238A1 INTEGRATED MILLIMETER WAVE TRANSCEIVER 有权
标题翻译：集成式千兆波收发器
公开(公告)号：US20120154238A1
公开(公告)日：2012-06-21
申请号：US13332031
申请日：2011-12-20
申请人： Jean-Francois Carpentier , Sebastien Pruvost , Patrice Garcia , Pierre Busson , Pierre Dautriche
发明人： Jean-Francois Carpentier , Sebastien Pruvost , Patrice Garcia , Pierre Busson , Pierre Dautriche
IPC分类号： H01Q19/10 , H01Q21/00
CPC分类号： H01Q21/0087 , H01L23/3114 , H01L23/3128 , H01L23/49816 , H01L23/49838 , H01L23/552 , H01L23/66 , H01L24/13 , H01L2223/6677 , H01L2224/1319 , H01L2224/13582 , H01L2224/16225 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01Q19/005 , H01Q19/10 , H01Q19/185 , H01Q21/0025 , H01Q21/0093 , H01Q23/00 , H01L2924/00
摘要： A millimeter wave transceiver including a plate forming an interposer having its upper surface supporting an interconnection network and having its lower surface intended to be assembled on a printed circuit board by bumps; an integrated circuit chip assembled on the upper surface of the interposer; antennas made of tracks formed on the upper surface of the interposer; and reflectors on the upper surface of the printed circuit board in front of each of the antennas, the effective distance between each antenna and the reflector plate being on the order of one quarter of the wavelength, taking into account the dielectric constants of the interposed materials.
摘要翻译：一种毫米波收发器，包括形成插入件的板，其具有支撑互连网络的上表面，并且其下表面旨在通过凸块组装在印刷电路板上; 组装在所述插入件的上表面上的集成电路芯片; 由形成在插入件的上表面上的轨道制成的天线; 以及在每个天线前面的印刷电路板的上表面上的反射器，考虑到插入材料的介电常数，每个天线和反射板之间的有效距离在波长的四分之一左右。

6. 发明申请

US20110085626A1 RECEIVE UNIT FOR RECEPTION OF MULTIPLE SATELLITE SIGNALS 有权
标题翻译：接收多个卫星信号的接收单元
公开(公告)号：US20110085626A1
公开(公告)日：2011-04-14
申请号：US12902598
申请日：2010-10-12
申请人： Pierre Busson
发明人： Pierre Busson
IPC分类号： H04B1/10
CPC分类号： H04B1/18 , H04B7/084 , H04H40/90
摘要： A satellite receive unit for receiving a plurality of satellite signals from a plurality of satellites, the satellite receive unit including: a plurality of low noise blocks each for receiving one or more of the satellite signals and providing a received signal, at least one of the low noise blocks receiving a plurality of the satellite signals; and a satellite signal processing unit including a plurality of branches each arranged to receive a corresponding one of the received signals from the plurality of low noise blocks, each branch having a multiplier arranged to weight the received signal by multiplying by a corresponding coefficient; and an adder arranged to add the weighted signals of each branch to generate an output satellite signal.
摘要翻译：一种用于从多个卫星接收多个卫星信号的卫星接收单元，所述卫星接收单元包括：多个低噪声块，每个低噪声块用于接收所述卫星信号中的一个或多个并提供接收信号，所述卫星接收单元中的至少一个接收多个卫星信号的低噪声块; 以及卫星信号处理单元，其包括多个分支，每个分支被布置成从所述多个低噪声块接收接收到的信号中的相应一个，每个分支具有乘法器，被布置为通过乘以相应的系数来对所接收的信号进行加权; 以及加法器，其被配置为将每个分支的加权信号相加以生成输出卫星信号。

7. 发明授权

US08755741B2 Receive unit for reception of multiple satellite signals 有权
标题翻译：用于接收多个卫星信号的接收单元
公开(公告)号：US08755741B2
公开(公告)日：2014-06-17
申请号：US12902598
申请日：2010-10-12
申请人： Pierre Busson
发明人： Pierre Busson
IPC分类号： H04B7/185
CPC分类号： H04B1/18 , H04B7/084 , H04H40/90
摘要： A satellite receive unit for receiving a plurality of satellite signals from a plurality of satellites, the satellite receive unit including: a plurality of low noise blocks each for receiving one or more of the satellite signals and providing a received signal, at least one of the low noise blocks receiving a plurality of the satellite signals; and a satellite signal processing unit including a plurality of branches each arranged to receive a corresponding one of the received signals from the plurality of low noise blocks, each branch having a multiplier arranged to weight the received signal by multiplying by a corresponding coefficient; and an adder arranged to add the weighted signals of each branch to generate an output satellite signal.
摘要翻译：一种用于从多个卫星接收多个卫星信号的卫星接收单元，所述卫星接收单元包括：多个低噪声块，每个低噪声块用于接收所述卫星信号中的一个或多个并提供接收信号，所述卫星接收单元中的至少一个接收多个卫星信号的低噪声块; 以及卫星信号处理单元，其包括多个分支，每个分支被布置成从所述多个低噪声块接收接收到的信号中的相应一个，每个分支具有乘法器，被布置为通过乘以相应的系数来对所接收的信号进行加权; 以及加法器，其被配置为将每个分支的加权信号相加以生成输出卫星信号。

8. 发明授权

US07962949B2 Electronic component allowing the decoding of digital terrestrial or cable television signals 有权
标题翻译：允许数字地面或有线电视信号解码的电子元件
公开(公告)号：US07962949B2
公开(公告)日：2011-06-14
申请号：US10814621
申请日：2004-03-31
申请人： Pierre Busson , Daniel Saias , Frederic Paillardet , Franck Montaudon
发明人： Pierre Busson , Daniel Saias , Frederic Paillardet , Franck Montaudon
IPC分类号： H04N7/16 , H04N5/50 , H04H20/74
CPC分类号： H04N5/4446 , H03D3/007 , H03D7/161 , H04L2027/0016 , H04L2027/0024 , H04N5/4401 , H04N5/455 , H04N21/426 , H04N21/6112
摘要： A dual-conversion tuner firstly upconverts so as to place itself outside the receive band and then downconverts with zero intermediate frequency. A filter of the surface acoustic wave type is disposed between the two frequency transposition stages of the tuner. After baseband filtering, the signals are digitized then processed in a digital block comprising a channel decoding module. With the exception of the surface acoustic wave filter, the components are entirely embodied in integrated fashion.
摘要翻译：首先将双转换调谐器上变频，将其自身置于接收频带外，然后以零中频下变频。表面声波型滤波器设置在调谐器的两个频率转置级之间。在基带滤波之后，信号被数字化，然后在包括信道解码模块的数字块中进行处理。除了表面声波滤波器之外，组件完全以整体方式体现。

9. 发明授权

US07643634B2 Electronic component allowing the decoding of satellite digital television signals 有权
标题翻译：允许对卫星数字电视信号进行解码的电子元件
公开(公告)号：US07643634B2
公开(公告)日：2010-01-05
申请号：US10814818
申请日：2004-03-31
申请人： Pierre Busson , Pierre-Oliver Jouffre , Bernard Louis-Gavet
发明人： Pierre Busson , Pierre-Oliver Jouffre , Bernard Louis-Gavet
IPC分类号： H04N7/167 , H04L25/00 , H04L27/00
CPC分类号： H04N7/20 , H04L27/148
摘要： An integrated circuit is embodied on a monolithic substrate and incorporates a tuning module of the direct sampling type that is able to receive satellite digital television analog signals composed of several channels, as well as several channel decoding digital modules connected at the output of the tuning module so as to deliver respectively simultaneously several streams of data packets corresponding to several different selected channels.
摘要翻译：集成电路体现在单片基板上，并且包括能够接收由几个通道组成的卫星数字电视模拟信号的直接采样类型的调谐模块，以及连接在调谐模块的输出端的多个通道解码数字模块以便分别同时传送与若干不同选择的信道相对应的若干数据分组流。

10. 发明授权

US07149485B2 Method and device for processing mismatches between two quadrature paths of a chain of a reception adapted for example to the reception of a signal modulated according to a modulation of the OFDM type 有权
标题翻译：用于处理接收链的两个正交路径之间的错配的方法和装置，例如适用于根据OFDM类型的调制调制的信号的接收
公开(公告)号：US07149485B2
公开(公告)日：2006-12-12
申请号：US10919796
申请日：2004-08-17
申请人： Pierre Busson , Bruno Paille
发明人： Pierre Busson , Bruno Paille
IPC分类号： H04B1/18 , H04B1/04
CPC分类号： H04L5/06 , H04L27/265 , H04L2025/03414 , H04L2025/03522
摘要： In a calibration phase for a tuner of the DZIF type, N calibration frequency signals are generated at an input of a filter. The N calibration frequency signals have N calibration frequencies corresponding respectively after transposition to N analysis frequencies at an input of a Fourier transform. An amplitude and a phase of a corresponding point at an output of the Fourier transform are calculated for each analysis frequency. In a reception phase, each of the outputs of the Fourier transform is corrected with an inverse of the corresponding amplitude and opposite the corresponding phase calculated in the calibration phase.
摘要翻译：在DZIF型调谐器的校准阶段，N个校准频率信号在滤波器的输入端产生。 N个校准频率信号在傅立叶变换的输入处转换到N个分析频率之后分别具有N个校准频率。对于每个分析频率计算在傅立叶变换的输出处的对应点的振幅和相位。在接收阶段，傅立叶变换的每个输出用对应的幅度的倒数校正，与在校准阶段计算出的相应的相位相反。

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