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    • 3. 发明授权
    • Method and system for device reconfiguration for defect amelioration
    • 用于缺陷改善的设备重新配置的方法和系统
    • US08121807B2
    • 2012-02-21
    • US12288021
    • 2008-10-15
    • Joseph Warren RobinettPhilip J. KuekesR. Stanley Williams
    • Joseph Warren RobinettPhilip J. KuekesR. Stanley Williams
    • G01R27/28
    • G01R31/317
    • Embodiments of the present invention are directed to cost-effective defect amelioration in manufactured electronic devices that include nanoscale components. Certain embodiments of the present invention are directed to amelioration of defects in electronic devices that contain nanoscale demultiplexers. In certain embodiments of the present invention, the nanoscale-demultiplexer-containing devices include reconfigurable encoders. In one embodiment of the present invention, the table of codes within a reconfigurable encoder is permuted, and a device is configured in accordance with the permuted codes, in order to produce a permuted table of codes that, when input to an appropriately configured nanoscale demultiplexer, produces correct outputs despite defects in the nanoscale demultiplexer.
    • 本发明的实施例涉及在包括纳米级组件的制造的电子设备中的经济有效的缺陷改善。 本发明的某些实施例涉及改善包含纳米级解复用器的电子设备中的缺陷。 在本发明的某些实施例中,含纳米级解复用器的装置包括可重构编码器。 在本发明的一个实施例中,可重构编码器内的代码表被置换,并且根据置换代码配置器件,以便产生置换的代码表,当输入到适当配置的纳米级解复用器 ,尽管纳米级解复用器中存在缺陷,但仍能产生正确的输出。
    • 4. 发明授权
    • Nanoscale interconnection interface
    • 纳米级互连接口
    • US08112700B2
    • 2012-02-07
    • US12011175
    • 2008-01-23
    • Philip J. KuekesJ. Warren RobinettGadiel SerousslR. Stanley Williams
    • Philip J. KuekesJ. Warren RobinettGadiel SerousslR. Stanley Williams
    • G11C29/00
    • G11C13/0023B82Y10/00G06F11/1016G11C8/10G11C11/54G11C13/0002G11C2213/77G11C2213/81
    • One embodiment of the present invention provides a demultiplexer implemented as a nanowire crossbar or a hybrid nanowire/microscale-signal-line crossbar with resistor-like nanowire junctions. The demultiplexer of one embodiment provides demultiplexing of signals input on k microscale address lines to 2k or fewer nanowires, employing supplemental, internal address lines to map 2k nanowire addresses to a larger, internal, n-bit address space, where n>k. A second demultiplexer embodiment of the present invention provides demultiplexing of signals input on n microscale address lines to 2k nanowires, with n>k, using 2k, well-distributed, n-bit external addresses to access the 2k nanowires. Additional embodiments of the present invention include a method for evaluating different mappings of nanowire addresses to internal address-spaces of different sizes, or to evaluate mappings of nanowires to external address-spaces of different sizes, metrics for evaluating address mapping and demultiplexer designs, and demultiplexer design methods.
    • 本发明的一个实施例提供了一种解复用器,其实现为纳米线交叉开关或具有电阻器状纳米线结的混合纳米线/微型信号线交叉开关。 一个实施例的解复用器提供在k个微米地址线上输入的信号到2k个或更少的纳米线的解复用,采用补充的内部地址线将2k个纳米线地址映射到更大的内部n位地址空间,其中n> k。 本发明的第二解复用器实施例使用2k,均匀分布的n位外部地址来访问2k纳米线,在n个微米级地址线上输入的信号到2k纳米线解复用n> k。 本发明的另外的实施例包括用于评估纳米线地址与不同大小的内部地址空间的不同映射的方法,或者评估纳米线与不同大小的外部地址空间的映射,用于评估地址映射和解复用器设计的度量,以及 解复用器设计方法。
    • 9. 发明授权
    • Constant-weight-code-based addressing of nanoscale and mixed microscale/nanoscale arrays
    • 纳米尺度和混合微米级/纳米尺寸阵列的基于恒权重代码的寻址
    • US07489583B2
    • 2009-02-10
    • US11221036
    • 2005-09-06
    • Philip J. KuekesJ. Warren RoblnettRon M. RothGadlel SerousslGregory S. SmiderR. Stanley Williams
    • Philip J. KuekesJ. Warren RoblnettRon M. RothGadlel SerousslGregory S. SmiderR. Stanley Williams
    • G11C8/00
    • G11C8/10B82Y10/00G11C13/00G11C13/0023G11C13/0069G11C2013/009G11C2213/77G11C2213/81
    • Various embodiments of the present invention include methods for determining nanowire addressing schemes and include microscale/nanoscale electronic devices that incorporate the nanowire addressing schemes for reliably addressing nanowire-junctions within nanowire crossbars. The addressing schemes allow for change in the resistance state, or other physical or electronic state, of a selected nanowire-crossbar junction without changing the resistance state, or other physical or electronic state, of the remaining nanowire-crossbar junctions, and without destruction of either the selected nanowire-crossbar junction or the remaining, non-selected nanowire-crossbar junctions. Additional embodiments of the present invention include nanoscale memory arrays and other nanoscale electronic devices that incorporate the nanowire-addressing-scheme embodiments of the present invention. Certain of the embodiments of the present invention employ constant-weight codes, a well-known class of error-control-encoding codes, as addressed-nanowire selection voltages applied to microscale output signal lines of microscale/nanoscale encoder-demultiplexers that are selectively interconnected with a set of nanowires.
    • 本发明的各种实施例包括用于确定纳米线寻址方案的方法,并且包括微纳米级纳米级电子器件,其纳入用于在纳米线交叉管内可靠地寻址纳米线结的纳米线寻址方案。 寻址方案允许选择的纳米线 - 交叉连接点的电阻状态或其他物理或电子状态的改变,而不改变剩余的纳米线 - 交叉连接点的电阻状态或其他物理或电子状态,并且不破坏 选择的纳米线 - 交叉结或剩余的未选择的纳米线交叉点结。 本发明的另外的实施例包括结合本发明的纳米线寻址方案实施例的纳米级存储器阵列和其它纳米级电子器件。 本发明的某些实施例采用常规权重代码,众所周知的错误控制编码代码,作为施加到微尺度/纳米级编码器 - 解复用器的微量输出信号线上的寻址纳米线选择电压,其被选择性地互连 与一套纳米线。