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    • 6. 发明申请
    • GRAPHENE TRANSISTOR WITH A SELF-ALIGNED GATE
    • 具有自对准门的石墨晶体管
    • US20120056161A1
    • 2012-03-08
    • US12876454
    • 2010-09-07
    • Phaedon AvourisDamon B. FarmerYu-Ming LinYu Zhu
    • Phaedon AvourisDamon B. FarmerYu-Ming LinYu Zhu
    • H01L29/76H01L21/335
    • H01L29/1606H01L29/41733H01L29/42384H01L29/4908H01L29/66742H01L29/778H01L29/78684
    • A graphene-based field effect transistor includes source and drain electrodes that are self-aligned to a gate electrode. A stack of a seed layer and a dielectric metal oxide layer is deposited over a patterned graphene layer. A conductive material stack of a first metal portion and a second metal portion is formed above the dielectric metal oxide layer. The first metal portion is laterally etched employing the second metal portion, and exposed portions of the dielectric metal oxide layer are removed to form a gate structure in which the second metal portion overhangs the first metal portion. The seed layer is removed and the overhang is employed to shadow proximal regions around the gate structure during a directional deposition process to form source and drain electrodes that are self-aligned and minimally laterally spaced from edges of the gate electrode.
    • 基于石墨烯的场效应晶体管包括与栅电极自对准的源极和漏极。 在图案化的石墨烯层上沉积种子层和电介质金属氧化物层的堆叠。 第一金属部分和第二金属部分的导电材料堆叠形成在电介质金属氧化物层的上方。 使用第二金属部分横向蚀刻第一金属部分,去除电介质金属氧化物层的暴露部分以形成其中第二金属部分悬垂在第一金属部分上的栅极结构。 移除晶种层并且在定向沉积工艺期间使用突出部来遮蔽栅极结构周围的近端区域,以形成与栅电极的边缘自对准且最小程度地横向间隔的源电极和漏电极。