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    • 2. 发明授权
    • Process for delineating photoresist lines at pattern edges only using
image reversal composition with diazoquinone
    • 仅使用具有重氮醌的图像反转组合物在图案边缘处描绘光致抗蚀剂线的方法
    • US4568631A
    • 1986-02-04
    • US605088
    • 1984-04-30
    • Dinesh A. BadamiMark C. HakeyHolger Moritz
    • Dinesh A. BadamiMark C. HakeyHolger Moritz
    • H01L21/027G03F7/039G03F7/20G03F7/26G03F7/40H01L21/30G03C5/00
    • G03F7/40G03F7/039G03F7/20G03F7/2022
    • An optical photolithographic process in which resist lines having widths in the micron and sub-micron range are produced without the use of a fine line photomask. A positive photoresist having an additive for image reversal is applied to the surface of a semiconductor substrate. The photoresist is exposed through a photomask to ultraviolet light. The edges of the opaque sections of the mask diffract the ultraviolet light, forming partially exposed areas between the exposed and unexposed areas formed in the photoresist. After development in a solvent to remove the exposed areas, the photoresist undergoes an image reversal process. The photoresist is first baked at 100.degree. C. for 30 minutes. During this bake step, the photoactive decomposition products present in the partially exposed areas react, freezing the solubility of the partially exposed areas with respect to that of the unexposed areas. The photoresist is then blanket exposed and developed in a solvent, leaving the partially exposed areas on the substrate. The resulting thin resist lines can be used to form narrow isolation trenches by coating the substrate with a quartz film and lifting off the resist lines.
    • 在不使用细线光掩模的情况下制造具有微米和亚微米范围宽度的抗蚀剂线的光学光刻工艺。 将具有用于图像反转的添加剂的正性光致抗蚀剂施加到半导体衬底的表面。 光致抗蚀剂通过光掩模曝光到紫外光。 掩模的不透明部分的边缘衍射紫外光,在形成在光致抗蚀剂中的暴露区域和未曝光区域之间形成部分暴露的区域。 在溶剂中显影以除去曝光区域后,光致抗蚀剂经历图像反转过程。 光致抗蚀剂首先在100℃下烘烤30分钟。 在该烘烤步骤期间,存在于部分暴露的区域中的光敏分解产物反应,冻结部分曝光的区域相对于未曝光区域的溶解度。 然后将光致抗蚀剂铺展在一个溶剂中,将部分暴露的区域留在衬底上。 所得到的薄抗蚀剂线可以用于通过用石英膜涂覆基板并提起抗蚀剂线来形成窄的隔离沟槽。
    • 4. 发明授权
    • Production of a lift-off mask and its application
    • 生产脱膜面膜及其应用
    • US4659650A
    • 1987-04-21
    • US840344
    • 1986-03-17
    • Holger MoritzGerd Pfeiffer
    • Holger MoritzGerd Pfeiffer
    • H01L21/027G03F1/00G03F1/08G03F7/023G03F7/039G03F7/20G03F7/40H01L21/306B05D5/12H01L21/312
    • G03F7/0233G03F7/2022
    • A positive resist containing a weak base and polyvinyl phenol as a film forming component is deposited on a substrate, subsequently exposed imagewise, cured, blanket exposed and developed in a KOH solution at temperatures of less than 10.degree. C. The resist pattern thus obtained is exposed to light having a wavelength ranging from 300 to 320 nm and finally heat-treated at temperatures ranging from 150.degree. to 280.degree. C. The finished lift-off mask is dimensionally stable at temperatures of .ltoreq.280.degree. C. and does not emit liquid or volatile components when heated.During application of the lift-off mask, a material is blanket vapor deposited at a substrate temperature ranging from about 160.degree. to 250.degree. C. on the resist pattern having openings with overhanging walls. Subsequently, the resist pattern is dissolved in a sodium metasilicate solution, causing the material vapor deposited thereon to be lifted off, with the material deposited on the substrate directly remaining.The lift-off mask is particularly suitable for generating conductor patterns on semiconductor substrates if low and uniform contact resistances between the conductor and the semiconductor material and a high degree of pattern accuracy and packing density are required.
    • 将含有弱碱和聚乙烯基苯酚作为成膜组分的正性抗蚀剂沉积在基材上,随后在小于10℃的温度下在KOH溶液中成像曝光,固化,覆盖曝光和显影。所得到的抗蚀剂图案为 暴露于波长范围为300至320nm的光,最后在150至280℃的温度下进行热处理。成品剥离掩模在280℃的温度下尺寸稳定,不会 在加热时放出液体或挥发性成分。 在施加剥离掩模的过程中,在具有具有突出壁的开口的抗蚀剂图案上,在大约160℃至250℃的衬底温度下,将材料进行毯式气相沉积。 随后,将抗蚀剂图案溶解在偏硅酸钠溶液中,使沉积在其上的材料被剥离,直接保留沉积在基板上的材料。 如果需要导体和半导体材料之间的低且均匀的接触电阻并且需要高度的图案精度和封装密度,则剥离掩模特别适用于在半导体基板上产生导体图案。
    • 5. 发明授权
    • Method and system for in situ control of material removal processes
    • 材料去除过程的原位控制方法和系统
    • US4179622A
    • 1979-12-18
    • US900028
    • 1978-04-25
    • Holger Moritz
    • Holger Moritz
    • H05K3/06C23F1/02G01B11/00G03F7/30H01L21/027H01L21/30H01L21/306G01N21/30
    • C23F1/02G03F7/30H01L21/0274
    • In practice, the development time for a photoresist covered semiconductor wafer exposed by a given mask configuration is established experimentally. It is obvious that this time is only adequate if the other parameters do not change. According to the subject invention the mask is provided with an optical grid. The grid pattern, together with the pattern of the integrated circuit, is transferred by exposure to the photoresist layer covering the semiconductor wafer. During the development process, a light ray is directed onto the area of the wafer which was exposed to the grid pattern and the intensity of the light diffracted in the direction of the 2nd diffraction order is monitored by a light sensor. The slits of the grid may have the same width as the smallest lines of the exposed pattern. In this case, the intensity minimum of the 2nd diffraction order indicates the end of the development process.
    • 在实践中,通过给定的掩模配置曝光的光致抗蚀剂覆盖的半导体晶片的显影时间是实验建立的。 很明显,如果其他参数没有改变,这个时间是足够的。 根据本发明,掩模设置有光栅。 栅格图案与集成电路的图案一起通过曝光转移到覆盖半导体晶片的光致抗蚀剂层。 在显影过程中,光线被引导到暴露于栅格图案的晶片的区域上,并且通过光传感器监测沿第二衍射级的方向衍射的光的强度。 栅格的狭缝可以具有与暴露图案的最小线相同的宽度。 在这种情况下,第二衍射级的强度最小值表示开发过程的结束。