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1. 发明授权

US4164031A Memory system 失效
标题翻译：内存系统
公开(公告)号：US4164031A
公开(公告)日：1979-08-07
申请号：US745157
申请日：1976-11-26
申请人： Perry W. Lou , Charles P. Grant, Jr., deceased
发明人： Perry W. Lou , Charles P. Grant, Jr., deceased
IPC分类号： G11C8/04 , G11C8/12 , G11C11/405 , G11C11/408 , G11C11/40 , G11C13/00
CPC分类号： G11C11/405 , G11C11/4085 , G11C8/04 , G11C8/12
摘要： Disclosed is a memory system for storing digital data; the memory system of the type which may be implemented, for instance, in an electronic microprocessor or calculator system. The memory comprises an array of transistor memory cells arranged in columns and rows. Column conductors are provided for supplying digital information to each column of such cells and row conductors are provided for enabling each row of cells to store digital information being received on the column conductors. A commutator is provided for successively supplying enabling signals to the row conductors and another commutator is provided for successfully connecting the column conductors with an input/output bus in the memory system. The provision of the commutators with the array of memory cells causes the data, when stored as a word of data, to occupy a register arranged in essentially a diagonal pattern through the array.
摘要翻译：公开了一种用于存储数字数据的存储系统; 可以例如在电子微处理器或计算器系统中实现的类型的存储器系统。存储器包括以列和行排列的晶体管存储单元阵列。列导体被提供用于向这些单元的每列提供数字信息，并且提供行导体用于使每一行单元能够存储正在接收到列导体上的数字信息。提供了一个换向器，用于连续地向行导体提供使能信号，并且提供了另一个换向器，用于将列导体与存储器系统中的输入/输出总线成功连接。具有存储器单元阵列的换向器的提供使得当作为数据字存储时，数据占据通过阵列以基本上对角线图案布置的寄存器。

2. 发明授权

US4125901A Electronic calculator or microprocessor having a multi-input arithmetic unit 失效
标题翻译：具有多输入算术单元的电子计算器或微处理器
公开(公告)号：US4125901A
公开(公告)日：1978-11-14
申请号：US736057
申请日：1976-10-27
申请人： Thomas E. Merrow , Stephen P. Hamilton , Larry L. Miles , Charles P. Grant, Jr., deceased
发明人： Thomas E. Merrow , Stephen P. Hamilton , Larry L. Miles , Charles P. Grant, Jr., deceased
IPC分类号： G06F9/30 , G06F7/48
CPC分类号： G06F9/30134
摘要： An electronic calculator or microprocessor system of the type preferably having keyboard input and a visual display is implemented with a semiconductor chip having a arithmetic unit and memory system. The arithmetic unit and memory system include a plurality of operational registers and an arithmetic unit having two inputs and an output. A plurality of operational registers selector gates interconnect the operational registers and arithmetic unit for connecting any selected two of the plurality of operational registers to the inputs of the arithmetic unit. The plurality of operation register selector gates preferably comprise individual MOS transfer gates.
摘要翻译：具有键盘输入和视觉显示的类型的电子计算器或微处理器系统由具有运算单元和存储器系统的半导体芯片实现。算术单元和存储器系统包括多个操作寄存器和具有两个输入和一个输出的算术单元。多个操作寄存器选择器门互连操作寄存器和运算单元，用于将多个操作寄存器中的所选择的两个连接到运算单元的输入端。多个操作寄存器选择器门优选地包括单独的MOS传输门。

3. 发明授权

US4079459A Two speed shift register for electronic calculator or microprocessor system 失效
标题翻译：电子计算器或微处理器系统的两速移位寄存器
公开(公告)号：US4079459A
公开(公告)日：1978-03-14
申请号：US736003
申请日：1976-10-27
申请人： Charles P. Grant, Jr., deceased
发明人： Charles P. Grant, Jr., deceased
IPC分类号： G06F9/315 , G06F15/02 , G06F15/00
CPC分类号： G06F9/30032 , G06F15/02
摘要： An electronic calculator or microprocessor system of the type preferably having keyboard input and a visual display is provided with a semiconductor chip having an arithmetic unit, a memory register and a dual speed shift register, the dual speed shift register being responsive to control signals generated on the chip for controlling the memory register to selectively read out a first or second number of digits of data stored therein to an input of the arithmetic unit.
摘要翻译：具有优选地具有键盘输入和视觉显示的类型的电子计算器或微处理器系统设置有具有运算单元，存储寄存器和双速度移位寄存器的半导体芯片，该双速移位寄存器响应于在用于控制存储器寄存器的芯片选择性地将存储在其中的数据的第一或第二数位数字读出到运算单元的输入。

4. 发明授权

US4164037A Electronic calculator or microprocessor system having combined data and flag bit storage system 失效
标题翻译：具有组合数据和标志位存储系统的电子计算器或微处理器系统
公开(公告)号：US4164037A
公开(公告)日：1979-08-07
申请号：US736271
申请日：1976-10-27
申请人： Michael J. Cochran , Charles P. Grant, Jr., deceased
发明人： Michael J. Cochran , Charles P. Grant, Jr., deceased
IPC分类号： G06F15/02
CPC分类号： G06F15/02
摘要： An electronic calculator or microprocessor system of the type preferably having keyboard input and a visual display is provided with a semiconductor chip having a memory for storing instruction words, an arithmetic unit, an instruction word decoder for controlling the arithmetic unit in response to instruction commands read out of the instruction word memory and a combined data and flag bit storage system. The combined data and flag bit storage system provides for the storage of flag bits with an associated numeric data word in a single register. Certain of the stages of the register are preferably dedicated for use as flag bit storage and certain other stages of the register are dedicated for use as numeric data storage. The arithmetic unit is preferably operable in a first mode for performing arithmetic operations in binary coded decimal format for the numeric data and in a binary format for the flag bits.
摘要翻译：具有优选地具有键盘输入和视觉显示的类型的电子计算器或微处理器系统设置有具有用于存储指令字的存储器的半导体芯片，运算单元，用于响应于读取指令命令来控制算术单元的指令字解码器指令字存储器和组合数据和标志位存储系统。组合的数据和标志位存储系统提供在单个寄存器中存储与相关联的数字数据字的标志位。寄存器的某些阶段优选专用于用作标志位存储，并且寄存器的某些其它级专用于数字数据存储。算术单元优选地可以以用于数字数据的二进制编码十进制格式和用于标志位的二进制格式执行算术运算的第一模式。

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